xref: /openbsd-src/sys/dev/pci/if_dc_pci.c (revision a28daedfc357b214be5c701aa8ba8adb29a7f1c2)
1 /*	$OpenBSD: if_dc_pci.c,v 1.61 2008/09/11 06:49:14 brad Exp $	*/
2 
3 /*
4  * Copyright (c) 1997, 1998, 1999
5  *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Bill Paul.
18  * 4. Neither the name of the author nor the names of any co-contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32  * THE POSSIBILITY OF SUCH DAMAGE.
33  *
34  * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $
35  */
36 
37 #include "bpfilter.h"
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/mbuf.h>
42 #include <sys/protosw.h>
43 #include <sys/socket.h>
44 #include <sys/ioctl.h>
45 #include <sys/errno.h>
46 #include <sys/timeout.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/device.h>
50 
51 #include <net/if.h>
52 #include <net/if_dl.h>
53 #include <net/if_types.h>
54 
55 #ifdef INET
56 #include <netinet/in.h>
57 #include <netinet/in_systm.h>
58 #include <netinet/in_var.h>
59 #include <netinet/ip.h>
60 #include <netinet/if_ether.h>
61 #endif
62 
63 #include <net/if_media.h>
64 
65 #if NBPFILTER > 0
66 #include <net/bpf.h>
67 #endif
68 
69 #include <dev/mii/mii.h>
70 #include <dev/mii/miivar.h>
71 
72 #include <dev/pci/pcireg.h>
73 #include <dev/pci/pcivar.h>
74 #include <dev/pci/pcidevs.h>
75 
76 #ifdef __sparc64__
77 #include <dev/ofw/openfirm.h>
78 #endif
79 
80 #ifndef __hppa__
81 #define DC_USEIOSPACE
82 #endif
83 
84 #include <dev/ic/dcreg.h>
85 
86 /*
87  * Various supported device vendors/types and their names.
88  */
89 struct dc_type dc_devs[] = {
90 	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 },
91 	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 },
92 	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 },
93 	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 },
94 	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 },
95 	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511 },
96 	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513 },
97 	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 },
98 	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 },
99 	{ PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A },
100 	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 },
101 	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 },
102 	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 },
103 	{ PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 },
104 	{ PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC },
105 	{ PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII },
106 	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 },
107 	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 },
108 	{ PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 },
109 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 },
110 	{ PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX },
111 	{ PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN130 },
112 	{ 0, 0 }
113 };
114 
115 int dc_pci_match(struct device *, void *, void *);
116 void dc_pci_attach(struct device *, struct device *, void *);
117 void dc_pci_acpi(struct device *, void *);
118 
119 /*
120  * Probe for a 21143 or clone chip. Check the PCI vendor and device
121  * IDs against our list and return a device name if we find a match.
122  */
123 int
124 dc_pci_match(struct device *parent, void *match, void *aux)
125 {
126 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
127 	struct dc_type *t;
128 
129 	/*
130 	 * Support for the 21140 chip is experimental.  If it works for you,
131 	 * that's great.  By default, this chip will use de.
132 	 */
133         if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC &&
134 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140)
135 		return (1);
136 
137 	/*
138 	 * The following chip revision doesn't seem to work so well with dc,
139 	 * so let's have de handle it.  (de will return a match of 2)
140 	 */
141         if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC &&
142 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 &&
143 	    PCI_REVISION(pa->pa_class) == 0x21)
144 		return (1);
145 
146 	for (t = dc_devs; t->dc_vid != 0; t++) {
147 		if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) &&
148 		    (PCI_PRODUCT(pa->pa_id) == t->dc_did)) {
149 			return (3);
150 		}
151 	}
152 
153 	return (0);
154 }
155 
156 void
157 dc_pci_acpi(struct device *self, void *aux)
158 {
159 	struct dc_softc		*sc = (struct dc_softc *)self;
160 	struct pci_attach_args	*pa = (struct pci_attach_args *)aux;
161 	pci_chipset_tag_t	pc = pa->pa_pc;
162 	u_int32_t		r, cptr;
163 
164 	/* Find the location of the capabilities block */
165 	cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF;
166 
167 	r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF;
168 	if (r == 0x01) {
169 
170 		r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR);
171 		if (r & DC_PSTATE_D3) {
172 			u_int32_t		iobase, membase, irq;
173 
174 			/* Save important PCI config data. */
175 			iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO);
176 			membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA);
177 			irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT);
178 
179 			/* Reset the power state. */
180 			printf("%s: chip is in D%d power mode "
181 			    "-- setting to D0\n", sc->sc_dev.dv_xname,
182 			    r & DC_PSTATE_D3);
183 			r &= 0xFFFFFFFC;
184 			pci_conf_write(pc, pa->pa_tag, cptr + PCI_PMCSR, r);
185 
186 			/* Restore PCI config data. */
187 			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase);
188 			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase);
189 			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq);
190 		}
191 	}
192 	return;
193 }
194 
195 /*
196  * Attach the interface. Allocate softc structures, do ifmedia
197  * setup and ethernet/BPF attach.
198  */
199 void
200 dc_pci_attach(struct device *parent, struct device *self, void *aux)
201 {
202 	const char		*intrstr = NULL;
203 	pcireg_t		command;
204 	struct dc_softc		*sc = (struct dc_softc *)self;
205 	struct pci_attach_args	*pa = aux;
206 	pci_chipset_tag_t	pc = pa->pa_pc;
207 	pci_intr_handle_t	ih;
208 	bus_size_t		size;
209 	int			found = 0;
210 
211 	sc->sc_dmat = pa->pa_dmat;
212 
213 	/*
214 	 * Handle power management nonsense.
215 	 */
216 	dc_pci_acpi(self, aux);
217 
218 	sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
219 
220 	/*
221 	 * Map control/status registers.
222 	 */
223 #ifdef DC_USEIOSPACE
224 	if (pci_mapreg_map(pa, DC_PCI_CFBIO,
225 	    PCI_MAPREG_TYPE_IO, 0,
226 	    &sc->dc_btag, &sc->dc_bhandle, NULL, &size, 0)) {
227 		printf(": can't map i/o space\n");
228 		return;
229 	}
230 #else
231 	if (pci_mapreg_map(pa, DC_PCI_CFBMA,
232 	    PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
233 	    &sc->dc_btag, &sc->dc_bhandle, NULL, &size, 0)) {
234 		printf(": can't map mem space\n");
235 		return;
236 	}
237 #endif
238 
239 	/* Allocate interrupt */
240 	if (pci_intr_map(pa, &ih)) {
241 		printf(": couldn't map interrupt\n");
242 		goto fail_1;
243 	}
244 	intrstr = pci_intr_string(pc, ih);
245 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc,
246 	    self->dv_xname);
247 	if (sc->sc_ih == NULL) {
248 		printf(": couldn't establish interrupt");
249 		if (intrstr != NULL)
250 			printf(" at %s", intrstr);
251 		printf("\n");
252 		goto fail_1;
253 	}
254 	printf(": %s", intrstr);
255 
256 	/* Need this info to decide on a chip type. */
257 	sc->dc_revision = PCI_REVISION(pa->pa_class);
258 
259 	/* Get the eeprom width, but PNIC has no eeprom */
260 	if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LITEON &&
261 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC))
262 		dc_eeprom_width(sc);
263 
264 	switch (PCI_VENDOR(pa->pa_id)) {
265 	case PCI_VENDOR_DEC:
266 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 ||
267 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) {
268 			found = 1;
269 			sc->dc_type = DC_TYPE_21143;
270 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
271 			sc->dc_flags |= DC_REDUCED_MII_POLL;
272 			dc_read_srom(sc, sc->dc_romwidth);
273 		}
274 		break;
275 	case PCI_VENDOR_INTEL:
276 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) {
277 			found = 1;
278 			sc->dc_type = DC_TYPE_21145;
279 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
280 			sc->dc_flags |= DC_REDUCED_MII_POLL;
281 			dc_read_srom(sc, sc->dc_romwidth);
282 		}
283 		break;
284 	case PCI_VENDOR_DAVICOM:
285 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 ||
286 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 ||
287 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) {
288 			found = 1;
289 			sc->dc_type = DC_TYPE_DM9102;
290 			sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
291 			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
292 			sc->dc_flags |= DC_TX_ALIGN;
293 			sc->dc_pmode = DC_PMODE_MII;
294 
295 			/* Increase the latency timer value. */
296 			command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT);
297 			command &= 0xFFFF00FF;
298 			command |= 0x00008000;
299 			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command);
300 		}
301 		break;
302 	case PCI_VENDOR_ADMTEK:
303 	case PCI_VENDOR_3COM:
304 	case PCI_VENDOR_MICROSOFT:
305 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) {
306 			found = 1;
307 			sc->dc_type = DC_TYPE_AL981;
308 			sc->dc_flags |= DC_TX_USE_TX_INTR;
309 			sc->dc_flags |= DC_TX_ADMTEK_WAR;
310 			sc->dc_pmode = DC_PMODE_MII;
311 			dc_read_srom(sc, sc->dc_romwidth);
312 		}
313 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_ADM9511 ||
314 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_ADM9513 ||
315 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983 ||
316 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX ||
317 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MICROSOFT_MN130) {
318 			found = 1;
319 			sc->dc_type = DC_TYPE_AN983;
320 			sc->dc_flags |= DC_TX_USE_TX_INTR;
321 			sc->dc_flags |= DC_TX_ADMTEK_WAR;
322 			sc->dc_flags |= DC_64BIT_HASH;
323 			sc->dc_pmode = DC_PMODE_MII;
324 			/* Don't read SROM for - auto-loaded on reset */
325 		}
326 		break;
327 	case PCI_VENDOR_MACRONIX:
328 	case PCI_VENDOR_ACCTON:
329 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) {
330 			found = 1;
331 			sc->dc_type = DC_TYPE_AN983;
332 			sc->dc_flags |= DC_TX_USE_TX_INTR;
333 			sc->dc_flags |= DC_TX_ADMTEK_WAR;
334 			sc->dc_flags |= DC_64BIT_HASH;
335 			sc->dc_pmode = DC_PMODE_MII;
336 			/* Don't read SROM for - auto-loaded on reset */
337 		}
338 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) {
339 			found = 1;
340 			if (sc->dc_revision < DC_REVISION_98713A)
341 				sc->dc_type = DC_TYPE_98713;
342 			if (sc->dc_revision >= DC_REVISION_98713A) {
343 				sc->dc_type = DC_TYPE_98713A;
344 				sc->dc_flags |= DC_21143_NWAY;
345 			}
346 			sc->dc_flags |= DC_REDUCED_MII_POLL;
347 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
348 		}
349 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 ||
350 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) {
351 			found = 1;
352 			if (sc->dc_revision >= DC_REVISION_98715AEC_C &&
353 			    sc->dc_revision < DC_REVISION_98725)
354 				sc->dc_flags |= DC_128BIT_HASH;
355 			sc->dc_type = DC_TYPE_987x5;
356 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
357 			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
358 		}
359 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) {
360 			found = 1;
361 			sc->dc_type = DC_TYPE_987x5;
362 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
363 			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
364 		}
365 		break;
366 	case PCI_VENDOR_COMPEX:
367 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) {
368 			found = 1;
369 			if (sc->dc_revision < DC_REVISION_98713A) {
370 				sc->dc_type = DC_TYPE_98713;
371 				sc->dc_flags |= DC_REDUCED_MII_POLL;
372 			}
373 			if (sc->dc_revision >= DC_REVISION_98713A)
374 				sc->dc_type = DC_TYPE_98713A;
375 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
376 		}
377 		break;
378 	case PCI_VENDOR_LITEON:
379 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) {
380 			found = 1;
381 			sc->dc_type = DC_TYPE_PNICII;
382 			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
383 			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
384 			sc->dc_flags |= DC_128BIT_HASH;
385 		}
386 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) {
387 			found = 1;
388 			sc->dc_type = DC_TYPE_PNIC;
389 			sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS;
390 			sc->dc_flags |= DC_PNIC_RX_BUG_WAR;
391 			sc->dc_pnic_rx_buf = malloc(ETHER_MAX_DIX_LEN * 5, M_DEVBUF,
392 			    M_NOWAIT);
393 			if (sc->dc_pnic_rx_buf == NULL)
394 				panic("dc_pci_attach");
395 			if (sc->dc_revision < DC_REVISION_82C169)
396 				sc->dc_pmode = DC_PMODE_SYM;
397 		}
398 		break;
399 	case PCI_VENDOR_ASIX:
400 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) {
401 			found = 1;
402 			sc->dc_type = DC_TYPE_ASIX;
403 			sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG;
404 			sc->dc_flags |= DC_REDUCED_MII_POLL;
405 			sc->dc_pmode = DC_PMODE_MII;
406 		}
407 		break;
408 	case PCI_VENDOR_CONEXANT:
409 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) {
410 			found = 1;
411 			sc->dc_type = DC_TYPE_CONEXANT;
412 			sc->dc_flags |= DC_TX_INTR_ALWAYS;
413 			sc->dc_flags |= DC_REDUCED_MII_POLL;
414 			sc->dc_pmode = DC_PMODE_MII;
415 			dc_read_srom(sc, sc->dc_romwidth);
416 		}
417 		break;
418 	}
419 	if (found == 0) {
420 		/* This shouldn't happen if probe has done its job... */
421 		printf(": unknown device: %x:%x\n",
422 		    PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
423 		goto fail_2;
424 	}
425 
426 	/* Save the cache line size. */
427 	if (DC_IS_DAVICOM(sc))
428 		sc->dc_cachesize = 0;
429 	else
430 		sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag,
431 		    DC_PCI_CFLT) & 0xFF;
432 
433 	/* Reset the adapter. */
434 	dc_reset(sc);
435 
436 	/* Take 21143 out of snooze mode */
437 	if (DC_IS_INTEL(sc)) {
438 		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
439 		command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
440 		pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command);
441 	}
442 
443 	/*
444 	 * If we discover later (in dc_attach) that we have an
445 	 * MII with no PHY, we need to have the 21143 drive the LEDs.
446 	 * Except there are some systems like the NEC VersaPro NoteBook PC
447 	 * which have no LEDs, and twiddling these bits has adverse effects
448 	 * on them. (I.e. you suddenly can't get a link.)
449 	 *
450 	 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS
451 	 * bit set, else we clear it. Since our dc(4) driver is split into
452 	 * bus-dependent and bus-independent parts, we must do set this bit
453 	 * here while we are able to do PCI configuration reads.
454 	 */
455 	if (DC_IS_INTEL(sc)) {
456 		if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033)
457 			sc->dc_flags |= DC_TULIP_LEDS;
458 	}
459 
460 	/*
461 	 * Try to learn something about the supported media.
462 	 * We know that ASIX and ADMtek and Davicom devices
463 	 * will *always* be using MII media, so that's a no-brainer.
464 	 * The tricky ones are the Macronix/PNIC II and the
465 	 * Intel 21143.
466 	 */
467 	if (DC_IS_INTEL(sc))
468 		dc_parse_21143_srom(sc);
469 	else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) {
470 		if (sc->dc_type == DC_TYPE_98713)
471 			sc->dc_pmode = DC_PMODE_MII;
472 		else
473 			sc->dc_pmode = DC_PMODE_SYM;
474 	} else if (!sc->dc_pmode)
475 		sc->dc_pmode = DC_PMODE_MII;
476 
477 #ifdef __sparc64__
478 	{
479 		extern void myetheraddr(u_char *);
480 
481 		if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address",
482 		    sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
483 			myetheraddr(sc->sc_arpcom.ac_enaddr);
484 		if (sc->sc_arpcom.ac_enaddr[0] == 0x00 &&
485 		    sc->sc_arpcom.ac_enaddr[1] == 0x03 &&
486 		    sc->sc_arpcom.ac_enaddr[2] == 0xcc)
487 			sc->dc_flags |= DC_MOMENCO_BOTCH;
488 		sc->sc_hasmac = 1;
489 	}
490 #endif
491 
492 #ifdef SRM_MEDIA
493 	sc->dc_srm_media = 0;
494 
495 	/* Remember the SRM console media setting */
496 	if (DC_IS_INTEL(sc)) {
497 		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
498 		command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
499 		switch ((command >> 8) & 0xff) {
500 		case 3:
501 			sc->dc_srm_media = IFM_10_T;
502 			break;
503 		case 4:
504 			sc->dc_srm_media = IFM_10_T | IFM_FDX;
505 			break;
506 		case 5:
507 			sc->dc_srm_media = IFM_100_TX;
508 			break;
509 		case 6:
510 			sc->dc_srm_media = IFM_100_TX | IFM_FDX;
511 			break;
512 		}
513 		if (sc->dc_srm_media)
514 			sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER;
515 	}
516 #endif
517 	dc_attach(sc);
518 
519 	return;
520 
521 fail_2:
522 	pci_intr_disestablish(pc, sc->sc_ih);
523 
524 fail_1:
525 	bus_space_unmap(sc->dc_btag, sc->dc_bhandle, size);
526 }
527 
528 struct cfattach dc_pci_ca = {
529 	sizeof(struct dc_softc), dc_pci_match, dc_pci_attach
530 };
531