1 /* $OpenBSD: if_dc_pci.c,v 1.42 2003/10/21 21:48:07 deraadt Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_types.h> 53 54 #ifdef INET 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/ip.h> 59 #include <netinet/if_ether.h> 60 #endif 61 62 #include <net/if_media.h> 63 64 #if NBPFILTER > 0 65 #include <net/bpf.h> 66 #endif 67 68 #include <dev/mii/mii.h> 69 #include <dev/mii/miivar.h> 70 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcivar.h> 73 #include <dev/pci/pcidevs.h> 74 75 #ifdef __sparc64__ 76 #include <dev/ofw/openfirm.h> 77 #endif 78 79 #define DC_USEIOSPACE 80 81 #include <dev/ic/dcreg.h> 82 83 /* 84 * Various supported device vendors/types and their names. 85 */ 86 struct dc_type dc_devs[] = { 87 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 88 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 89 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 }, 90 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 91 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 92 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 93 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 94 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 95 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 96 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 97 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 98 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 99 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 100 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 101 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 102 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 103 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 104 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 }, 105 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX }, 106 { 0, 0 } 107 }; 108 109 int dc_pci_match(struct device *, void *, void *); 110 void dc_pci_attach(struct device *, struct device *, void *); 111 void dc_pci_acpi(struct device *, void *); 112 113 /* 114 * Probe for a 21143 or clone chip. Check the PCI vendor and device 115 * IDs against our list and return a device name if we find a match. 116 */ 117 int 118 dc_pci_match(parent, match, aux) 119 struct device *parent; 120 void *match, *aux; 121 { 122 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 123 struct dc_type *t; 124 125 /* 126 * Support for the 21140 chip is experimental. If it works for you, 127 * that's great. By default, this chip will use de. 128 */ 129 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 130 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 131 return (1); 132 133 /* 134 * The following chip revision doesn't seem to work so well with dc, 135 * so let's have de handle it. (de will return a match of 2) 136 */ 137 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 138 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 139 PCI_REVISION(pa->pa_class) == 0x21) 140 return (1); 141 142 /* 143 * Since dc doesn't fit on the alpha floppy, we want de to win by 144 * default on alpha so that RAMDISK* and GENERIC will use the same 145 * driver. 146 */ 147 for (t = dc_devs; t->dc_vid != 0; t++) { 148 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 149 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 150 #ifdef __alpha__ 151 return (1); 152 #else 153 return (3); 154 #endif 155 } 156 } 157 158 return (0); 159 } 160 161 void dc_pci_acpi(self, aux) 162 struct device *self; 163 void *aux; 164 { 165 struct dc_softc *sc = (struct dc_softc *)self; 166 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 167 pci_chipset_tag_t pc = pa->pa_pc; 168 u_int32_t r, cptr; 169 170 /* Find the location of the capabilities block */ 171 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 172 173 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 174 if (r == 0x01) { 175 176 r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR); 177 if (r & DC_PSTATE_D3) { 178 u_int32_t iobase, membase, irq; 179 180 /* Save important PCI config data. */ 181 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 182 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 183 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 184 185 /* Reset the power state. */ 186 printf("%s: chip is in D%d power mode " 187 "-- setting to D0\n", sc->sc_dev.dv_xname, 188 r & DC_PSTATE_D3); 189 r &= 0xFFFFFFFC; 190 pci_conf_write(pc, pa->pa_tag, cptr + PCI_PMCSR, r); 191 192 /* Restore PCI config data. */ 193 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 194 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 195 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 196 } 197 } 198 return; 199 } 200 201 /* 202 * Attach the interface. Allocate softc structures, do ifmedia 203 * setup and ethernet/BPF attach. 204 */ 205 void dc_pci_attach(parent, self, aux) 206 struct device *parent, *self; 207 void *aux; 208 { 209 int s; 210 const char *intrstr = NULL; 211 u_int32_t command; 212 struct dc_softc *sc = (struct dc_softc *)self; 213 struct pci_attach_args *pa = aux; 214 pci_chipset_tag_t pc = pa->pa_pc; 215 pci_intr_handle_t ih; 216 bus_addr_t iobase; 217 bus_size_t iosize; 218 u_int32_t revision; 219 int found = 0; 220 221 s = splimp(); 222 sc->sc_dmat = pa->pa_dmat; 223 224 /* 225 * Handle power management nonsense. 226 */ 227 dc_pci_acpi(self, aux); 228 229 /* 230 * Map control/status registers. 231 */ 232 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 233 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 234 PCI_COMMAND_MASTER_ENABLE; 235 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 236 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 237 238 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 239 240 #ifdef DC_USEIOSPACE 241 if (!(command & PCI_COMMAND_IO_ENABLE)) { 242 printf(": failed to enable I/O ports\n"); 243 goto fail; 244 } 245 if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) { 246 printf(": can't find I/O space\n"); 247 goto fail; 248 } 249 if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) { 250 printf(": can't map I/O space\n"); 251 goto fail; 252 } 253 sc->dc_btag = pa->pa_iot; 254 #else 255 if (!(command & PCI_COMMAND_MEM_ENABLE)) { 256 printf(": failed to enable memory mapping\n"); 257 goto fail; 258 } 259 if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){ 260 printf(": can't find mem space\n"); 261 goto fail; 262 } 263 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) { 264 printf(": can't map mem space\n"); 265 goto fail; 266 } 267 sc->dc_btag = pa->pa_memt; 268 #endif 269 270 /* Allocate interrupt */ 271 if (pci_intr_map(pa, &ih)) { 272 printf(": couldn't map interrupt\n"); 273 goto fail; 274 } 275 intrstr = pci_intr_string(pc, ih); 276 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 277 self->dv_xname); 278 if (sc->sc_ih == NULL) { 279 printf(": couldn't establish interrupt"); 280 if (intrstr != NULL) 281 printf(" at %s", intrstr); 282 printf("\n"); 283 goto fail; 284 } 285 printf(": %s,", intrstr); 286 287 /* Need this info to decide on a chip type. */ 288 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 289 290 switch (PCI_VENDOR(pa->pa_id)) { 291 case PCI_VENDOR_DEC: 292 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 293 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 294 found = 1; 295 sc->dc_type = DC_TYPE_21143; 296 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 297 sc->dc_flags |= DC_REDUCED_MII_POLL; 298 dc_eeprom_width(sc); 299 dc_read_srom(sc, sc->dc_romwidth); 300 } 301 break; 302 case PCI_VENDOR_INTEL: 303 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) { 304 found = 1; 305 sc->dc_type = DC_TYPE_21145; 306 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 307 sc->dc_flags |= DC_REDUCED_MII_POLL; 308 dc_eeprom_width(sc); 309 dc_read_srom(sc, sc->dc_romwidth); 310 } 311 case PCI_VENDOR_DAVICOM: 312 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 313 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 || 314 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) { 315 found = 1; 316 sc->dc_type = DC_TYPE_DM9102; 317 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 318 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 319 sc->dc_pmode = DC_PMODE_MII; 320 321 /* Increase the latency timer value. */ 322 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 323 command &= 0xFFFF00FF; 324 command |= 0x00008000; 325 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 326 } 327 break; 328 case PCI_VENDOR_3COM: 329 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX) { 330 found = 1; 331 sc->dc_type = DC_TYPE_AN983; 332 sc->dc_flags |= DC_TX_USE_TX_INTR; 333 sc->dc_flags |= DC_TX_ADMTEK_WAR; 334 sc->dc_pmode = DC_PMODE_MII; 335 } 336 dc_eeprom_width(sc); 337 dc_read_srom(sc, sc->dc_romwidth); 338 break; 339 case PCI_VENDOR_ADMTEK: 340 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 341 found = 1; 342 sc->dc_type = DC_TYPE_AL981; 343 sc->dc_flags |= DC_TX_USE_TX_INTR; 344 sc->dc_flags |= DC_TX_ADMTEK_WAR; 345 sc->dc_pmode = DC_PMODE_MII; 346 } 347 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) { 348 found = 1; 349 sc->dc_type = DC_TYPE_AN983; 350 sc->dc_flags |= DC_TX_USE_TX_INTR; 351 sc->dc_flags |= DC_TX_ADMTEK_WAR; 352 sc->dc_flags |= DC_64BIT_HASH; 353 sc->dc_pmode = DC_PMODE_MII; 354 } 355 dc_eeprom_width(sc); 356 dc_read_srom(sc, sc->dc_romwidth); 357 break; 358 case PCI_VENDOR_MACRONIX: 359 case PCI_VENDOR_ACCTON: 360 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 361 found = 1; 362 sc->dc_type = DC_TYPE_AN983; 363 sc->dc_flags |= DC_TX_USE_TX_INTR; 364 sc->dc_flags |= DC_TX_ADMTEK_WAR; 365 sc->dc_pmode = DC_PMODE_MII; 366 367 dc_eeprom_width(sc); 368 dc_read_srom(sc, sc->dc_romwidth); 369 } 370 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 371 found = 1; 372 if (revision < DC_REVISION_98713A) { 373 sc->dc_type = DC_TYPE_98713; 374 } 375 if (revision >= DC_REVISION_98713A) { 376 sc->dc_type = DC_TYPE_98713A; 377 sc->dc_flags |= DC_21143_NWAY; 378 } 379 sc->dc_flags |= DC_REDUCED_MII_POLL; 380 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 381 } 382 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 383 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 384 found = 1; 385 if (revision >= DC_REVISION_98715AEC_C && 386 revision < DC_REVISION_98725) 387 sc->dc_flags |= DC_128BIT_HASH; 388 sc->dc_type = DC_TYPE_987x5; 389 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 390 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 391 } 392 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 393 found = 1; 394 sc->dc_type = DC_TYPE_987x5; 395 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 396 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 397 } 398 break; 399 case PCI_VENDOR_COMPEX: 400 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 401 found = 1; 402 if (revision < DC_REVISION_98713A) { 403 sc->dc_type = DC_TYPE_98713; 404 sc->dc_flags |= DC_REDUCED_MII_POLL; 405 } 406 if (revision >= DC_REVISION_98713A) 407 sc->dc_type = DC_TYPE_98713A; 408 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 409 } 410 break; 411 case PCI_VENDOR_LITEON: 412 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 413 found = 1; 414 sc->dc_type = DC_TYPE_PNICII; 415 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 416 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 417 sc->dc_flags |= DC_128BIT_HASH; 418 } 419 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 420 found = 1; 421 sc->dc_type = DC_TYPE_PNIC; 422 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 423 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 424 sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF, 425 M_NOWAIT); 426 if (sc->dc_pnic_rx_buf == NULL) 427 panic("dc_pci_attach"); 428 if (revision < DC_REVISION_82C169) 429 sc->dc_pmode = DC_PMODE_SYM; 430 } 431 break; 432 case PCI_VENDOR_ASIX: 433 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 434 found = 1; 435 sc->dc_type = DC_TYPE_ASIX; 436 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 437 sc->dc_flags |= DC_REDUCED_MII_POLL; 438 sc->dc_pmode = DC_PMODE_MII; 439 } 440 break; 441 case PCI_VENDOR_CONEXANT: 442 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 443 found = 1; 444 sc->dc_type = DC_TYPE_CONEXANT; 445 sc->dc_flags |= DC_TX_INTR_ALWAYS; 446 sc->dc_flags |= DC_REDUCED_MII_POLL; 447 sc->dc_pmode = DC_PMODE_MII; 448 dc_eeprom_width(sc); 449 dc_read_srom(sc, sc->dc_romwidth); 450 } 451 break; 452 } 453 if (found == 0) { 454 /* This shouldn't happen if probe has done it's job... */ 455 printf(": unknown device: %x:%x\n", 456 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 457 goto fail; 458 } 459 460 /* Save the cache line size. */ 461 if (DC_IS_DAVICOM(sc)) 462 sc->dc_cachesize = 0; 463 else { 464 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 465 DC_PCI_CFLT) & 0xFF; 466 #ifdef __hppa__ 467 sc->dc_cachesize = 16; 468 #endif 469 } 470 471 /* Reset the adapter. */ 472 dc_reset(sc); 473 474 /* Take 21143 out of snooze mode */ 475 if (DC_IS_INTEL(sc)) { 476 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 477 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 478 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 479 } 480 481 /* 482 * If we discover later (in dc_attach) that we have an 483 * MII with no PHY, we need to have the 21143 drive the LEDs. 484 * Except there are some systems like the NEC VersaPro NoteBook PC 485 * which have no LEDs, and twiddling these bits has adverse effects 486 * on them. (I.e. you suddenly can't get a link.) 487 * 488 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 489 * bit set, else we clear it. Since our dc(4) driver is split into 490 * bus-dependent and bus-independent parts, we must do set this bit 491 * here while we are able to do PCI configuration reads. 492 */ 493 if (DC_IS_INTEL(sc)) { 494 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 495 sc->dc_flags |= DC_TULIP_LEDS; 496 } 497 498 /* 499 * Try to learn something about the supported media. 500 * We know that ASIX and ADMtek and Davicom devices 501 * will *always* be using MII media, so that's a no-brainer. 502 * The tricky ones are the Macronix/PNIC II and the 503 * Intel 21143. 504 */ 505 if (DC_IS_INTEL(sc)) 506 dc_parse_21143_srom(sc); 507 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 508 if (sc->dc_type == DC_TYPE_98713) 509 sc->dc_pmode = DC_PMODE_MII; 510 else 511 sc->dc_pmode = DC_PMODE_SYM; 512 } else if (!sc->dc_pmode) 513 sc->dc_pmode = DC_PMODE_MII; 514 515 #ifdef __sparc64__ 516 { 517 extern void myetheraddr(u_char *); 518 519 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 520 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 521 myetheraddr(sc->sc_arpcom.ac_enaddr); 522 if (sc->sc_arpcom.ac_enaddr[0] == 0x00 && 523 sc->sc_arpcom.ac_enaddr[1] == 0x03 && 524 sc->sc_arpcom.ac_enaddr[2] == 0xcc) 525 sc->dc_flags |= DC_MOMENCO_BOTCH; 526 sc->sc_hasmac = 1; 527 } 528 #endif 529 530 #ifdef SRM_MEDIA 531 sc->dc_srm_media = 0; 532 533 /* Remember the SRM console media setting */ 534 if (DC_IS_INTEL(sc)) { 535 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 536 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 537 switch ((command >> 8) & 0xff) { 538 case 3: 539 sc->dc_srm_media = IFM_10_T; 540 break; 541 case 4: 542 sc->dc_srm_media = IFM_10_T | IFM_FDX; 543 break; 544 case 5: 545 sc->dc_srm_media = IFM_100_TX; 546 break; 547 case 6: 548 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 549 break; 550 } 551 if (sc->dc_srm_media) 552 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 553 } 554 #endif 555 dc_eeprom_width(sc); 556 dc_attach(sc); 557 558 fail: 559 splx(s); 560 } 561 562 struct cfattach dc_pci_ca = { 563 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 564 }; 565