1 /* $OpenBSD: if_atw_pci.c,v 1.14 2011/04/03 15:36:02 jasper Exp $ */ 2 /* $NetBSD: if_atw_pci.c,v 1.7 2004/07/23 07:07:55 dyoung Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center; Charles M. Hannum; and David Young. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip. 36 * 37 * Derived from the ``Tulip'' PCI bus front-end. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/socket.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #include <sys/device.h> 49 50 #include <machine/endian.h> 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_media.h> 55 #ifdef INET 56 #include <netinet/in.h> 57 #include <netinet/if_ether.h> 58 #endif 59 60 #include <net80211/ieee80211_radiotap.h> 61 #include <net80211/ieee80211_var.h> 62 63 #include <machine/bus.h> 64 #include <machine/intr.h> 65 66 #include <dev/ic/atwreg.h> 67 #include <dev/ic/rf3000reg.h> 68 #include <dev/ic/si4136reg.h> 69 #include <dev/ic/atwvar.h> 70 71 #include <dev/pci/pcivar.h> 72 #include <dev/pci/pcireg.h> 73 #include <dev/pci/pcidevs.h> 74 75 /* 76 * PCI configuration space registers used by the ADM8211. 77 */ 78 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 79 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 80 81 struct atw_pci_softc { 82 struct atw_softc psc_atw; /* real ADM8211 softc */ 83 84 pci_intr_handle_t psc_ih; /* interrupt handle */ 85 void *psc_intrcookie; 86 87 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 88 pcitag_t psc_pcitag; /* our PCI tag */ 89 }; 90 91 int atw_pci_match(struct device *, void *, void *); 92 void atw_pci_attach(struct device *, struct device *, void *); 93 int atw_pci_detach(struct device *, int); 94 95 struct cfattach atw_pci_ca = { 96 sizeof (struct atw_softc), atw_pci_match, atw_pci_attach, atw_pci_detach, 97 atw_activate 98 }; 99 100 const struct pci_matchid atw_pci_devices[] = { 101 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211 }, 102 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRSHPW796 } 103 }; 104 105 int 106 atw_pci_match(struct device *parent, void *match, void *aux) 107 { 108 return (pci_matchbyid((struct pci_attach_args *)aux, atw_pci_devices, 109 nitems(atw_pci_devices))); 110 } 111 112 static int 113 atw_pci_enable(struct atw_softc *sc) 114 { 115 struct atw_pci_softc *psc = (void *)sc; 116 117 /* Establish the interrupt. */ 118 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 119 IPL_NET, atw_intr, sc, sc->sc_dev.dv_xname); 120 if (psc->psc_intrcookie == NULL) { 121 printf("%s: unable to establish interrupt\n", 122 sc->sc_dev.dv_xname); 123 return (1); 124 } 125 126 return (0); 127 } 128 129 static void 130 atw_pci_disable(struct atw_softc *sc) 131 { 132 struct atw_pci_softc *psc = (void *)sc; 133 134 /* Unhook the interrupt handler. */ 135 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 136 psc->psc_intrcookie = NULL; 137 } 138 139 void 140 atw_pci_attach(struct device *parent, struct device *self, void *aux) 141 { 142 struct atw_pci_softc *psc = (void *) self; 143 struct atw_softc *sc = &psc->psc_atw; 144 struct pci_attach_args *pa = aux; 145 pci_chipset_tag_t pc = pa->pa_pc; 146 const char *intrstr = NULL; 147 bus_space_tag_t iot, memt; 148 bus_space_handle_t ioh, memh; 149 bus_size_t iosize, memsize; 150 int ioh_valid, memh_valid; 151 int state; 152 153 psc->psc_pc = pa->pa_pc; 154 psc->psc_pcitag = pa->pa_tag; 155 156 /* 157 * No power management hooks. 158 * XXX Maybe we should add some! 159 */ 160 sc->sc_flags |= ATWF_ENABLED; 161 162 /* 163 * Get revision info, and set some chip-specific variables. 164 */ 165 sc->sc_rev = PCI_REVISION(pa->pa_class); 166 167 /* 168 * Check to see if the device is in power-save mode, and 169 * being it out if necessary. 170 * 171 * XXX This code comes almost verbatim from if_tlp_pci.c. I do 172 * not understand it. Tulip clears the "sleep mode" bit in the 173 * CFDA register, first. There is an equivalent (?) register at the 174 * same place in the ADM8211, but the docs do not assign its bits 175 * any meanings. -dcy 176 */ 177 state = pci_set_powerstate(pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 178 if (state == PCI_PMCSR_STATE_D3) { 179 /* 180 * The card has lost all configuration data in 181 * this state, so punt. 182 */ 183 printf(": unable to wake up from power state D3, " 184 "reboot required.\n"); 185 return; 186 } 187 188 /* 189 * Map the device. 190 */ 191 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA, 192 PCI_MAPREG_TYPE_IO, 0, 193 &iot, &ioh, NULL, &iosize, 0) == 0); 194 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA, 195 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 196 &memt, &memh, NULL, &memsize, 0) == 0); 197 198 if (memh_valid) { 199 sc->sc_st = memt; 200 sc->sc_sh = memh; 201 sc->sc_mapsize = memsize; 202 } else if (ioh_valid) { 203 sc->sc_st = iot; 204 sc->sc_sh = ioh; 205 sc->sc_mapsize = iosize; 206 } else { 207 printf(": unable to map device registers\n"); 208 return; 209 } 210 211 sc->sc_dmat = pa->pa_dmat; 212 213 /* 214 * Get the cacheline size. 215 */ 216 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 217 PCI_BHLC_REG)); 218 219 /* 220 * Get PCI data moving command info. 221 */ 222 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */ 223 sc->sc_flags |= ATWF_MRL; 224 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */ 225 sc->sc_flags |= ATWF_MRM; 226 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */ 227 sc->sc_flags |= ATWF_MWI; 228 229 /* 230 * Map and establish our interrupt. 231 */ 232 if (pci_intr_map(pa, &psc->psc_ih)) { 233 printf(": unable to map interrupt\n"); 234 return; 235 } 236 intrstr = pci_intr_string(pc, psc->psc_ih); 237 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 238 atw_intr, sc, sc->sc_dev.dv_xname); 239 if (psc->psc_intrcookie == NULL) { 240 printf(": unable to establish interrupt"); 241 if (intrstr != NULL) 242 printf(" at %s", intrstr); 243 printf("\n"); 244 return; 245 } 246 247 printf(": %s\n", intrstr); 248 249 sc->sc_enable = atw_pci_enable; 250 sc->sc_disable = atw_pci_disable; 251 252 /* 253 * Finish off the attach. 254 */ 255 atw_attach(sc); 256 } 257 258 int 259 atw_pci_detach(struct device *self, int flags) 260 { 261 struct atw_pci_softc *psc = (void *)self; 262 struct atw_softc *sc = &psc->psc_atw; 263 int rv; 264 265 rv = atw_detach(sc); 266 if (rv) 267 return (rv); 268 269 if (psc->psc_intrcookie != NULL) 270 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 271 272 bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_mapsize); 273 274 return (0); 275 } 276