1 /* $OpenBSD: r300d.h,v 1.1 2013/08/12 04:11:53 jsg Exp $ */ 2 /* 3 * Copyright 2008 Advanced Micro Devices, Inc. 4 * Copyright 2008 Red Hat Inc. 5 * Copyright 2009 Jerome Glisse. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23 * OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: Dave Airlie 26 * Alex Deucher 27 * Jerome Glisse 28 */ 29 #ifndef __R300D_H__ 30 #define __R300D_H__ 31 32 #define CP_PACKET0 0x00000000 33 #define PACKET0_BASE_INDEX_SHIFT 0 34 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0) 35 #define PACKET0_COUNT_SHIFT 16 36 #define PACKET0_COUNT_MASK (0x3fff << 16) 37 #define CP_PACKET1 0x40000000 38 #define CP_PACKET2 0x80000000 39 #define PACKET2_PAD_SHIFT 0 40 #define PACKET2_PAD_MASK (0x3fffffff << 0) 41 #define CP_PACKET3 0xC0000000 42 #define PACKET3_IT_OPCODE_SHIFT 8 43 #define PACKET3_IT_OPCODE_MASK (0xff << 8) 44 #define PACKET3_COUNT_SHIFT 16 45 #define PACKET3_COUNT_MASK (0x3fff << 16) 46 /* PACKET3 op code */ 47 #define PACKET3_NOP 0x10 48 #define PACKET3_3D_DRAW_VBUF 0x28 49 #define PACKET3_3D_DRAW_IMMD 0x29 50 #define PACKET3_3D_DRAW_INDX 0x2A 51 #define PACKET3_3D_LOAD_VBPNTR 0x2F 52 #define PACKET3_3D_CLEAR_ZMASK 0x32 53 #define PACKET3_INDX_BUFFER 0x33 54 #define PACKET3_3D_DRAW_VBUF_2 0x34 55 #define PACKET3_3D_DRAW_IMMD_2 0x35 56 #define PACKET3_3D_DRAW_INDX_2 0x36 57 #define PACKET3_3D_CLEAR_HIZ 0x37 58 #define PACKET3_3D_CLEAR_CMASK 0x38 59 #define PACKET3_BITBLT_MULTI 0x9B 60 61 #define PACKET0(reg, n) (CP_PACKET0 | \ 62 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \ 63 REG_SET(PACKET0_COUNT, (n))) 64 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) 65 #define PACKET3(op, n) (CP_PACKET3 | \ 66 REG_SET(PACKET3_IT_OPCODE, (op)) | \ 67 REG_SET(PACKET3_COUNT, (n))) 68 69 #define PACKET_TYPE0 0 70 #define PACKET_TYPE1 1 71 #define PACKET_TYPE2 2 72 #define PACKET_TYPE3 3 73 74 #define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3) 75 #define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) 76 #define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2) 77 #define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1) 78 #define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) 79 80 /* Registers */ 81 #define R_000148_MC_FB_LOCATION 0x000148 82 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 83 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 84 #define C_000148_MC_FB_START 0xFFFF0000 85 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 86 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 87 #define C_000148_MC_FB_TOP 0x0000FFFF 88 #define R_00014C_MC_AGP_LOCATION 0x00014C 89 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) 90 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) 91 #define C_00014C_MC_AGP_START 0xFFFF0000 92 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) 93 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) 94 #define C_00014C_MC_AGP_TOP 0x0000FFFF 95 #define R_00015C_AGP_BASE_2 0x00015C 96 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) 97 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) 98 #define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0 99 #define R_000170_AGP_BASE 0x000170 100 #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) 101 #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) 102 #define C_000170_AGP_BASE_ADDR 0x00000000 103 #define R_0007C0_CP_STAT 0x0007C0 104 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 105 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 106 #define C_0007C0_MRU_BUSY 0xFFFFFFFE 107 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 108 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 109 #define C_0007C0_MWU_BUSY 0xFFFFFFFD 110 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 111 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 112 #define C_0007C0_RSIU_BUSY 0xFFFFFFFB 113 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 114 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 115 #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 116 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 117 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 118 #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 119 #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 120 #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 121 #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 122 #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 123 #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 124 #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 125 #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 126 #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 127 #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 128 #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 129 #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 130 #define C_0007C0_CSI_BUSY 0xFFFFDFFF 131 #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 132 #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 133 #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 134 #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 135 #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 136 #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 137 #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 138 #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 139 #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 140 #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 141 #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 142 #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 143 #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 144 #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 145 #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 146 #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 147 #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 148 #define C_0007C0_CP_BUSY 0x7FFFFFFF 149 #define R_000E40_RBBM_STATUS 0x000E40 150 #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 151 #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 152 #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 153 #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 154 #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 155 #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 156 #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 157 #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 158 #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 159 #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 160 #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 161 #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 162 #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 163 #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 164 #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 165 #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 166 #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 167 #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 168 #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 169 #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 170 #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 171 #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 172 #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 173 #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 174 #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 175 #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 176 #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 177 #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 178 #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 179 #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 180 #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 181 #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 182 #define C_000E40_E2_BUSY 0xFFFDFFFF 183 #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 184 #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 185 #define C_000E40_RB2D_BUSY 0xFFFBFFFF 186 #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 187 #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 188 #define C_000E40_RB3D_BUSY 0xFFF7FFFF 189 #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 190 #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 191 #define C_000E40_VAP_BUSY 0xFFEFFFFF 192 #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 193 #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 194 #define C_000E40_RE_BUSY 0xFFDFFFFF 195 #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 196 #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 197 #define C_000E40_TAM_BUSY 0xFFBFFFFF 198 #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 199 #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 200 #define C_000E40_TDM_BUSY 0xFF7FFFFF 201 #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 202 #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 203 #define C_000E40_PB_BUSY 0xFEFFFFFF 204 #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 205 #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 206 #define C_000E40_TIM_BUSY 0xFDFFFFFF 207 #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 208 #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 209 #define C_000E40_GA_BUSY 0xFBFFFFFF 210 #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 211 #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 212 #define C_000E40_CBA2D_BUSY 0xF7FFFFFF 213 #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 214 #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 215 #define C_000E40_GUI_ACTIVE 0x7FFFFFFF 216 #define R_0000F0_RBBM_SOFT_RESET 0x0000F0 217 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 218 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 219 #define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE 220 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 221 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 222 #define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD 223 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 224 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 225 #define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB 226 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 227 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 228 #define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7 229 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 230 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) 231 #define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF 232 #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) 233 #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) 234 #define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF 235 #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) 236 #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) 237 #define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF 238 #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) 239 #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) 240 #define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F 241 #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) 242 #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) 243 #define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF 244 #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) 245 #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) 246 #define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF 247 #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) 248 #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) 249 #define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF 250 #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) 251 #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) 252 #define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF 253 #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) 254 #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) 255 #define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF 256 #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) 257 #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) 258 #define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF 259 #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) 260 #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) 261 #define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF 262 263 #define R_00000D_SCLK_CNTL 0x00000D 264 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) 265 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) 266 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8 267 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 268 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 269 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7 270 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 271 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 272 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF 273 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 274 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 275 #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF 276 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 277 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 278 #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF 279 #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 280 #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) 281 #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F 282 #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) 283 #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) 284 #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF 285 #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) 286 #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) 287 #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF 288 #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) 289 #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) 290 #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF 291 #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) 292 #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) 293 #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF 294 #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) 295 #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) 296 #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF 297 #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) 298 #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) 299 #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF 300 #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) 301 #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) 302 #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF 303 #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) 304 #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) 305 #define C_00000D_FORCE_DISP2 0xFFFF7FFF 306 #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) 307 #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) 308 #define C_00000D_FORCE_CP 0xFFFEFFFF 309 #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) 310 #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) 311 #define C_00000D_FORCE_HDP 0xFFFDFFFF 312 #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) 313 #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) 314 #define C_00000D_FORCE_DISP1 0xFFFBFFFF 315 #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) 316 #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) 317 #define C_00000D_FORCE_TOP 0xFFF7FFFF 318 #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) 319 #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) 320 #define C_00000D_FORCE_E2 0xFFEFFFFF 321 #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) 322 #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) 323 #define C_00000D_FORCE_SE 0xFFDFFFFF 324 #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) 325 #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) 326 #define C_00000D_FORCE_IDCT 0xFFBFFFFF 327 #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) 328 #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) 329 #define C_00000D_FORCE_VIP 0xFF7FFFFF 330 #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) 331 #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) 332 #define C_00000D_FORCE_RE 0xFEFFFFFF 333 #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) 334 #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) 335 #define C_00000D_FORCE_PB 0xFDFFFFFF 336 #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) 337 #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) 338 #define C_00000D_FORCE_TAM 0xFBFFFFFF 339 #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) 340 #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) 341 #define C_00000D_FORCE_TDM 0xF7FFFFFF 342 #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) 343 #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) 344 #define C_00000D_FORCE_RB 0xEFFFFFFF 345 #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) 346 #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) 347 #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF 348 #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) 349 #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) 350 #define C_00000D_FORCE_SUBPIC 0xBFFFFFFF 351 #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) 352 #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) 353 #define C_00000D_FORCE_OV0 0x7FFFFFFF 354 355 #endif 356