xref: /openbsd-src/sys/dev/pci/drm/radeon/atombios_i2c.c (revision c349dbc7938c71a30e13c1be4acc1976165f4630)
11099013bSjsg /*
21099013bSjsg  * Copyright 2011 Advanced Micro Devices, Inc.
31099013bSjsg  *
41099013bSjsg  * Permission is hereby granted, free of charge, to any person obtaining a
51099013bSjsg  * copy of this software and associated documentation files (the "Software"),
61099013bSjsg  * to deal in the Software without restriction, including without limitation
71099013bSjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
81099013bSjsg  * and/or sell copies of the Software, and to permit persons to whom the
91099013bSjsg  * Software is furnished to do so, subject to the following conditions:
101099013bSjsg  *
111099013bSjsg  * The above copyright notice and this permission notice shall be included in
121099013bSjsg  * all copies or substantial portions of the Software.
131099013bSjsg  *
141099013bSjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
151099013bSjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
161099013bSjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
171099013bSjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
181099013bSjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
191099013bSjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
201099013bSjsg  * OTHER DEALINGS IN THE SOFTWARE.
211099013bSjsg  *
221099013bSjsg  * Authors: Alex Deucher
231099013bSjsg  *
241099013bSjsg  */
25*c349dbc7Sjsg 
267f4dd379Sjsg #include <drm/radeon_drm.h>
271099013bSjsg #include "radeon.h"
281099013bSjsg #include "atom.h"
291099013bSjsg 
301099013bSjsg #define TARGET_HW_I2C_CLOCK 50
311099013bSjsg 
321099013bSjsg /* these are a limitation of ProcessI2cChannelTransaction not the hw */
337ccd5a2cSjsg #define ATOM_MAX_HW_I2C_WRITE 3
341099013bSjsg #define ATOM_MAX_HW_I2C_READ  255
351099013bSjsg 
radeon_process_i2c_ch(struct radeon_i2c_chan * chan,u8 slave_addr,u8 flags,u8 * buf,int num)364b6e5ceaSjsg static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
371099013bSjsg 				 u8 slave_addr, u8 flags,
38*c349dbc7Sjsg 				 u8 *buf, int num)
391099013bSjsg {
401099013bSjsg 	struct drm_device *dev = chan->dev;
411099013bSjsg 	struct radeon_device *rdev = dev->dev_private;
421099013bSjsg 	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
431099013bSjsg 	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
441099013bSjsg 	unsigned char *base;
458c777369Sjsg 	u16 out = cpu_to_le16(0);
467ccd5a2cSjsg 	int r = 0;
471099013bSjsg 
481099013bSjsg 	memset(&args, 0, sizeof(args));
491099013bSjsg 
507ccd5a2cSjsg 	mutex_lock(&chan->mutex);
517ccd5a2cSjsg 	mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
527ccd5a2cSjsg 
531099013bSjsg 	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
541099013bSjsg 
551099013bSjsg 	if (flags & HW_I2C_WRITE) {
561099013bSjsg 		if (num > ATOM_MAX_HW_I2C_WRITE) {
577ccd5a2cSjsg 			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
587ccd5a2cSjsg 			r = -EINVAL;
597ccd5a2cSjsg 			goto done;
601099013bSjsg 		}
618c777369Sjsg 		if (buf == NULL)
628c777369Sjsg 			args.ucRegIndex = 0;
638c777369Sjsg 		else
648c777369Sjsg 			args.ucRegIndex = buf[0];
658c777369Sjsg 		if (num)
66185ba948Sjsg 			num--;
678c777369Sjsg 		if (num)
68185ba948Sjsg 			memcpy(&out, &buf[1], num);
691099013bSjsg 		args.lpI2CDataOut = cpu_to_le16(out);
70f3eef2b6Sderaadt 	} else {
717ccd5a2cSjsg 		args.ucRegIndex = 0;
727ccd5a2cSjsg 		args.lpI2CDataOut = 0;
731099013bSjsg 	}
741099013bSjsg 
757ccd5a2cSjsg 	args.ucFlag = flags;
761099013bSjsg 	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
771099013bSjsg 	args.ucTransBytes = num;
781099013bSjsg 	args.ucSlaveAddr = slave_addr << 1;
791099013bSjsg 	args.ucLineNumber = chan->rec.i2c_id;
801099013bSjsg 
817ccd5a2cSjsg 	atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
821099013bSjsg 
831099013bSjsg 	/* error */
841099013bSjsg 	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
851099013bSjsg 		DRM_DEBUG_KMS("hw_i2c error\n");
867ccd5a2cSjsg 		r = -EIO;
877ccd5a2cSjsg 		goto done;
881099013bSjsg 	}
891099013bSjsg 
901099013bSjsg 	if (!(flags & HW_I2C_WRITE))
918270fa34Sjsg 		radeon_atom_copy_swap(buf, base, num, false);
921099013bSjsg 
937ccd5a2cSjsg done:
947ccd5a2cSjsg 	mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
957ccd5a2cSjsg 	mutex_unlock(&chan->mutex);
967ccd5a2cSjsg 
977ccd5a2cSjsg 	return r;
981099013bSjsg }
991099013bSjsg 
radeon_atom_hw_i2c_xfer(struct i2c_adapter * i2c_adap,struct i2c_msg * msgs,int num)1003253c27bSkettenis int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
1011099013bSjsg 			    struct i2c_msg *msgs, int num)
1021099013bSjsg {
1031099013bSjsg 	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
1041099013bSjsg 	struct i2c_msg *p;
1051099013bSjsg 	int i, remaining, current_count, buffer_offset, max_bytes, ret;
1068c777369Sjsg 	u8 flags;
1071099013bSjsg 
1081099013bSjsg 	/* check for bus probe */
1091099013bSjsg 	p = &msgs[0];
1101099013bSjsg 	if ((num == 1) && (p->len == 0)) {
1111099013bSjsg 		ret = radeon_process_i2c_ch(i2c,
1121099013bSjsg 					    p->addr, HW_I2C_WRITE,
1138c777369Sjsg 					    NULL, 0);
1141099013bSjsg 		if (ret)
1151099013bSjsg 			return ret;
1161099013bSjsg 		else
1171099013bSjsg 			return num;
1181099013bSjsg 	}
1191099013bSjsg 
1201099013bSjsg 	for (i = 0; i < num; i++) {
1211099013bSjsg 		p = &msgs[i];
1221099013bSjsg 		remaining = p->len;
1231099013bSjsg 		buffer_offset = 0;
1241099013bSjsg 		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
1251099013bSjsg 		if (p->flags & I2C_M_RD) {
1261099013bSjsg 			max_bytes = ATOM_MAX_HW_I2C_READ;
1271099013bSjsg 			flags = HW_I2C_READ;
1281099013bSjsg 		} else {
1291099013bSjsg 			max_bytes = ATOM_MAX_HW_I2C_WRITE;
1301099013bSjsg 			flags = HW_I2C_WRITE;
1311099013bSjsg 		}
1321099013bSjsg 		while (remaining) {
1331099013bSjsg 			if (remaining > max_bytes)
1341099013bSjsg 				current_count = max_bytes;
1351099013bSjsg 			else
1361099013bSjsg 				current_count = remaining;
1371099013bSjsg 			ret = radeon_process_i2c_ch(i2c,
1381099013bSjsg 						    p->addr, flags,
1391099013bSjsg 						    &p->buf[buffer_offset], current_count);
1401099013bSjsg 			if (ret)
1411099013bSjsg 				return ret;
1421099013bSjsg 			remaining -= current_count;
1431099013bSjsg 			buffer_offset += current_count;
1441099013bSjsg 		}
1451099013bSjsg 	}
1461099013bSjsg 
1471099013bSjsg 	return num;
1481099013bSjsg }
1491099013bSjsg 
radeon_atom_hw_i2c_func(struct i2c_adapter * adap)1503253c27bSkettenis u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
1511099013bSjsg {
1521099013bSjsg 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
1531099013bSjsg }
1547ccd5a2cSjsg 
155