1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/dma-fence.h> 29 #include <linux/completion.h> 30 #include <linux/xarray.h> 31 #include <linux/workqueue.h> 32 33 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 34 35 /** 36 * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining 37 * 38 * Setting this flag on a scheduler fence prevents pipelining of jobs depending 39 * on this fence. In other words we always insert a full CPU round trip before 40 * dependen jobs are pushed to the hw queue. 41 */ 42 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS 43 44 struct drm_gem_object; 45 46 struct drm_gpu_scheduler; 47 struct drm_sched_rq; 48 49 /* These are often used as an (initial) index 50 * to an array, and as such should start at 0. 51 */ 52 enum drm_sched_priority { 53 DRM_SCHED_PRIORITY_MIN, 54 DRM_SCHED_PRIORITY_NORMAL, 55 DRM_SCHED_PRIORITY_HIGH, 56 DRM_SCHED_PRIORITY_KERNEL, 57 58 DRM_SCHED_PRIORITY_COUNT, 59 DRM_SCHED_PRIORITY_UNSET = -2 60 }; 61 62 /** 63 * struct drm_sched_entity - A wrapper around a job queue (typically 64 * attached to the DRM file_priv). 65 * 66 * Entities will emit jobs in order to their corresponding hardware 67 * ring, and the scheduler will alternate between entities based on 68 * scheduling policy. 69 */ 70 struct drm_sched_entity { 71 /** 72 * @list: 73 * 74 * Used to append this struct to the list of entities in the runqueue 75 * @rq under &drm_sched_rq.entities. 76 * 77 * Protected by &drm_sched_rq.lock of @rq. 78 */ 79 struct list_head list; 80 81 /** 82 * @rq: 83 * 84 * Runqueue on which this entity is currently scheduled. 85 * 86 * FIXME: Locking is very unclear for this. Writers are protected by 87 * @rq_lock, but readers are generally lockless and seem to just race 88 * with not even a READ_ONCE. 89 */ 90 struct drm_sched_rq *rq; 91 92 /** 93 * @sched_list: 94 * 95 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can 96 * be scheduled on any scheduler on this list. 97 * 98 * This can be modified by calling drm_sched_entity_modify_sched(). 99 * Locking is entirely up to the driver, see the above function for more 100 * details. 101 * 102 * This will be set to NULL if &num_sched_list equals 1 and @rq has been 103 * set already. 104 * 105 * FIXME: This means priority changes through 106 * drm_sched_entity_set_priority() will be lost henceforth in this case. 107 */ 108 struct drm_gpu_scheduler **sched_list; 109 110 /** 111 * @num_sched_list: 112 * 113 * Number of drm_gpu_schedulers in the @sched_list. 114 */ 115 unsigned int num_sched_list; 116 117 /** 118 * @priority: 119 * 120 * Priority of the entity. This can be modified by calling 121 * drm_sched_entity_set_priority(). Protected by &rq_lock. 122 */ 123 enum drm_sched_priority priority; 124 125 /** 126 * @rq_lock: 127 * 128 * Lock to modify the runqueue to which this entity belongs. 129 */ 130 spinlock_t rq_lock; 131 132 /** 133 * @job_queue: the list of jobs of this entity. 134 */ 135 struct spsc_queue job_queue; 136 137 /** 138 * @fence_seq: 139 * 140 * A linearly increasing seqno incremented with each new 141 * &drm_sched_fence which is part of the entity. 142 * 143 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking, 144 * this doesn't need to be atomic. 145 */ 146 atomic_t fence_seq; 147 148 /** 149 * @fence_context: 150 * 151 * A unique context for all the fences which belong to this entity. The 152 * &drm_sched_fence.scheduled uses the fence_context but 153 * &drm_sched_fence.finished uses fence_context + 1. 154 */ 155 uint64_t fence_context; 156 157 /** 158 * @dependency: 159 * 160 * The dependency fence of the job which is on the top of the job queue. 161 */ 162 struct dma_fence *dependency; 163 164 /** 165 * @cb: 166 * 167 * Callback for the dependency fence above. 168 */ 169 struct dma_fence_cb cb; 170 171 /** 172 * @guilty: 173 * 174 * Points to entities' guilty. 175 */ 176 atomic_t *guilty; 177 178 /** 179 * @last_scheduled: 180 * 181 * Points to the finished fence of the last scheduled job. Only written 182 * by the scheduler thread, can be accessed locklessly from 183 * drm_sched_job_arm() iff the queue is empty. 184 */ 185 struct dma_fence *last_scheduled; 186 187 /** 188 * @last_user: last group leader pushing a job into the entity. 189 */ 190 #ifdef __linux__ 191 struct task_struct *last_user; 192 #else 193 struct process *last_user; 194 #endif 195 196 /** 197 * @stopped: 198 * 199 * Marks the enity as removed from rq and destined for 200 * termination. This is set by calling drm_sched_entity_flush() and by 201 * drm_sched_fini(). 202 */ 203 bool stopped; 204 205 /** 206 * @entity_idle: 207 * 208 * Signals when entity is not in use, used to sequence entity cleanup in 209 * drm_sched_entity_fini(). 210 */ 211 struct completion entity_idle; 212 }; 213 214 /** 215 * struct drm_sched_rq - queue of entities to be scheduled. 216 * 217 * @lock: to modify the entities list. 218 * @sched: the scheduler to which this rq belongs to. 219 * @entities: list of the entities to be scheduled. 220 * @current_entity: the entity which is to be scheduled. 221 * 222 * Run queue is a set of entities scheduling command submissions for 223 * one specific ring. It implements the scheduling policy that selects 224 * the next entity to emit commands from. 225 */ 226 struct drm_sched_rq { 227 spinlock_t lock; 228 struct drm_gpu_scheduler *sched; 229 struct list_head entities; 230 struct drm_sched_entity *current_entity; 231 }; 232 233 /** 234 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 235 */ 236 struct drm_sched_fence { 237 /** 238 * @scheduled: this fence is what will be signaled by the scheduler 239 * when the job is scheduled. 240 */ 241 struct dma_fence scheduled; 242 243 /** 244 * @finished: this fence is what will be signaled by the scheduler 245 * when the job is completed. 246 * 247 * When setting up an out fence for the job, you should use 248 * this, since it's available immediately upon 249 * drm_sched_job_init(), and the fence returned by the driver 250 * from run_job() won't be created until the dependencies have 251 * resolved. 252 */ 253 struct dma_fence finished; 254 255 /** 256 * @parent: the fence returned by &drm_sched_backend_ops.run_job 257 * when scheduling the job on hardware. We signal the 258 * &drm_sched_fence.finished fence once parent is signalled. 259 */ 260 struct dma_fence *parent; 261 /** 262 * @sched: the scheduler instance to which the job having this struct 263 * belongs to. 264 */ 265 struct drm_gpu_scheduler *sched; 266 /** 267 * @lock: the lock used by the scheduled and the finished fences. 268 */ 269 spinlock_t lock; 270 /** 271 * @owner: job owner for debugging 272 */ 273 void *owner; 274 }; 275 276 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 277 278 /** 279 * struct drm_sched_job - A job to be run by an entity. 280 * 281 * @queue_node: used to append this struct to the queue of jobs in an entity. 282 * @list: a job participates in a "pending" and "done" lists. 283 * @sched: the scheduler instance on which this job is scheduled. 284 * @s_fence: contains the fences for the scheduling of job. 285 * @finish_cb: the callback for the finished fence. 286 * @work: Helper to reschdeule job kill to different context. 287 * @id: a unique id assigned to each job scheduled on the scheduler. 288 * @karma: increment on every hang caused by this job. If this exceeds the hang 289 * limit of the scheduler then the job is marked guilty and will not 290 * be scheduled further. 291 * @s_priority: the priority of the job. 292 * @entity: the entity to which this job belongs. 293 * @cb: the callback for the parent fence in s_fence. 294 * 295 * A job is created by the driver using drm_sched_job_init(), and 296 * should call drm_sched_entity_push_job() once it wants the scheduler 297 * to schedule the job. 298 */ 299 struct drm_sched_job { 300 struct spsc_node queue_node; 301 struct list_head list; 302 struct drm_gpu_scheduler *sched; 303 struct drm_sched_fence *s_fence; 304 305 /* 306 * work is used only after finish_cb has been used and will not be 307 * accessed anymore. 308 */ 309 union { 310 struct dma_fence_cb finish_cb; 311 struct work_struct work; 312 }; 313 314 uint64_t id; 315 atomic_t karma; 316 enum drm_sched_priority s_priority; 317 struct drm_sched_entity *entity; 318 struct dma_fence_cb cb; 319 /** 320 * @dependencies: 321 * 322 * Contains the dependencies as struct dma_fence for this job, see 323 * drm_sched_job_add_dependency() and 324 * drm_sched_job_add_implicit_dependencies(). 325 */ 326 struct xarray dependencies; 327 328 /** @last_dependency: tracks @dependencies as they signal */ 329 unsigned long last_dependency; 330 }; 331 332 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 333 int threshold) 334 { 335 return s_job && atomic_inc_return(&s_job->karma) > threshold; 336 } 337 338 enum drm_gpu_sched_stat { 339 DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */ 340 DRM_GPU_SCHED_STAT_NOMINAL, 341 DRM_GPU_SCHED_STAT_ENODEV, 342 }; 343 344 /** 345 * struct drm_sched_backend_ops - Define the backend operations 346 * called by the scheduler 347 * 348 * These functions should be implemented in the driver side. 349 */ 350 struct drm_sched_backend_ops { 351 /** 352 * @dependency: 353 * 354 * Called when the scheduler is considering scheduling this job next, to 355 * get another struct dma_fence for this job to block on. Once it 356 * returns NULL, run_job() may be called. 357 * 358 * If a driver exclusively uses drm_sched_job_add_dependency() and 359 * drm_sched_job_add_implicit_dependencies() this can be ommitted and 360 * left as NULL. 361 */ 362 struct dma_fence *(*dependency)(struct drm_sched_job *sched_job, 363 struct drm_sched_entity *s_entity); 364 365 /** 366 * @run_job: Called to execute the job once all of the dependencies 367 * have been resolved. This may be called multiple times, if 368 * timedout_job() has happened and drm_sched_job_recovery() 369 * decides to try it again. 370 */ 371 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 372 373 /** 374 * @timedout_job: Called when a job has taken too long to execute, 375 * to trigger GPU recovery. 376 * 377 * This method is called in a workqueue context. 378 * 379 * Drivers typically issue a reset to recover from GPU hangs, and this 380 * procedure usually follows the following workflow: 381 * 382 * 1. Stop the scheduler using drm_sched_stop(). This will park the 383 * scheduler thread and cancel the timeout work, guaranteeing that 384 * nothing is queued while we reset the hardware queue 385 * 2. Try to gracefully stop non-faulty jobs (optional) 386 * 3. Issue a GPU reset (driver-specific) 387 * 4. Re-submit jobs using drm_sched_resubmit_jobs() 388 * 5. Restart the scheduler using drm_sched_start(). At that point, new 389 * jobs can be queued, and the scheduler thread is unblocked 390 * 391 * Note that some GPUs have distinct hardware queues but need to reset 392 * the GPU globally, which requires extra synchronization between the 393 * timeout handler of the different &drm_gpu_scheduler. One way to 394 * achieve this synchronization is to create an ordered workqueue 395 * (using alloc_ordered_workqueue()) at the driver level, and pass this 396 * queue to drm_sched_init(), to guarantee that timeout handlers are 397 * executed sequentially. The above workflow needs to be slightly 398 * adjusted in that case: 399 * 400 * 1. Stop all schedulers impacted by the reset using drm_sched_stop() 401 * 2. Try to gracefully stop non-faulty jobs on all queues impacted by 402 * the reset (optional) 403 * 3. Issue a GPU reset on all faulty queues (driver-specific) 404 * 4. Re-submit jobs on all schedulers impacted by the reset using 405 * drm_sched_resubmit_jobs() 406 * 5. Restart all schedulers that were stopped in step #1 using 407 * drm_sched_start() 408 * 409 * Return DRM_GPU_SCHED_STAT_NOMINAL, when all is normal, 410 * and the underlying driver has started or completed recovery. 411 * 412 * Return DRM_GPU_SCHED_STAT_ENODEV, if the device is no longer 413 * available, i.e. has been unplugged. 414 */ 415 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job); 416 417 /** 418 * @free_job: Called once the job's finished fence has been signaled 419 * and it's time to clean it up. 420 */ 421 void (*free_job)(struct drm_sched_job *sched_job); 422 }; 423 424 /** 425 * struct drm_gpu_scheduler - scheduler instance-specific data 426 * 427 * @ops: backend operations provided by the driver. 428 * @hw_submission_limit: the max size of the hardware queue. 429 * @timeout: the time after which a job is removed from the scheduler. 430 * @name: name of the ring for which this scheduler is being used. 431 * @sched_rq: priority wise array of run queues. 432 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job 433 * is ready to be scheduled. 434 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler 435 * waits on this wait queue until all the scheduled jobs are 436 * finished. 437 * @hw_rq_count: the number of jobs currently in the hardware queue. 438 * @job_id_count: used to assign unique id to the each job. 439 * @timeout_wq: workqueue used to queue @work_tdr 440 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the 441 * timeout interval is over. 442 * @thread: the kthread on which the scheduler which run. 443 * @pending_list: the list of jobs which are currently in the job queue. 444 * @job_list_lock: lock to protect the pending_list. 445 * @hang_limit: once the hangs by a job crosses this limit then it is marked 446 * guilty and it will no longer be considered for scheduling. 447 * @score: score to help loadbalancer pick a idle sched 448 * @_score: score used when the driver doesn't provide one 449 * @ready: marks if the underlying HW is ready to work 450 * @free_guilty: A hit to time out handler to free the guilty job. 451 * @dev: system &struct device 452 * 453 * One scheduler is implemented for each hardware ring. 454 */ 455 struct drm_gpu_scheduler { 456 const struct drm_sched_backend_ops *ops; 457 uint32_t hw_submission_limit; 458 long timeout; 459 const char *name; 460 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT]; 461 wait_queue_head_t wake_up_worker; 462 wait_queue_head_t job_scheduled; 463 atomic_t hw_rq_count; 464 atomic64_t job_id_count; 465 struct workqueue_struct *timeout_wq; 466 struct delayed_work work_tdr; 467 #ifdef __linux__ 468 struct task_struct *thread; 469 #else 470 struct proc *thread; 471 #endif 472 struct list_head pending_list; 473 spinlock_t job_list_lock; 474 int hang_limit; 475 atomic_t *score; 476 atomic_t _score; 477 bool ready; 478 bool free_guilty; 479 struct device *dev; 480 }; 481 482 int drm_sched_init(struct drm_gpu_scheduler *sched, 483 const struct drm_sched_backend_ops *ops, 484 uint32_t hw_submission, unsigned hang_limit, 485 long timeout, struct workqueue_struct *timeout_wq, 486 atomic_t *score, const char *name, struct device *dev); 487 488 void drm_sched_fini(struct drm_gpu_scheduler *sched); 489 int drm_sched_job_init(struct drm_sched_job *job, 490 struct drm_sched_entity *entity, 491 void *owner); 492 void drm_sched_job_arm(struct drm_sched_job *job); 493 int drm_sched_job_add_dependency(struct drm_sched_job *job, 494 struct dma_fence *fence); 495 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job, 496 struct drm_gem_object *obj, 497 bool write); 498 499 500 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity, 501 struct drm_gpu_scheduler **sched_list, 502 unsigned int num_sched_list); 503 504 void drm_sched_job_cleanup(struct drm_sched_job *job); 505 void drm_sched_wakeup(struct drm_gpu_scheduler *sched); 506 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad); 507 void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery); 508 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched); 509 void drm_sched_resubmit_jobs_ext(struct drm_gpu_scheduler *sched, int max); 510 void drm_sched_increase_karma(struct drm_sched_job *bad); 511 void drm_sched_reset_karma(struct drm_sched_job *bad); 512 void drm_sched_increase_karma_ext(struct drm_sched_job *bad, int type); 513 bool drm_sched_dependency_optimized(struct dma_fence* fence, 514 struct drm_sched_entity *entity); 515 void drm_sched_fault(struct drm_gpu_scheduler *sched); 516 void drm_sched_job_kickout(struct drm_sched_job *s_job); 517 518 void drm_sched_rq_add_entity(struct drm_sched_rq *rq, 519 struct drm_sched_entity *entity); 520 void drm_sched_rq_remove_entity(struct drm_sched_rq *rq, 521 struct drm_sched_entity *entity); 522 523 int drm_sched_entity_init(struct drm_sched_entity *entity, 524 enum drm_sched_priority priority, 525 struct drm_gpu_scheduler **sched_list, 526 unsigned int num_sched_list, 527 atomic_t *guilty); 528 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 529 void drm_sched_entity_fini(struct drm_sched_entity *entity); 530 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 531 void drm_sched_entity_select_rq(struct drm_sched_entity *entity); 532 struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity); 533 void drm_sched_entity_push_job(struct drm_sched_job *sched_job); 534 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 535 enum drm_sched_priority priority); 536 bool drm_sched_entity_is_ready(struct drm_sched_entity *entity); 537 538 struct drm_sched_fence *drm_sched_fence_alloc( 539 struct drm_sched_entity *s_entity, void *owner); 540 void drm_sched_fence_init(struct drm_sched_fence *fence, 541 struct drm_sched_entity *entity); 542 void drm_sched_fence_free(struct drm_sched_fence *fence); 543 544 void drm_sched_fence_scheduled(struct drm_sched_fence *fence); 545 void drm_sched_fence_finished(struct drm_sched_fence *fence); 546 547 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched); 548 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched, 549 unsigned long remaining); 550 struct drm_gpu_scheduler * 551 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list, 552 unsigned int num_sched_list); 553 554 #endif 555