1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/dma-fence.h> 29 #include <linux/completion.h> 30 #include <linux/xarray.h> 31 #include <linux/workqueue.h> 32 33 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 34 35 /** 36 * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining 37 * 38 * Setting this flag on a scheduler fence prevents pipelining of jobs depending 39 * on this fence. In other words we always insert a full CPU round trip before 40 * dependen jobs are pushed to the hw queue. 41 */ 42 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS 43 44 struct drm_gem_object; 45 46 struct drm_gpu_scheduler; 47 struct drm_sched_rq; 48 49 /* These are often used as an (initial) index 50 * to an array, and as such should start at 0. 51 */ 52 enum drm_sched_priority { 53 DRM_SCHED_PRIORITY_MIN, 54 DRM_SCHED_PRIORITY_NORMAL, 55 DRM_SCHED_PRIORITY_HIGH, 56 DRM_SCHED_PRIORITY_KERNEL, 57 58 DRM_SCHED_PRIORITY_COUNT 59 }; 60 61 /** 62 * struct drm_sched_entity - A wrapper around a job queue (typically 63 * attached to the DRM file_priv). 64 * 65 * Entities will emit jobs in order to their corresponding hardware 66 * ring, and the scheduler will alternate between entities based on 67 * scheduling policy. 68 */ 69 struct drm_sched_entity { 70 /** 71 * @list: 72 * 73 * Used to append this struct to the list of entities in the runqueue 74 * @rq under &drm_sched_rq.entities. 75 * 76 * Protected by &drm_sched_rq.lock of @rq. 77 */ 78 struct list_head list; 79 80 /** 81 * @rq: 82 * 83 * Runqueue on which this entity is currently scheduled. 84 * 85 * FIXME: Locking is very unclear for this. Writers are protected by 86 * @rq_lock, but readers are generally lockless and seem to just race 87 * with not even a READ_ONCE. 88 */ 89 struct drm_sched_rq *rq; 90 91 /** 92 * @sched_list: 93 * 94 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can 95 * be scheduled on any scheduler on this list. 96 * 97 * This can be modified by calling drm_sched_entity_modify_sched(). 98 * Locking is entirely up to the driver, see the above function for more 99 * details. 100 * 101 * This will be set to NULL if &num_sched_list equals 1 and @rq has been 102 * set already. 103 * 104 * FIXME: This means priority changes through 105 * drm_sched_entity_set_priority() will be lost henceforth in this case. 106 */ 107 struct drm_gpu_scheduler **sched_list; 108 109 /** 110 * @num_sched_list: 111 * 112 * Number of drm_gpu_schedulers in the @sched_list. 113 */ 114 unsigned int num_sched_list; 115 116 /** 117 * @priority: 118 * 119 * Priority of the entity. This can be modified by calling 120 * drm_sched_entity_set_priority(). Protected by &rq_lock. 121 */ 122 enum drm_sched_priority priority; 123 124 /** 125 * @rq_lock: 126 * 127 * Lock to modify the runqueue to which this entity belongs. 128 */ 129 spinlock_t rq_lock; 130 131 /** 132 * @job_queue: the list of jobs of this entity. 133 */ 134 struct spsc_queue job_queue; 135 136 /** 137 * @fence_seq: 138 * 139 * A linearly increasing seqno incremented with each new 140 * &drm_sched_fence which is part of the entity. 141 * 142 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking, 143 * this doesn't need to be atomic. 144 */ 145 atomic_t fence_seq; 146 147 /** 148 * @fence_context: 149 * 150 * A unique context for all the fences which belong to this entity. The 151 * &drm_sched_fence.scheduled uses the fence_context but 152 * &drm_sched_fence.finished uses fence_context + 1. 153 */ 154 uint64_t fence_context; 155 156 /** 157 * @dependency: 158 * 159 * The dependency fence of the job which is on the top of the job queue. 160 */ 161 struct dma_fence *dependency; 162 163 /** 164 * @cb: 165 * 166 * Callback for the dependency fence above. 167 */ 168 struct dma_fence_cb cb; 169 170 /** 171 * @guilty: 172 * 173 * Points to entities' guilty. 174 */ 175 atomic_t *guilty; 176 177 /** 178 * @last_scheduled: 179 * 180 * Points to the finished fence of the last scheduled job. Only written 181 * by the scheduler thread, can be accessed locklessly from 182 * drm_sched_job_arm() iff the queue is empty. 183 */ 184 struct dma_fence *last_scheduled; 185 186 /** 187 * @last_user: last group leader pushing a job into the entity. 188 */ 189 #ifdef __linux__ 190 struct task_struct *last_user; 191 #else 192 struct process *last_user; 193 #endif 194 195 /** 196 * @stopped: 197 * 198 * Marks the enity as removed from rq and destined for 199 * termination. This is set by calling drm_sched_entity_flush() and by 200 * drm_sched_fini(). 201 */ 202 bool stopped; 203 204 /** 205 * @entity_idle: 206 * 207 * Signals when entity is not in use, used to sequence entity cleanup in 208 * drm_sched_entity_fini(). 209 */ 210 struct completion entity_idle; 211 }; 212 213 /** 214 * struct drm_sched_rq - queue of entities to be scheduled. 215 * 216 * @lock: to modify the entities list. 217 * @sched: the scheduler to which this rq belongs to. 218 * @entities: list of the entities to be scheduled. 219 * @current_entity: the entity which is to be scheduled. 220 * 221 * Run queue is a set of entities scheduling command submissions for 222 * one specific ring. It implements the scheduling policy that selects 223 * the next entity to emit commands from. 224 */ 225 struct drm_sched_rq { 226 spinlock_t lock; 227 struct drm_gpu_scheduler *sched; 228 struct list_head entities; 229 struct drm_sched_entity *current_entity; 230 }; 231 232 /** 233 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 234 */ 235 struct drm_sched_fence { 236 /** 237 * @scheduled: this fence is what will be signaled by the scheduler 238 * when the job is scheduled. 239 */ 240 struct dma_fence scheduled; 241 242 /** 243 * @finished: this fence is what will be signaled by the scheduler 244 * when the job is completed. 245 * 246 * When setting up an out fence for the job, you should use 247 * this, since it's available immediately upon 248 * drm_sched_job_init(), and the fence returned by the driver 249 * from run_job() won't be created until the dependencies have 250 * resolved. 251 */ 252 struct dma_fence finished; 253 254 /** 255 * @parent: the fence returned by &drm_sched_backend_ops.run_job 256 * when scheduling the job on hardware. We signal the 257 * &drm_sched_fence.finished fence once parent is signalled. 258 */ 259 struct dma_fence *parent; 260 /** 261 * @sched: the scheduler instance to which the job having this struct 262 * belongs to. 263 */ 264 struct drm_gpu_scheduler *sched; 265 /** 266 * @lock: the lock used by the scheduled and the finished fences. 267 */ 268 spinlock_t lock; 269 /** 270 * @owner: job owner for debugging 271 */ 272 void *owner; 273 }; 274 275 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 276 277 /** 278 * struct drm_sched_job - A job to be run by an entity. 279 * 280 * @queue_node: used to append this struct to the queue of jobs in an entity. 281 * @list: a job participates in a "pending" and "done" lists. 282 * @sched: the scheduler instance on which this job is scheduled. 283 * @s_fence: contains the fences for the scheduling of job. 284 * @finish_cb: the callback for the finished fence. 285 * @work: Helper to reschdeule job kill to different context. 286 * @id: a unique id assigned to each job scheduled on the scheduler. 287 * @karma: increment on every hang caused by this job. If this exceeds the hang 288 * limit of the scheduler then the job is marked guilty and will not 289 * be scheduled further. 290 * @s_priority: the priority of the job. 291 * @entity: the entity to which this job belongs. 292 * @cb: the callback for the parent fence in s_fence. 293 * 294 * A job is created by the driver using drm_sched_job_init(), and 295 * should call drm_sched_entity_push_job() once it wants the scheduler 296 * to schedule the job. 297 */ 298 struct drm_sched_job { 299 struct spsc_node queue_node; 300 struct list_head list; 301 struct drm_gpu_scheduler *sched; 302 struct drm_sched_fence *s_fence; 303 304 /* 305 * work is used only after finish_cb has been used and will not be 306 * accessed anymore. 307 */ 308 union { 309 struct dma_fence_cb finish_cb; 310 struct work_struct work; 311 }; 312 313 uint64_t id; 314 atomic_t karma; 315 enum drm_sched_priority s_priority; 316 struct drm_sched_entity *entity; 317 struct dma_fence_cb cb; 318 /** 319 * @dependencies: 320 * 321 * Contains the dependencies as struct dma_fence for this job, see 322 * drm_sched_job_add_dependency() and 323 * drm_sched_job_add_implicit_dependencies(). 324 */ 325 struct xarray dependencies; 326 327 /** @last_dependency: tracks @dependencies as they signal */ 328 unsigned long last_dependency; 329 }; 330 331 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 332 int threshold) 333 { 334 return s_job && atomic_inc_return(&s_job->karma) > threshold; 335 } 336 337 enum drm_gpu_sched_stat { 338 DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */ 339 DRM_GPU_SCHED_STAT_NOMINAL, 340 DRM_GPU_SCHED_STAT_ENODEV, 341 }; 342 343 /** 344 * struct drm_sched_backend_ops - Define the backend operations 345 * called by the scheduler 346 * 347 * These functions should be implemented in the driver side. 348 */ 349 struct drm_sched_backend_ops { 350 /** 351 * @dependency: 352 * 353 * Called when the scheduler is considering scheduling this job next, to 354 * get another struct dma_fence for this job to block on. Once it 355 * returns NULL, run_job() may be called. 356 * 357 * If a driver exclusively uses drm_sched_job_add_dependency() and 358 * drm_sched_job_add_implicit_dependencies() this can be ommitted and 359 * left as NULL. 360 */ 361 struct dma_fence *(*dependency)(struct drm_sched_job *sched_job, 362 struct drm_sched_entity *s_entity); 363 364 /** 365 * @run_job: Called to execute the job once all of the dependencies 366 * have been resolved. This may be called multiple times, if 367 * timedout_job() has happened and drm_sched_job_recovery() 368 * decides to try it again. 369 */ 370 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 371 372 /** 373 * @timedout_job: Called when a job has taken too long to execute, 374 * to trigger GPU recovery. 375 * 376 * This method is called in a workqueue context. 377 * 378 * Drivers typically issue a reset to recover from GPU hangs, and this 379 * procedure usually follows the following workflow: 380 * 381 * 1. Stop the scheduler using drm_sched_stop(). This will park the 382 * scheduler thread and cancel the timeout work, guaranteeing that 383 * nothing is queued while we reset the hardware queue 384 * 2. Try to gracefully stop non-faulty jobs (optional) 385 * 3. Issue a GPU reset (driver-specific) 386 * 4. Re-submit jobs using drm_sched_resubmit_jobs() 387 * 5. Restart the scheduler using drm_sched_start(). At that point, new 388 * jobs can be queued, and the scheduler thread is unblocked 389 * 390 * Note that some GPUs have distinct hardware queues but need to reset 391 * the GPU globally, which requires extra synchronization between the 392 * timeout handler of the different &drm_gpu_scheduler. One way to 393 * achieve this synchronization is to create an ordered workqueue 394 * (using alloc_ordered_workqueue()) at the driver level, and pass this 395 * queue to drm_sched_init(), to guarantee that timeout handlers are 396 * executed sequentially. The above workflow needs to be slightly 397 * adjusted in that case: 398 * 399 * 1. Stop all schedulers impacted by the reset using drm_sched_stop() 400 * 2. Try to gracefully stop non-faulty jobs on all queues impacted by 401 * the reset (optional) 402 * 3. Issue a GPU reset on all faulty queues (driver-specific) 403 * 4. Re-submit jobs on all schedulers impacted by the reset using 404 * drm_sched_resubmit_jobs() 405 * 5. Restart all schedulers that were stopped in step #1 using 406 * drm_sched_start() 407 * 408 * Return DRM_GPU_SCHED_STAT_NOMINAL, when all is normal, 409 * and the underlying driver has started or completed recovery. 410 * 411 * Return DRM_GPU_SCHED_STAT_ENODEV, if the device is no longer 412 * available, i.e. has been unplugged. 413 */ 414 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job); 415 416 /** 417 * @free_job: Called once the job's finished fence has been signaled 418 * and it's time to clean it up. 419 */ 420 void (*free_job)(struct drm_sched_job *sched_job); 421 }; 422 423 /** 424 * struct drm_gpu_scheduler - scheduler instance-specific data 425 * 426 * @ops: backend operations provided by the driver. 427 * @hw_submission_limit: the max size of the hardware queue. 428 * @timeout: the time after which a job is removed from the scheduler. 429 * @name: name of the ring for which this scheduler is being used. 430 * @sched_rq: priority wise array of run queues. 431 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job 432 * is ready to be scheduled. 433 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler 434 * waits on this wait queue until all the scheduled jobs are 435 * finished. 436 * @hw_rq_count: the number of jobs currently in the hardware queue. 437 * @job_id_count: used to assign unique id to the each job. 438 * @timeout_wq: workqueue used to queue @work_tdr 439 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the 440 * timeout interval is over. 441 * @thread: the kthread on which the scheduler which run. 442 * @pending_list: the list of jobs which are currently in the job queue. 443 * @job_list_lock: lock to protect the pending_list. 444 * @hang_limit: once the hangs by a job crosses this limit then it is marked 445 * guilty and it will no longer be considered for scheduling. 446 * @score: score to help loadbalancer pick a idle sched 447 * @_score: score used when the driver doesn't provide one 448 * @ready: marks if the underlying HW is ready to work 449 * @free_guilty: A hit to time out handler to free the guilty job. 450 * @dev: system &struct device 451 * 452 * One scheduler is implemented for each hardware ring. 453 */ 454 struct drm_gpu_scheduler { 455 const struct drm_sched_backend_ops *ops; 456 uint32_t hw_submission_limit; 457 long timeout; 458 const char *name; 459 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT]; 460 wait_queue_head_t wake_up_worker; 461 wait_queue_head_t job_scheduled; 462 atomic_t hw_rq_count; 463 atomic64_t job_id_count; 464 struct workqueue_struct *timeout_wq; 465 struct delayed_work work_tdr; 466 #ifdef __linux__ 467 struct task_struct *thread; 468 #else 469 struct proc *thread; 470 #endif 471 struct list_head pending_list; 472 spinlock_t job_list_lock; 473 int hang_limit; 474 atomic_t *score; 475 atomic_t _score; 476 bool ready; 477 bool free_guilty; 478 struct device *dev; 479 }; 480 481 int drm_sched_init(struct drm_gpu_scheduler *sched, 482 const struct drm_sched_backend_ops *ops, 483 uint32_t hw_submission, unsigned hang_limit, 484 long timeout, struct workqueue_struct *timeout_wq, 485 atomic_t *score, const char *name, struct device *dev); 486 487 void drm_sched_fini(struct drm_gpu_scheduler *sched); 488 int drm_sched_job_init(struct drm_sched_job *job, 489 struct drm_sched_entity *entity, 490 void *owner); 491 void drm_sched_job_arm(struct drm_sched_job *job); 492 int drm_sched_job_add_dependency(struct drm_sched_job *job, 493 struct dma_fence *fence); 494 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job, 495 struct drm_gem_object *obj, 496 bool write); 497 498 499 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity, 500 struct drm_gpu_scheduler **sched_list, 501 unsigned int num_sched_list); 502 503 void drm_sched_job_cleanup(struct drm_sched_job *job); 504 void drm_sched_wakeup(struct drm_gpu_scheduler *sched); 505 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad); 506 void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery); 507 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched); 508 void drm_sched_resubmit_jobs_ext(struct drm_gpu_scheduler *sched, int max); 509 void drm_sched_increase_karma(struct drm_sched_job *bad); 510 void drm_sched_reset_karma(struct drm_sched_job *bad); 511 void drm_sched_increase_karma_ext(struct drm_sched_job *bad, int type); 512 bool drm_sched_dependency_optimized(struct dma_fence* fence, 513 struct drm_sched_entity *entity); 514 void drm_sched_fault(struct drm_gpu_scheduler *sched); 515 void drm_sched_job_kickout(struct drm_sched_job *s_job); 516 517 void drm_sched_rq_add_entity(struct drm_sched_rq *rq, 518 struct drm_sched_entity *entity); 519 void drm_sched_rq_remove_entity(struct drm_sched_rq *rq, 520 struct drm_sched_entity *entity); 521 522 int drm_sched_entity_init(struct drm_sched_entity *entity, 523 enum drm_sched_priority priority, 524 struct drm_gpu_scheduler **sched_list, 525 unsigned int num_sched_list, 526 atomic_t *guilty); 527 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 528 void drm_sched_entity_fini(struct drm_sched_entity *entity); 529 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 530 void drm_sched_entity_select_rq(struct drm_sched_entity *entity); 531 struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity); 532 void drm_sched_entity_push_job(struct drm_sched_job *sched_job); 533 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 534 enum drm_sched_priority priority); 535 bool drm_sched_entity_is_ready(struct drm_sched_entity *entity); 536 537 struct drm_sched_fence *drm_sched_fence_alloc( 538 struct drm_sched_entity *s_entity, void *owner); 539 void drm_sched_fence_init(struct drm_sched_fence *fence, 540 struct drm_sched_entity *entity); 541 void drm_sched_fence_free(struct drm_sched_fence *fence); 542 543 void drm_sched_fence_scheduled(struct drm_sched_fence *fence); 544 void drm_sched_fence_finished(struct drm_sched_fence *fence); 545 546 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched); 547 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched, 548 unsigned long remaining); 549 struct drm_gpu_scheduler * 550 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list, 551 unsigned int num_sched_list); 552 553 #endif 554