11bb76ff1Sjsg // SPDX-License-Identifier: MIT 21bb76ff1Sjsg /* 31bb76ff1Sjsg * Copyright(c) 2020 Intel Corporation. 41bb76ff1Sjsg */ 51bb76ff1Sjsg 6*f005ef32Sjsg #include "i915_drv.h" 7*f005ef32Sjsg 81bb76ff1Sjsg #include "intel_pxp.h" 91bb76ff1Sjsg #include "intel_pxp_irq.h" 101bb76ff1Sjsg #include "intel_pxp_pm.h" 111bb76ff1Sjsg #include "intel_pxp_session.h" 12*f005ef32Sjsg #include "intel_pxp_types.h" 131bb76ff1Sjsg intel_pxp_suspend_prepare(struct intel_pxp * pxp)141bb76ff1Sjsgvoid intel_pxp_suspend_prepare(struct intel_pxp *pxp) 151bb76ff1Sjsg { 161bb76ff1Sjsg if (!intel_pxp_is_enabled(pxp)) 171bb76ff1Sjsg return; 181bb76ff1Sjsg 19*f005ef32Sjsg intel_pxp_end(pxp); 201bb76ff1Sjsg 211bb76ff1Sjsg intel_pxp_invalidate(pxp); 221bb76ff1Sjsg } 231bb76ff1Sjsg intel_pxp_suspend(struct intel_pxp * pxp)241bb76ff1Sjsgvoid intel_pxp_suspend(struct intel_pxp *pxp) 251bb76ff1Sjsg { 261bb76ff1Sjsg intel_wakeref_t wakeref; 271bb76ff1Sjsg 281bb76ff1Sjsg if (!intel_pxp_is_enabled(pxp)) 291bb76ff1Sjsg return; 301bb76ff1Sjsg 31*f005ef32Sjsg with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref) { 321bb76ff1Sjsg intel_pxp_fini_hw(pxp); 331bb76ff1Sjsg pxp->hw_state_invalidated = false; 341bb76ff1Sjsg } 351bb76ff1Sjsg } 361bb76ff1Sjsg intel_pxp_resume_complete(struct intel_pxp * pxp)37*f005ef32Sjsgvoid intel_pxp_resume_complete(struct intel_pxp *pxp) 381bb76ff1Sjsg { 391bb76ff1Sjsg if (!intel_pxp_is_enabled(pxp)) 401bb76ff1Sjsg return; 411bb76ff1Sjsg 421bb76ff1Sjsg /* 431bb76ff1Sjsg * The PXP component gets automatically unbound when we go into S3 and 441bb76ff1Sjsg * re-bound after we come out, so in that scenario we can defer the 451bb76ff1Sjsg * hw init to the bind call. 46*f005ef32Sjsg * NOTE: GSC-CS backend doesn't rely on components. 471bb76ff1Sjsg */ 48*f005ef32Sjsg if (!HAS_ENGINE(pxp->ctrl_gt, GSC0) && !pxp->pxp_component) 491bb76ff1Sjsg return; 501bb76ff1Sjsg 511bb76ff1Sjsg intel_pxp_init_hw(pxp); 521bb76ff1Sjsg } 531bb76ff1Sjsg intel_pxp_runtime_suspend(struct intel_pxp * pxp)541bb76ff1Sjsgvoid intel_pxp_runtime_suspend(struct intel_pxp *pxp) 551bb76ff1Sjsg { 561bb76ff1Sjsg if (!intel_pxp_is_enabled(pxp)) 571bb76ff1Sjsg return; 581bb76ff1Sjsg 591bb76ff1Sjsg pxp->arb_is_valid = false; 601bb76ff1Sjsg 611bb76ff1Sjsg intel_pxp_fini_hw(pxp); 621bb76ff1Sjsg 631bb76ff1Sjsg pxp->hw_state_invalidated = false; 641bb76ff1Sjsg } 65