1 /* $OpenBSD: i915_gpu_error.c,v 1.1 2015/09/23 23:12:12 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2008 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Keith Packard <keithp@keithp.com> 27 * Mika Kuoppala <mika.kuoppala@intel.com> 28 * 29 */ 30 31 #include "i915_drv.h" 32 33 static inline void 34 drm_clflush_pages(struct vm_page *pages[], unsigned long num_pages) 35 { 36 unsigned long i; 37 38 for (i = 0; i < num_pages; i++) 39 pmap_flush_page(VM_PAGE_TO_PHYS(pages[i])); 40 } 41 42 static const char *yesno(int v) 43 { 44 return v ? "yes" : "no"; 45 } 46 47 static const char *ring_str(int ring) 48 { 49 switch (ring) { 50 case RCS: return "render"; 51 case VCS: return "bsd"; 52 case BCS: return "blt"; 53 case VECS: return "vebox"; 54 default: return ""; 55 } 56 } 57 58 static const char *pin_flag(int pinned) 59 { 60 if (pinned > 0) 61 return " P"; 62 else if (pinned < 0) 63 return " p"; 64 else 65 return ""; 66 } 67 68 static const char *tiling_flag(int tiling) 69 { 70 switch (tiling) { 71 default: 72 case I915_TILING_NONE: return ""; 73 case I915_TILING_X: return " X"; 74 case I915_TILING_Y: return " Y"; 75 } 76 } 77 78 static const char *dirty_flag(int dirty) 79 { 80 return dirty ? " dirty" : ""; 81 } 82 83 static const char *purgeable_flag(int purgeable) 84 { 85 return purgeable ? " purgeable" : ""; 86 } 87 88 static bool __i915_error_ok(struct drm_i915_error_state_buf *e) 89 { 90 91 if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) { 92 e->err = -ENOSPC; 93 return false; 94 } 95 96 if (e->bytes == e->size - 1 || e->err) 97 return false; 98 99 return true; 100 } 101 102 static bool __i915_error_seek(struct drm_i915_error_state_buf *e, 103 unsigned len) 104 { 105 if (e->pos + len <= e->start) { 106 e->pos += len; 107 return false; 108 } 109 110 /* First vsnprintf needs to fit in its entirety for memmove */ 111 if (len >= e->size) { 112 e->err = -EIO; 113 return false; 114 } 115 116 return true; 117 } 118 119 static void __i915_error_advance(struct drm_i915_error_state_buf *e, 120 unsigned len) 121 { 122 /* If this is first printf in this window, adjust it so that 123 * start position matches start of the buffer 124 */ 125 126 if (e->pos < e->start) { 127 const size_t off = e->start - e->pos; 128 129 /* Should not happen but be paranoid */ 130 if (off > len || e->bytes) { 131 e->err = -EIO; 132 return; 133 } 134 135 memmove(e->buf, e->buf + off, len - off); 136 e->bytes = len - off; 137 e->pos = e->start; 138 return; 139 } 140 141 e->bytes += len; 142 e->pos += len; 143 } 144 145 static void i915_error_vprintf(struct drm_i915_error_state_buf *e, 146 const char *f, va_list args) 147 { 148 unsigned len; 149 150 if (!__i915_error_ok(e)) 151 return; 152 153 /* Seek the first printf which is hits start position */ 154 if (e->pos < e->start) { 155 va_list tmp; 156 157 va_copy(tmp, args); 158 len = vsnprintf(NULL, 0, f, tmp); 159 va_end(tmp); 160 161 if (!__i915_error_seek(e, len)) 162 return; 163 } 164 165 len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args); 166 if (len >= e->size - e->bytes) 167 len = e->size - e->bytes - 1; 168 169 __i915_error_advance(e, len); 170 } 171 172 static void i915_error_puts(struct drm_i915_error_state_buf *e, 173 const char *str) 174 { 175 unsigned len; 176 177 if (!__i915_error_ok(e)) 178 return; 179 180 len = strlen(str); 181 182 /* Seek the first printf which is hits start position */ 183 if (e->pos < e->start) { 184 if (!__i915_error_seek(e, len)) 185 return; 186 } 187 188 if (len >= e->size - e->bytes) 189 len = e->size - e->bytes - 1; 190 memcpy(e->buf + e->bytes, str, len); 191 192 __i915_error_advance(e, len); 193 } 194 195 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__) 196 #define err_puts(e, s) i915_error_puts(e, s) 197 198 static void print_error_buffers(struct drm_i915_error_state_buf *m, 199 const char *name, 200 struct drm_i915_error_buffer *err, 201 int count) 202 { 203 err_printf(m, "%s [%d]:\n", name, count); 204 205 while (count--) { 206 err_printf(m, " %08x %8u %02x %02x %x %x", 207 err->gtt_offset, 208 err->size, 209 err->read_domains, 210 err->write_domain, 211 err->rseqno, err->wseqno); 212 err_puts(m, pin_flag(err->pinned)); 213 err_puts(m, tiling_flag(err->tiling)); 214 err_puts(m, dirty_flag(err->dirty)); 215 err_puts(m, purgeable_flag(err->purgeable)); 216 err_puts(m, err->ring != -1 ? " " : ""); 217 err_puts(m, ring_str(err->ring)); 218 err_puts(m, i915_cache_level_str(err->cache_level)); 219 220 if (err->name) 221 err_printf(m, " (name: %d)", err->name); 222 if (err->fence_reg != I915_FENCE_REG_NONE) 223 err_printf(m, " (fence: %d)", err->fence_reg); 224 225 err_puts(m, "\n"); 226 err++; 227 } 228 } 229 230 static const char *hangcheck_action_to_str(enum intel_ring_hangcheck_action a) 231 { 232 switch (a) { 233 case HANGCHECK_IDLE: 234 return "idle"; 235 case HANGCHECK_WAIT: 236 return "wait"; 237 case HANGCHECK_ACTIVE: 238 return "active"; 239 case HANGCHECK_KICK: 240 return "kick"; 241 case HANGCHECK_HUNG: 242 return "hung"; 243 } 244 245 return "unknown"; 246 } 247 248 static void i915_ring_error_state(struct drm_i915_error_state_buf *m, 249 struct drm_device *dev, 250 struct drm_i915_error_state *error, 251 unsigned ring) 252 { 253 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */ 254 if (!error->ring[ring].valid) 255 return; 256 257 err_printf(m, "%s command stream:\n", ring_str(ring)); 258 err_printf(m, " HEAD: 0x%08x\n", error->head[ring]); 259 err_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); 260 err_printf(m, " CTL: 0x%08x\n", error->ctl[ring]); 261 err_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); 262 err_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); 263 err_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); 264 err_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]); 265 if (INTEL_INFO(dev)->gen >= 4) { 266 err_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr[ring]); 267 err_printf(m, " BB_STATE: 0x%08x\n", error->bbstate[ring]); 268 err_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]); 269 } 270 err_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]); 271 err_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]); 272 if (INTEL_INFO(dev)->gen >= 6) { 273 err_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]); 274 err_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]); 275 err_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n", 276 error->semaphore_mboxes[ring][0], 277 error->semaphore_seqno[ring][0]); 278 err_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n", 279 error->semaphore_mboxes[ring][1], 280 error->semaphore_seqno[ring][1]); 281 if (HAS_VEBOX(dev)) { 282 err_printf(m, " SYNC_2: 0x%08x [last synced 0x%08x]\n", 283 error->semaphore_mboxes[ring][2], 284 error->semaphore_seqno[ring][2]); 285 } 286 } 287 err_printf(m, " seqno: 0x%08x\n", error->seqno[ring]); 288 err_printf(m, " waiting: %s\n", yesno(error->waiting[ring])); 289 err_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]); 290 err_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]); 291 err_printf(m, " hangcheck: %s [%d]\n", 292 hangcheck_action_to_str(error->hangcheck_action[ring]), 293 error->hangcheck_score[ring]); 294 } 295 296 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) 297 { 298 va_list args; 299 300 va_start(args, f); 301 i915_error_vprintf(e, f, args); 302 va_end(args); 303 } 304 305 int i915_error_state_to_str(struct drm_i915_error_state_buf *m, 306 const struct i915_error_state_file_priv *error_priv) 307 { 308 struct drm_device *dev = error_priv->dev; 309 drm_i915_private_t *dev_priv = dev->dev_private; 310 struct drm_i915_error_state *error = error_priv->error; 311 int i, j, page, offset, elt; 312 313 if (!error) { 314 err_printf(m, "no error state collected\n"); 315 goto out; 316 } 317 318 err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, 319 error->time.tv_usec); 320 #ifdef __linux__ 321 err_printf(m, "Kernel: " UTS_RELEASE "\n"); 322 #endif 323 err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device); 324 err_printf(m, "EIR: 0x%08x\n", error->eir); 325 err_printf(m, "IER: 0x%08x\n", error->ier); 326 err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); 327 err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); 328 err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); 329 err_printf(m, "CCID: 0x%08x\n", error->ccid); 330 err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings); 331 332 for (i = 0; i < dev_priv->num_fence_regs; i++) 333 err_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); 334 335 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++) 336 err_printf(m, " INSTDONE_%d: 0x%08x\n", i, 337 error->extra_instdone[i]); 338 339 if (INTEL_INFO(dev)->gen >= 6) { 340 err_printf(m, "ERROR: 0x%08x\n", error->error); 341 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); 342 } 343 344 if (INTEL_INFO(dev)->gen == 7) 345 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); 346 347 for (i = 0; i < ARRAY_SIZE(error->ring); i++) 348 i915_ring_error_state(m, dev, error, i); 349 350 if (error->active_bo) 351 print_error_buffers(m, "Active", 352 error->active_bo[0], 353 error->active_bo_count[0]); 354 355 if (error->pinned_bo) 356 print_error_buffers(m, "Pinned", 357 error->pinned_bo[0], 358 error->pinned_bo_count[0]); 359 360 for (i = 0; i < ARRAY_SIZE(error->ring); i++) { 361 struct drm_i915_error_object *obj; 362 363 if ((obj = error->ring[i].batchbuffer)) { 364 err_printf(m, "%s --- gtt_offset = 0x%08x\n", 365 dev_priv->ring[i].name, 366 obj->gtt_offset); 367 offset = 0; 368 for (page = 0; page < obj->page_count; page++) { 369 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 370 err_printf(m, "%08x : %08x\n", offset, 371 obj->pages[page][elt]); 372 offset += 4; 373 } 374 } 375 } 376 377 if (error->ring[i].num_requests) { 378 err_printf(m, "%s --- %d requests\n", 379 dev_priv->ring[i].name, 380 error->ring[i].num_requests); 381 for (j = 0; j < error->ring[i].num_requests; j++) { 382 err_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n", 383 error->ring[i].requests[j].seqno, 384 error->ring[i].requests[j].jiffies, 385 error->ring[i].requests[j].tail); 386 } 387 } 388 389 if ((obj = error->ring[i].ringbuffer)) { 390 err_printf(m, "%s --- ringbuffer = 0x%08x\n", 391 dev_priv->ring[i].name, 392 obj->gtt_offset); 393 offset = 0; 394 for (page = 0; page < obj->page_count; page++) { 395 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 396 err_printf(m, "%08x : %08x\n", 397 offset, 398 obj->pages[page][elt]); 399 offset += 4; 400 } 401 } 402 } 403 404 if ((obj = error->ring[i].ctx)) { 405 err_printf(m, "%s --- HW Context = 0x%08x\n", 406 dev_priv->ring[i].name, 407 obj->gtt_offset); 408 offset = 0; 409 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { 410 err_printf(m, "[%04x] %08x %08x %08x %08x\n", 411 offset, 412 obj->pages[0][elt], 413 obj->pages[0][elt+1], 414 obj->pages[0][elt+2], 415 obj->pages[0][elt+3]); 416 offset += 16; 417 } 418 } 419 } 420 421 #ifdef notyet 422 if (error->overlay) 423 intel_overlay_print_error_state(m, error->overlay); 424 425 if (error->display) 426 intel_display_print_error_state(m, dev, error->display); 427 #endif 428 429 out: 430 if (m->bytes == 0 && m->err) 431 return m->err; 432 433 return 0; 434 } 435 436 int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, 437 size_t count, loff_t pos) 438 { 439 memset(ebuf, 0, sizeof(*ebuf)); 440 441 /* We need to have enough room to store any i915_error_state printf 442 * so that we can move it to start position. 443 */ 444 ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE; 445 ebuf->buf = kmalloc(ebuf->size, 446 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN); 447 448 if (ebuf->buf == NULL) { 449 ebuf->size = PAGE_SIZE; 450 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); 451 } 452 453 if (ebuf->buf == NULL) { 454 ebuf->size = 128; 455 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); 456 } 457 458 if (ebuf->buf == NULL) 459 return -ENOMEM; 460 461 ebuf->start = pos; 462 463 return 0; 464 } 465 466 static void i915_error_object_free(struct drm_i915_error_object *obj) 467 { 468 int page; 469 470 if (obj == NULL) 471 return; 472 473 for (page = 0; page < obj->page_count; page++) 474 kfree(obj->pages[page]); 475 476 kfree(obj); 477 } 478 479 static void i915_error_state_free(struct kref *error_ref) 480 { 481 struct drm_i915_error_state *error = container_of(error_ref, 482 typeof(*error), ref); 483 int i; 484 485 for (i = 0; i < ARRAY_SIZE(error->ring); i++) { 486 i915_error_object_free(error->ring[i].batchbuffer); 487 i915_error_object_free(error->ring[i].ringbuffer); 488 i915_error_object_free(error->ring[i].ctx); 489 kfree(error->ring[i].requests); 490 } 491 492 kfree(error->active_bo); 493 kfree(error->overlay); 494 kfree(error->display); 495 kfree(error); 496 } 497 498 static struct drm_i915_error_object * 499 i915_error_object_create_sized(struct drm_i915_private *dev_priv, 500 struct drm_i915_gem_object *src, 501 const int num_pages) 502 { 503 struct drm_i915_error_object *dst; 504 int i; 505 u32 reloc_offset; 506 507 if (src == NULL || src->pages == NULL) 508 return NULL; 509 510 dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); 511 if (dst == NULL) 512 return NULL; 513 514 reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src); 515 for (i = 0; i < num_pages; i++) { 516 unsigned long flags; 517 void *d; 518 519 d = kmalloc(PAGE_SIZE, GFP_ATOMIC); 520 if (d == NULL) 521 goto unwind; 522 523 local_irq_save(flags); 524 if (reloc_offset < dev_priv->gtt.mappable_end && 525 src->has_global_gtt_mapping) { 526 bus_space_handle_t bsh; 527 void __iomem *s; 528 529 /* Simply ignore tiling or any overlapping fence. 530 * It's part of the error state, and this hopefully 531 * captures what the GPU read. 532 */ 533 534 #ifdef __linux__ 535 s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, 536 reloc_offset); 537 #else 538 agp_map_atomic(dev_priv->agph, reloc_offset, &bsh); 539 s = bus_space_vaddr(dev_priv->bst, bsh); 540 #endif 541 memcpy_fromio(d, s, PAGE_SIZE); 542 #ifdef __linux__ 543 io_mapping_unmap_atomic(s); 544 #else 545 agp_unmap_atomic(dev_priv->agph, bsh); 546 #endif 547 } else if (src->stolen) { 548 unsigned long offset; 549 550 offset = dev_priv->mm.stolen_base; 551 offset += src->stolen->start; 552 offset += i << PAGE_SHIFT; 553 554 memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE); 555 } else { 556 struct vm_page *page; 557 void *s; 558 559 page = i915_gem_object_get_page(src, i); 560 561 drm_clflush_pages(&page, 1); 562 563 s = kmap_atomic(page); 564 memcpy(d, s, PAGE_SIZE); 565 kunmap_atomic(s); 566 567 drm_clflush_pages(&page, 1); 568 } 569 local_irq_restore(flags); 570 571 dst->pages[i] = d; 572 573 reloc_offset += PAGE_SIZE; 574 } 575 dst->page_count = num_pages; 576 577 return dst; 578 579 unwind: 580 while (i--) 581 kfree(dst->pages[i]); 582 kfree(dst); 583 return NULL; 584 } 585 #define i915_error_object_create(dev_priv, src) \ 586 i915_error_object_create_sized((dev_priv), (src), \ 587 (src)->base.size>>PAGE_SHIFT) 588 589 static void capture_bo(struct drm_i915_error_buffer *err, 590 struct drm_i915_gem_object *obj) 591 { 592 err->size = obj->base.size; 593 err->name = obj->base.name; 594 err->rseqno = obj->last_read_seqno; 595 err->wseqno = obj->last_write_seqno; 596 err->gtt_offset = i915_gem_obj_ggtt_offset(obj); 597 err->read_domains = obj->base.read_domains; 598 err->write_domain = obj->base.write_domain; 599 err->fence_reg = obj->fence_reg; 600 err->pinned = 0; 601 if (obj->pin_count > 0) 602 err->pinned = 1; 603 if (obj->user_pin_count > 0) 604 err->pinned = -1; 605 err->tiling = obj->tiling_mode; 606 err->dirty = obj->dirty; 607 err->purgeable = obj->madv != I915_MADV_WILLNEED; 608 err->ring = obj->ring ? obj->ring->id : -1; 609 err->cache_level = obj->cache_level; 610 } 611 612 static u32 capture_active_bo(struct drm_i915_error_buffer *err, 613 int count, struct list_head *head) 614 { 615 struct i915_vma *vma; 616 int i = 0; 617 618 list_for_each_entry(vma, head, mm_list) { 619 capture_bo(err++, vma->obj); 620 if (++i == count) 621 break; 622 } 623 624 return i; 625 } 626 627 static u32 capture_pinned_bo(struct drm_i915_error_buffer *err, 628 int count, struct list_head *head) 629 { 630 struct drm_i915_gem_object *obj; 631 int i = 0; 632 633 list_for_each_entry(obj, head, global_list) { 634 if (obj->pin_count == 0) 635 continue; 636 637 capture_bo(err++, obj); 638 if (++i == count) 639 break; 640 } 641 642 return i; 643 } 644 645 static void i915_gem_record_fences(struct drm_device *dev, 646 struct drm_i915_error_state *error) 647 { 648 struct drm_i915_private *dev_priv = dev->dev_private; 649 int i; 650 651 /* Fences */ 652 switch (INTEL_INFO(dev)->gen) { 653 case 8: 654 case 7: 655 case 6: 656 for (i = 0; i < dev_priv->num_fence_regs; i++) 657 error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); 658 break; 659 case 5: 660 case 4: 661 for (i = 0; i < 16; i++) 662 error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); 663 break; 664 case 3: 665 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) 666 for (i = 0; i < 8; i++) 667 error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); 668 case 2: 669 for (i = 0; i < 8; i++) 670 error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); 671 break; 672 673 default: 674 BUG(); 675 } 676 } 677 678 static struct drm_i915_error_object * 679 i915_error_first_batchbuffer(struct drm_i915_private *dev_priv, 680 struct intel_ring_buffer *ring) 681 { 682 struct i915_address_space *vm; 683 struct i915_vma *vma; 684 struct drm_i915_gem_object *obj; 685 u32 seqno; 686 687 if (!ring->get_seqno) 688 return NULL; 689 690 if (HAS_BROKEN_CS_TLB(dev_priv->dev)) { 691 u32 acthd = I915_READ(ACTHD); 692 693 if (WARN_ON(ring->id != RCS)) 694 return NULL; 695 696 obj = ring->scratch.obj; 697 if (obj != NULL && 698 acthd >= i915_gem_obj_ggtt_offset(obj) && 699 acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size) 700 return i915_error_object_create(dev_priv, obj); 701 } 702 703 seqno = ring->get_seqno(ring, false); 704 list_for_each_entry(vm, &dev_priv->vm_list, global_link) { 705 list_for_each_entry(vma, &vm->active_list, mm_list) { 706 obj = vma->obj; 707 if (obj->ring != ring) 708 continue; 709 710 if (i915_seqno_passed(seqno, obj->last_read_seqno)) 711 continue; 712 713 if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0) 714 continue; 715 716 /* We need to copy these to an anonymous buffer as the simplest 717 * method to avoid being overwritten by userspace. 718 */ 719 return i915_error_object_create(dev_priv, obj); 720 } 721 } 722 723 return NULL; 724 } 725 726 static void i915_record_ring_state(struct drm_device *dev, 727 struct drm_i915_error_state *error, 728 struct intel_ring_buffer *ring) 729 { 730 struct drm_i915_private *dev_priv = dev->dev_private; 731 732 if (INTEL_INFO(dev)->gen >= 6) { 733 error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50); 734 error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring)); 735 error->semaphore_mboxes[ring->id][0] 736 = I915_READ(RING_SYNC_0(ring->mmio_base)); 737 error->semaphore_mboxes[ring->id][1] 738 = I915_READ(RING_SYNC_1(ring->mmio_base)); 739 error->semaphore_seqno[ring->id][0] = ring->sync_seqno[0]; 740 error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1]; 741 } 742 743 if (HAS_VEBOX(dev)) { 744 error->semaphore_mboxes[ring->id][2] = 745 I915_READ(RING_SYNC_2(ring->mmio_base)); 746 error->semaphore_seqno[ring->id][2] = ring->sync_seqno[2]; 747 } 748 749 if (INTEL_INFO(dev)->gen >= 4) { 750 error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base)); 751 error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base)); 752 error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base)); 753 error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base)); 754 error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base)); 755 error->bbaddr[ring->id] = I915_READ(RING_BBADDR(ring->mmio_base)); 756 if (INTEL_INFO(dev)->gen >= 8) 757 error->bbaddr[ring->id] |= (u64) I915_READ(RING_BBADDR_UDW(ring->mmio_base)) << 32; 758 error->bbstate[ring->id] = I915_READ(RING_BBSTATE(ring->mmio_base)); 759 } else { 760 error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX); 761 error->ipeir[ring->id] = I915_READ(IPEIR); 762 error->ipehr[ring->id] = I915_READ(IPEHR); 763 error->instdone[ring->id] = I915_READ(INSTDONE); 764 } 765 766 error->waiting[ring->id] = waitqueue_active(&ring->irq_queue); 767 error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base)); 768 error->seqno[ring->id] = ring->get_seqno(ring, false); 769 error->acthd[ring->id] = intel_ring_get_active_head(ring); 770 error->head[ring->id] = I915_READ_HEAD(ring); 771 error->tail[ring->id] = I915_READ_TAIL(ring); 772 error->ctl[ring->id] = I915_READ_CTL(ring); 773 774 error->cpu_ring_head[ring->id] = ring->head; 775 error->cpu_ring_tail[ring->id] = ring->tail; 776 777 error->hangcheck_score[ring->id] = ring->hangcheck.score; 778 error->hangcheck_action[ring->id] = ring->hangcheck.action; 779 } 780 781 782 static void i915_gem_record_active_context(struct intel_ring_buffer *ring, 783 struct drm_i915_error_state *error, 784 struct drm_i915_error_ring *ering) 785 { 786 struct drm_i915_private *dev_priv = ring->dev->dev_private; 787 struct drm_i915_gem_object *obj; 788 789 /* Currently render ring is the only HW context user */ 790 if (ring->id != RCS || !error->ccid) 791 return; 792 793 list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { 794 if ((error->ccid & ~PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { 795 ering->ctx = i915_error_object_create_sized(dev_priv, 796 obj, 1); 797 break; 798 } 799 } 800 } 801 802 static void i915_gem_record_rings(struct drm_device *dev, 803 struct drm_i915_error_state *error) 804 { 805 struct drm_i915_private *dev_priv = dev->dev_private; 806 struct drm_i915_gem_request *request; 807 int i, count; 808 809 for (i = 0; i < I915_NUM_RINGS; i++) { 810 struct intel_ring_buffer *ring = &dev_priv->ring[i]; 811 812 if (ring->dev == NULL) 813 continue; 814 815 error->ring[i].valid = true; 816 817 i915_record_ring_state(dev, error, ring); 818 819 error->ring[i].batchbuffer = 820 i915_error_first_batchbuffer(dev_priv, ring); 821 822 error->ring[i].ringbuffer = 823 i915_error_object_create(dev_priv, ring->obj); 824 825 826 i915_gem_record_active_context(ring, error, &error->ring[i]); 827 828 count = 0; 829 list_for_each_entry(request, &ring->request_list, list) 830 count++; 831 832 error->ring[i].num_requests = count; 833 error->ring[i].requests = 834 kcalloc(count, sizeof(*error->ring[i].requests), 835 GFP_ATOMIC); 836 if (error->ring[i].requests == NULL) { 837 error->ring[i].num_requests = 0; 838 continue; 839 } 840 841 count = 0; 842 list_for_each_entry(request, &ring->request_list, list) { 843 struct drm_i915_error_request *erq; 844 845 erq = &error->ring[i].requests[count++]; 846 erq->seqno = request->seqno; 847 erq->jiffies = request->emitted_jiffies; 848 erq->tail = request->tail; 849 } 850 } 851 } 852 853 /* FIXME: Since pin count/bound list is global, we duplicate what we capture per 854 * VM. 855 */ 856 static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, 857 struct drm_i915_error_state *error, 858 struct i915_address_space *vm, 859 const int ndx) 860 { 861 struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL; 862 struct drm_i915_gem_object *obj; 863 struct i915_vma *vma; 864 int i; 865 866 i = 0; 867 list_for_each_entry(vma, &vm->active_list, mm_list) 868 i++; 869 error->active_bo_count[ndx] = i; 870 list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) 871 if (obj->pin_count) 872 i++; 873 error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx]; 874 875 if (i) { 876 active_bo = kcalloc(i, sizeof(*active_bo), GFP_ATOMIC); 877 if (active_bo) 878 pinned_bo = active_bo + error->active_bo_count[ndx]; 879 } 880 881 if (active_bo) 882 error->active_bo_count[ndx] = 883 capture_active_bo(active_bo, 884 error->active_bo_count[ndx], 885 &vm->active_list); 886 887 if (pinned_bo) 888 error->pinned_bo_count[ndx] = 889 capture_pinned_bo(pinned_bo, 890 error->pinned_bo_count[ndx], 891 &dev_priv->mm.bound_list); 892 error->active_bo[ndx] = active_bo; 893 error->pinned_bo[ndx] = pinned_bo; 894 } 895 896 static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv, 897 struct drm_i915_error_state *error) 898 { 899 struct i915_address_space *vm; 900 int cnt = 0, i = 0; 901 902 list_for_each_entry(vm, &dev_priv->vm_list, global_link) 903 cnt++; 904 905 if (WARN(cnt > 1, "Multiple VMs not yet supported\n")) 906 cnt = 1; 907 908 vm = &dev_priv->gtt.base; 909 910 error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC); 911 error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC); 912 error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count), 913 GFP_ATOMIC); 914 error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count), 915 GFP_ATOMIC); 916 917 list_for_each_entry(vm, &dev_priv->vm_list, global_link) 918 i915_gem_capture_vm(dev_priv, error, vm, i++); 919 } 920 921 /** 922 * i915_capture_error_state - capture an error record for later analysis 923 * @dev: drm device 924 * 925 * Should be called when an error is detected (either a hang or an error 926 * interrupt) to capture error state from the time of the error. Fills 927 * out a structure which becomes available in debugfs for user level tools 928 * to pick up. 929 */ 930 void i915_capture_error_state(struct drm_device *dev) 931 { 932 struct drm_i915_private *dev_priv = dev->dev_private; 933 struct drm_i915_error_state *error; 934 unsigned long flags; 935 int pipe; 936 937 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 938 error = dev_priv->gpu_error.first_error; 939 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 940 if (error) 941 return; 942 943 /* Account for pipe specific data like PIPE*STAT */ 944 error = kzalloc(sizeof(*error), GFP_ATOMIC); 945 if (!error) { 946 DRM_DEBUG_DRIVER("out of memory, not capturing error state\n"); 947 return; 948 } 949 950 #ifdef __linux__ 951 DRM_INFO("GPU crash dump saved to /sys/class/drm/card%d/error\n", 952 dev->primary->index); 953 #endif 954 DRM_INFO("GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.\n"); 955 DRM_INFO("Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel\n"); 956 DRM_INFO("drm/i915 developers can then reassign to the right component if it's not a kernel issue.\n"); 957 DRM_INFO("The gpu crash dump is required to analyze gpu hangs, so please always attach it.\n"); 958 959 kref_init(&error->ref); 960 error->eir = I915_READ(EIR); 961 error->pgtbl_er = I915_READ(PGTBL_ER); 962 if (HAS_HW_CONTEXTS(dev)) 963 error->ccid = I915_READ(CCID); 964 965 if (HAS_PCH_SPLIT(dev)) 966 error->ier = I915_READ(DEIER) | I915_READ(GTIER); 967 else if (IS_VALLEYVIEW(dev)) 968 error->ier = I915_READ(GTIER) | I915_READ(VLV_IER); 969 else if (IS_GEN2(dev)) 970 error->ier = I915_READ16(IER); 971 else 972 error->ier = I915_READ(IER); 973 974 if (INTEL_INFO(dev)->gen >= 6) 975 error->derrmr = I915_READ(DERRMR); 976 977 if (IS_VALLEYVIEW(dev)) 978 error->forcewake = I915_READ(FORCEWAKE_VLV); 979 else if (INTEL_INFO(dev)->gen >= 7) 980 error->forcewake = I915_READ(FORCEWAKE_MT); 981 else if (INTEL_INFO(dev)->gen == 6) 982 error->forcewake = I915_READ(FORCEWAKE); 983 984 if (!HAS_PCH_SPLIT(dev)) 985 for_each_pipe(pipe) 986 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); 987 988 if (INTEL_INFO(dev)->gen >= 6) { 989 error->error = I915_READ(ERROR_GEN6); 990 error->done_reg = I915_READ(DONE_REG); 991 } 992 993 if (INTEL_INFO(dev)->gen == 7) 994 error->err_int = I915_READ(GEN7_ERR_INT); 995 996 i915_get_extra_instdone(dev, error->extra_instdone); 997 998 i915_gem_capture_buffers(dev_priv, error); 999 i915_gem_record_fences(dev, error); 1000 i915_gem_record_rings(dev, error); 1001 1002 #ifdef __linux__ 1003 do_gettimeofday(&error->time); 1004 #else 1005 getmicrotime(&error->time); 1006 #endif 1007 1008 #ifdef notyet 1009 error->overlay = intel_overlay_capture_error_state(dev); 1010 error->display = intel_display_capture_error_state(dev); 1011 #endif 1012 1013 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 1014 if (dev_priv->gpu_error.first_error == NULL) { 1015 dev_priv->gpu_error.first_error = error; 1016 error = NULL; 1017 } 1018 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 1019 1020 if (error) 1021 i915_error_state_free(&error->ref); 1022 } 1023 1024 void i915_error_state_get(struct drm_device *dev, 1025 struct i915_error_state_file_priv *error_priv) 1026 { 1027 struct drm_i915_private *dev_priv = dev->dev_private; 1028 unsigned long flags; 1029 1030 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 1031 error_priv->error = dev_priv->gpu_error.first_error; 1032 if (error_priv->error) 1033 kref_get(&error_priv->error->ref); 1034 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 1035 1036 } 1037 1038 void i915_error_state_put(struct i915_error_state_file_priv *error_priv) 1039 { 1040 if (error_priv->error) 1041 kref_put(&error_priv->error->ref, i915_error_state_free); 1042 } 1043 1044 void i915_destroy_error_state(struct drm_device *dev) 1045 { 1046 struct drm_i915_private *dev_priv = dev->dev_private; 1047 struct drm_i915_error_state *error; 1048 unsigned long flags; 1049 1050 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 1051 error = dev_priv->gpu_error.first_error; 1052 dev_priv->gpu_error.first_error = NULL; 1053 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 1054 1055 if (error) 1056 kref_put(&error->ref, i915_error_state_free); 1057 } 1058 1059 const char *i915_cache_level_str(int type) 1060 { 1061 switch (type) { 1062 case I915_CACHE_NONE: return " uncached"; 1063 case I915_CACHE_LLC: return " snooped or LLC"; 1064 case I915_CACHE_L3_LLC: return " L3+LLC"; 1065 case I915_CACHE_WT: return " WT"; 1066 default: return ""; 1067 } 1068 } 1069 1070 /* NB: please notice the memset */ 1071 void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) 1072 { 1073 struct drm_i915_private *dev_priv = dev->dev_private; 1074 memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); 1075 1076 switch (INTEL_INFO(dev)->gen) { 1077 case 2: 1078 case 3: 1079 instdone[0] = I915_READ(INSTDONE); 1080 break; 1081 case 4: 1082 case 5: 1083 case 6: 1084 instdone[0] = I915_READ(INSTDONE_I965); 1085 instdone[1] = I915_READ(INSTDONE1); 1086 break; 1087 default: 1088 WARN_ONCE(1, "Unsupported platform\n"); 1089 case 7: 1090 case 8: 1091 instdone[0] = I915_READ(GEN7_INSTDONE_1); 1092 instdone[1] = I915_READ(GEN7_SC_INSTDONE); 1093 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); 1094 instdone[3] = I915_READ(GEN7_ROW_INSTDONE); 1095 break; 1096 } 1097 } 1098