xref: /openbsd-src/sys/dev/pci/drm/i915/gt/intel_rps.h (revision f005ef32267c16bdb134f0e9fa4477dbe07c263a)
15ca02815Sjsg /* SPDX-License-Identifier: MIT */
2c349dbc7Sjsg /*
3c349dbc7Sjsg  * Copyright © 2019 Intel Corporation
4c349dbc7Sjsg  */
5c349dbc7Sjsg 
6c349dbc7Sjsg #ifndef INTEL_RPS_H
7c349dbc7Sjsg #define INTEL_RPS_H
8c349dbc7Sjsg 
9c349dbc7Sjsg #include "intel_rps_types.h"
101bb76ff1Sjsg #include "i915_reg_defs.h"
11c349dbc7Sjsg 
12c349dbc7Sjsg struct i915_request;
13*f005ef32Sjsg struct drm_printer;
14*f005ef32Sjsg 
15*f005ef32Sjsg #define GT_FREQUENCY_MULTIPLIER 50
16*f005ef32Sjsg #define GEN9_FREQ_SCALER 3
17c349dbc7Sjsg 
18c349dbc7Sjsg void intel_rps_init_early(struct intel_rps *rps);
19c349dbc7Sjsg void intel_rps_init(struct intel_rps *rps);
20ad8b1aafSjsg void intel_rps_sanitize(struct intel_rps *rps);
21c349dbc7Sjsg 
22c349dbc7Sjsg void intel_rps_driver_register(struct intel_rps *rps);
23c349dbc7Sjsg void intel_rps_driver_unregister(struct intel_rps *rps);
24c349dbc7Sjsg 
25c349dbc7Sjsg void intel_rps_enable(struct intel_rps *rps);
26c349dbc7Sjsg void intel_rps_disable(struct intel_rps *rps);
27c349dbc7Sjsg 
28c349dbc7Sjsg void intel_rps_park(struct intel_rps *rps);
29c349dbc7Sjsg void intel_rps_unpark(struct intel_rps *rps);
30c349dbc7Sjsg void intel_rps_boost(struct i915_request *rq);
311bb76ff1Sjsg void intel_rps_dec_waiters(struct intel_rps *rps);
321bb76ff1Sjsg u32 intel_rps_get_boost_frequency(struct intel_rps *rps);
331bb76ff1Sjsg int intel_rps_set_boost_frequency(struct intel_rps *rps, u32 freq);
34c349dbc7Sjsg 
35c349dbc7Sjsg int intel_rps_set(struct intel_rps *rps, u8 val);
36c349dbc7Sjsg void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive);
37c349dbc7Sjsg 
38c349dbc7Sjsg int intel_gpu_freq(struct intel_rps *rps, int val);
39c349dbc7Sjsg int intel_freq_opcode(struct intel_rps *rps, int val);
40*f005ef32Sjsg u8 intel_rps_get_up_threshold(struct intel_rps *rps);
41*f005ef32Sjsg int intel_rps_set_up_threshold(struct intel_rps *rps, u8 threshold);
42*f005ef32Sjsg u8 intel_rps_get_down_threshold(struct intel_rps *rps);
43*f005ef32Sjsg int intel_rps_set_down_threshold(struct intel_rps *rps, u8 threshold);
44c349dbc7Sjsg u32 intel_rps_read_actual_frequency(struct intel_rps *rps);
45*f005ef32Sjsg u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps);
465ca02815Sjsg u32 intel_rps_get_requested_frequency(struct intel_rps *rps);
475ca02815Sjsg u32 intel_rps_get_min_frequency(struct intel_rps *rps);
481bb76ff1Sjsg u32 intel_rps_get_min_raw_freq(struct intel_rps *rps);
495ca02815Sjsg int intel_rps_set_min_frequency(struct intel_rps *rps, u32 val);
505ca02815Sjsg u32 intel_rps_get_max_frequency(struct intel_rps *rps);
511bb76ff1Sjsg u32 intel_rps_get_max_raw_freq(struct intel_rps *rps);
525ca02815Sjsg int intel_rps_set_max_frequency(struct intel_rps *rps, u32 val);
535ca02815Sjsg u32 intel_rps_get_rp0_frequency(struct intel_rps *rps);
545ca02815Sjsg u32 intel_rps_get_rp1_frequency(struct intel_rps *rps);
555ca02815Sjsg u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
565ca02815Sjsg u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
57*f005ef32Sjsg u32 intel_rps_read_rpstat(struct intel_rps *rps);
581bb76ff1Sjsg void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps);
591bb76ff1Sjsg void intel_rps_raise_unslice(struct intel_rps *rps);
601bb76ff1Sjsg void intel_rps_lower_unslice(struct intel_rps *rps);
611bb76ff1Sjsg 
621bb76ff1Sjsg u32 intel_rps_read_throttle_reason(struct intel_rps *rps);
631bb76ff1Sjsg bool rps_read_mask_mmio(struct intel_rps *rps, i915_reg_t reg32, u32 mask);
64c349dbc7Sjsg 
65*f005ef32Sjsg void gen6_rps_frequency_dump(struct intel_rps *rps, struct drm_printer *p);
66*f005ef32Sjsg 
67c349dbc7Sjsg void gen5_rps_irq_handler(struct intel_rps *rps);
68c349dbc7Sjsg void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
69c349dbc7Sjsg void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
70c349dbc7Sjsg 
intel_rps_is_enabled(const struct intel_rps * rps)71ad8b1aafSjsg static inline bool intel_rps_is_enabled(const struct intel_rps *rps)
72ad8b1aafSjsg {
73ad8b1aafSjsg 	return test_bit(INTEL_RPS_ENABLED, &rps->flags);
74ad8b1aafSjsg }
75ad8b1aafSjsg 
intel_rps_set_enabled(struct intel_rps * rps)76ad8b1aafSjsg static inline void intel_rps_set_enabled(struct intel_rps *rps)
77ad8b1aafSjsg {
78ad8b1aafSjsg 	set_bit(INTEL_RPS_ENABLED, &rps->flags);
79ad8b1aafSjsg }
80ad8b1aafSjsg 
intel_rps_clear_enabled(struct intel_rps * rps)81ad8b1aafSjsg static inline void intel_rps_clear_enabled(struct intel_rps *rps)
82ad8b1aafSjsg {
83ad8b1aafSjsg 	clear_bit(INTEL_RPS_ENABLED, &rps->flags);
84ad8b1aafSjsg }
85ad8b1aafSjsg 
intel_rps_is_active(const struct intel_rps * rps)86ad8b1aafSjsg static inline bool intel_rps_is_active(const struct intel_rps *rps)
87ad8b1aafSjsg {
88ad8b1aafSjsg 	return test_bit(INTEL_RPS_ACTIVE, &rps->flags);
89ad8b1aafSjsg }
90ad8b1aafSjsg 
intel_rps_set_active(struct intel_rps * rps)91ad8b1aafSjsg static inline void intel_rps_set_active(struct intel_rps *rps)
92ad8b1aafSjsg {
93ad8b1aafSjsg 	set_bit(INTEL_RPS_ACTIVE, &rps->flags);
94ad8b1aafSjsg }
95ad8b1aafSjsg 
intel_rps_clear_active(struct intel_rps * rps)96ad8b1aafSjsg static inline bool intel_rps_clear_active(struct intel_rps *rps)
97ad8b1aafSjsg {
98ad8b1aafSjsg 	return test_and_clear_bit(INTEL_RPS_ACTIVE, &rps->flags);
99ad8b1aafSjsg }
100ad8b1aafSjsg 
intel_rps_has_interrupts(const struct intel_rps * rps)101ad8b1aafSjsg static inline bool intel_rps_has_interrupts(const struct intel_rps *rps)
102ad8b1aafSjsg {
103ad8b1aafSjsg 	return test_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
104ad8b1aafSjsg }
105ad8b1aafSjsg 
intel_rps_set_interrupts(struct intel_rps * rps)106ad8b1aafSjsg static inline void intel_rps_set_interrupts(struct intel_rps *rps)
107ad8b1aafSjsg {
108ad8b1aafSjsg 	set_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
109ad8b1aafSjsg }
110ad8b1aafSjsg 
intel_rps_clear_interrupts(struct intel_rps * rps)111ad8b1aafSjsg static inline void intel_rps_clear_interrupts(struct intel_rps *rps)
112ad8b1aafSjsg {
113ad8b1aafSjsg 	clear_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
114ad8b1aafSjsg }
115ad8b1aafSjsg 
intel_rps_uses_timer(const struct intel_rps * rps)116ad8b1aafSjsg static inline bool intel_rps_uses_timer(const struct intel_rps *rps)
117ad8b1aafSjsg {
118ad8b1aafSjsg 	return test_bit(INTEL_RPS_TIMER, &rps->flags);
119ad8b1aafSjsg }
120ad8b1aafSjsg 
intel_rps_set_timer(struct intel_rps * rps)121ad8b1aafSjsg static inline void intel_rps_set_timer(struct intel_rps *rps)
122ad8b1aafSjsg {
123ad8b1aafSjsg 	set_bit(INTEL_RPS_TIMER, &rps->flags);
124ad8b1aafSjsg }
125ad8b1aafSjsg 
intel_rps_clear_timer(struct intel_rps * rps)126ad8b1aafSjsg static inline void intel_rps_clear_timer(struct intel_rps *rps)
127ad8b1aafSjsg {
128ad8b1aafSjsg 	clear_bit(INTEL_RPS_TIMER, &rps->flags);
129ad8b1aafSjsg }
130ad8b1aafSjsg 
131c349dbc7Sjsg #endif /* INTEL_RPS_H */
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