xref: /openbsd-src/sys/dev/pci/drm/i915/gt/intel_reset.h (revision 176435d340151acfb6ee5ad808ebc55f5ec05188)
15ca02815Sjsg /* SPDX-License-Identifier: MIT */
2c349dbc7Sjsg /*
3c349dbc7Sjsg  * Copyright © 2008-2018 Intel Corporation
4c349dbc7Sjsg  */
5c349dbc7Sjsg 
6c349dbc7Sjsg #ifndef I915_RESET_H
7c349dbc7Sjsg #define I915_RESET_H
8c349dbc7Sjsg 
9c349dbc7Sjsg #include <linux/compiler.h>
10c349dbc7Sjsg #include <linux/types.h>
11c349dbc7Sjsg #include <linux/srcu.h>
12c349dbc7Sjsg 
13c349dbc7Sjsg #include "intel_engine_types.h"
14c349dbc7Sjsg #include "intel_reset_types.h"
15c349dbc7Sjsg 
16c349dbc7Sjsg struct i915_request;
17c349dbc7Sjsg struct intel_engine_cs;
18c349dbc7Sjsg struct intel_gt;
19c349dbc7Sjsg struct intel_guc;
20c349dbc7Sjsg 
21c349dbc7Sjsg void intel_gt_init_reset(struct intel_gt *gt);
22c349dbc7Sjsg void intel_gt_fini_reset(struct intel_gt *gt);
23c349dbc7Sjsg 
24c349dbc7Sjsg __printf(4, 5)
25c349dbc7Sjsg void intel_gt_handle_error(struct intel_gt *gt,
26c349dbc7Sjsg 			   intel_engine_mask_t engine_mask,
27c349dbc7Sjsg 			   unsigned long flags,
28c349dbc7Sjsg 			   const char *fmt, ...);
29c349dbc7Sjsg #define I915_ERROR_CAPTURE BIT(0)
30c349dbc7Sjsg 
31c349dbc7Sjsg void intel_gt_reset(struct intel_gt *gt,
32c349dbc7Sjsg 		    intel_engine_mask_t stalled_mask,
33c349dbc7Sjsg 		    const char *reason);
34c349dbc7Sjsg int intel_engine_reset(struct intel_engine_cs *engine,
35c349dbc7Sjsg 		       const char *reason);
365ca02815Sjsg int __intel_engine_reset_bh(struct intel_engine_cs *engine,
375ca02815Sjsg 			    const char *reason);
38c349dbc7Sjsg 
39c349dbc7Sjsg void __i915_request_reset(struct i915_request *rq, bool guilty);
40c349dbc7Sjsg 
41c349dbc7Sjsg int __must_check intel_gt_reset_trylock(struct intel_gt *gt, int *srcu);
42f005ef32Sjsg int __must_check intel_gt_reset_lock_interruptible(struct intel_gt *gt, int *srcu);
43c349dbc7Sjsg void intel_gt_reset_unlock(struct intel_gt *gt, int tag);
44c349dbc7Sjsg 
45c349dbc7Sjsg void intel_gt_set_wedged(struct intel_gt *gt);
46c349dbc7Sjsg bool intel_gt_unset_wedged(struct intel_gt *gt);
47c349dbc7Sjsg int intel_gt_terminally_wedged(struct intel_gt *gt);
48c349dbc7Sjsg 
49c349dbc7Sjsg /*
50c349dbc7Sjsg  * There's no unset_wedged_on_init paired with this one.
51c349dbc7Sjsg  * Once we're wedged on init, there's no going back.
52ad8b1aafSjsg  * Same thing for unset_wedged_on_fini.
53c349dbc7Sjsg  */
54c349dbc7Sjsg void intel_gt_set_wedged_on_init(struct intel_gt *gt);
55ad8b1aafSjsg void intel_gt_set_wedged_on_fini(struct intel_gt *gt);
56c349dbc7Sjsg 
57c349dbc7Sjsg int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
58c349dbc7Sjsg 
59c349dbc7Sjsg int intel_reset_guc(struct intel_gt *gt);
60c349dbc7Sjsg 
61c349dbc7Sjsg struct intel_wedge_me {
62c349dbc7Sjsg 	struct delayed_work work;
63c349dbc7Sjsg 	struct intel_gt *gt;
64c349dbc7Sjsg 	const char *name;
65c349dbc7Sjsg };
66c349dbc7Sjsg 
67c349dbc7Sjsg void __intel_init_wedge(struct intel_wedge_me *w,
68c349dbc7Sjsg 			struct intel_gt *gt,
69c349dbc7Sjsg 			long timeout,
70c349dbc7Sjsg 			const char *name);
71c349dbc7Sjsg void __intel_fini_wedge(struct intel_wedge_me *w);
72c349dbc7Sjsg 
73c349dbc7Sjsg #define intel_wedge_on_timeout(W, GT, TIMEOUT)				\
74c349dbc7Sjsg 	for (__intel_init_wedge((W), (GT), (TIMEOUT), __func__);	\
75c349dbc7Sjsg 	     (W)->gt;							\
76c349dbc7Sjsg 	     __intel_fini_wedge((W)))
77c349dbc7Sjsg 
78c349dbc7Sjsg bool intel_has_gpu_reset(const struct intel_gt *gt);
79c349dbc7Sjsg bool intel_has_reset_engine(const struct intel_gt *gt);
80c349dbc7Sjsg 
81*176435d3Sjsg bool intel_engine_reset_needs_wa_22011802037(struct intel_gt *gt);
82*176435d3Sjsg 
83c349dbc7Sjsg #endif /* I915_RESET_H */
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