1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #include "gem/i915_gem_context.h" 7 #include "gem/i915_gem_pm.h" 8 9 #include "i915_drv.h" 10 #include "i915_trace.h" 11 12 #include "intel_context.h" 13 #include "intel_engine.h" 14 #include "intel_engine_pm.h" 15 #include "intel_ring.h" 16 17 static struct pool slab_ce; 18 19 static struct intel_context *intel_context_alloc(void) 20 { 21 #ifdef __linux__ 22 return kmem_cache_zalloc(slab_ce, GFP_KERNEL); 23 #else 24 return pool_get(&slab_ce, PR_WAITOK | PR_ZERO); 25 #endif 26 } 27 28 static void rcu_context_free(struct rcu_head *rcu) 29 { 30 struct intel_context *ce = container_of(rcu, typeof(*ce), rcu); 31 32 trace_intel_context_free(ce); 33 #ifdef __linux__ 34 kmem_cache_free(slab_ce, ce); 35 #else 36 pool_put(&slab_ce, ce); 37 #endif 38 } 39 40 void intel_context_free(struct intel_context *ce) 41 { 42 call_rcu(&ce->rcu, rcu_context_free); 43 } 44 45 struct intel_context * 46 intel_context_create(struct intel_engine_cs *engine) 47 { 48 struct intel_context *ce; 49 50 ce = intel_context_alloc(); 51 if (!ce) 52 return ERR_PTR(-ENOMEM); 53 54 intel_context_init(ce, engine); 55 trace_intel_context_create(ce); 56 return ce; 57 } 58 59 int intel_context_alloc_state(struct intel_context *ce) 60 { 61 int err = 0; 62 63 if (mutex_lock_interruptible(&ce->pin_mutex)) 64 return -EINTR; 65 66 if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { 67 if (intel_context_is_banned(ce)) { 68 err = -EIO; 69 goto unlock; 70 } 71 72 err = ce->ops->alloc(ce); 73 if (unlikely(err)) 74 goto unlock; 75 76 set_bit(CONTEXT_ALLOC_BIT, &ce->flags); 77 } 78 79 unlock: 80 mutex_unlock(&ce->pin_mutex); 81 return err; 82 } 83 84 static int intel_context_active_acquire(struct intel_context *ce) 85 { 86 int err; 87 88 __i915_active_acquire(&ce->active); 89 90 if (intel_context_is_barrier(ce) || intel_engine_uses_guc(ce->engine)) 91 return 0; 92 93 /* Preallocate tracking nodes */ 94 err = i915_active_acquire_preallocate_barrier(&ce->active, 95 ce->engine); 96 if (err) 97 i915_active_release(&ce->active); 98 99 return err; 100 } 101 102 static void intel_context_active_release(struct intel_context *ce) 103 { 104 /* Nodes preallocated in intel_context_active() */ 105 i915_active_acquire_barrier(&ce->active); 106 i915_active_release(&ce->active); 107 } 108 109 static int __context_pin_state(struct i915_vma *vma, struct i915_gem_ww_ctx *ww) 110 { 111 unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS; 112 int err; 113 114 err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH); 115 if (err) 116 return err; 117 118 err = i915_active_acquire(&vma->active); 119 if (err) 120 goto err_unpin; 121 122 /* 123 * And mark it as a globally pinned object to let the shrinker know 124 * it cannot reclaim the object until we release it. 125 */ 126 i915_vma_make_unshrinkable(vma); 127 vma->obj->mm.dirty = true; 128 129 return 0; 130 131 err_unpin: 132 i915_vma_unpin(vma); 133 return err; 134 } 135 136 static void __context_unpin_state(struct i915_vma *vma) 137 { 138 i915_vma_make_shrinkable(vma); 139 i915_active_release(&vma->active); 140 __i915_vma_unpin(vma); 141 } 142 143 static int __ring_active(struct intel_ring *ring, 144 struct i915_gem_ww_ctx *ww) 145 { 146 int err; 147 148 err = intel_ring_pin(ring, ww); 149 if (err) 150 return err; 151 152 err = i915_active_acquire(&ring->vma->active); 153 if (err) 154 goto err_pin; 155 156 return 0; 157 158 err_pin: 159 intel_ring_unpin(ring); 160 return err; 161 } 162 163 static void __ring_retire(struct intel_ring *ring) 164 { 165 i915_active_release(&ring->vma->active); 166 intel_ring_unpin(ring); 167 } 168 169 static int intel_context_pre_pin(struct intel_context *ce, 170 struct i915_gem_ww_ctx *ww) 171 { 172 int err; 173 174 CE_TRACE(ce, "active\n"); 175 176 err = __ring_active(ce->ring, ww); 177 if (err) 178 return err; 179 180 err = intel_timeline_pin(ce->timeline, ww); 181 if (err) 182 goto err_ring; 183 184 if (!ce->state) 185 return 0; 186 187 err = __context_pin_state(ce->state, ww); 188 if (err) 189 goto err_timeline; 190 191 192 return 0; 193 194 err_timeline: 195 intel_timeline_unpin(ce->timeline); 196 err_ring: 197 __ring_retire(ce->ring); 198 return err; 199 } 200 201 static void intel_context_post_unpin(struct intel_context *ce) 202 { 203 if (ce->state) 204 __context_unpin_state(ce->state); 205 206 intel_timeline_unpin(ce->timeline); 207 __ring_retire(ce->ring); 208 } 209 210 int __intel_context_do_pin_ww(struct intel_context *ce, 211 struct i915_gem_ww_ctx *ww) 212 { 213 bool handoff = false; 214 void *vaddr; 215 int err = 0; 216 217 if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) { 218 err = intel_context_alloc_state(ce); 219 if (err) 220 return err; 221 } 222 223 /* 224 * We always pin the context/ring/timeline here, to ensure a pin 225 * refcount for __intel_context_active(), which prevent a lock 226 * inversion of ce->pin_mutex vs dma_resv_lock(). 227 */ 228 229 err = i915_gem_object_lock(ce->timeline->hwsp_ggtt->obj, ww); 230 if (!err && ce->ring->vma->obj) 231 err = i915_gem_object_lock(ce->ring->vma->obj, ww); 232 if (!err && ce->state) 233 err = i915_gem_object_lock(ce->state->obj, ww); 234 if (!err) 235 err = intel_context_pre_pin(ce, ww); 236 if (err) 237 return err; 238 239 err = i915_active_acquire(&ce->active); 240 if (err) 241 goto err_ctx_unpin; 242 243 err = ce->ops->pre_pin(ce, ww, &vaddr); 244 if (err) 245 goto err_release; 246 247 err = mutex_lock_interruptible(&ce->pin_mutex); 248 if (err) 249 goto err_post_unpin; 250 251 if (unlikely(intel_context_is_closed(ce))) { 252 err = -ENOENT; 253 goto err_unlock; 254 } 255 256 if (likely(!atomic_add_unless(&ce->pin_count, 1, 0))) { 257 err = intel_context_active_acquire(ce); 258 if (unlikely(err)) 259 goto err_unlock; 260 261 err = ce->ops->pin(ce, vaddr); 262 if (err) { 263 intel_context_active_release(ce); 264 goto err_unlock; 265 } 266 267 CE_TRACE(ce, "pin ring:{start:%08x, head:%04x, tail:%04x}\n", 268 i915_ggtt_offset(ce->ring->vma), 269 ce->ring->head, ce->ring->tail); 270 271 handoff = true; 272 smp_mb__before_atomic(); /* flush pin before it is visible */ 273 atomic_inc(&ce->pin_count); 274 } 275 276 GEM_BUG_ON(!intel_context_is_pinned(ce)); /* no overflow! */ 277 278 trace_intel_context_do_pin(ce); 279 280 err_unlock: 281 mutex_unlock(&ce->pin_mutex); 282 err_post_unpin: 283 if (!handoff) 284 ce->ops->post_unpin(ce); 285 err_release: 286 i915_active_release(&ce->active); 287 err_ctx_unpin: 288 intel_context_post_unpin(ce); 289 290 /* 291 * Unlock the hwsp_ggtt object since it's shared. 292 * In principle we can unlock all the global state locked above 293 * since it's pinned and doesn't need fencing, and will 294 * thus remain resident until it is explicitly unpinned. 295 */ 296 i915_gem_ww_unlock_single(ce->timeline->hwsp_ggtt->obj); 297 298 return err; 299 } 300 301 int __intel_context_do_pin(struct intel_context *ce) 302 { 303 struct i915_gem_ww_ctx ww; 304 int err; 305 306 i915_gem_ww_ctx_init(&ww, true); 307 retry: 308 err = __intel_context_do_pin_ww(ce, &ww); 309 if (err == -EDEADLK) { 310 err = i915_gem_ww_ctx_backoff(&ww); 311 if (!err) 312 goto retry; 313 } 314 i915_gem_ww_ctx_fini(&ww); 315 return err; 316 } 317 318 void __intel_context_do_unpin(struct intel_context *ce, int sub) 319 { 320 if (!atomic_sub_and_test(sub, &ce->pin_count)) 321 return; 322 323 CE_TRACE(ce, "unpin\n"); 324 ce->ops->unpin(ce); 325 ce->ops->post_unpin(ce); 326 327 /* 328 * Once released, we may asynchronously drop the active reference. 329 * As that may be the only reference keeping the context alive, 330 * take an extra now so that it is not freed before we finish 331 * dereferencing it. 332 */ 333 intel_context_get(ce); 334 intel_context_active_release(ce); 335 trace_intel_context_do_unpin(ce); 336 intel_context_put(ce); 337 } 338 339 static void __intel_context_retire(struct i915_active *active) 340 { 341 struct intel_context *ce = container_of(active, typeof(*ce), active); 342 343 CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n", 344 intel_context_get_total_runtime_ns(ce), 345 intel_context_get_avg_runtime_ns(ce)); 346 347 set_bit(CONTEXT_VALID_BIT, &ce->flags); 348 intel_context_post_unpin(ce); 349 intel_context_put(ce); 350 } 351 352 static int __intel_context_active(struct i915_active *active) 353 { 354 struct intel_context *ce = container_of(active, typeof(*ce), active); 355 356 intel_context_get(ce); 357 358 /* everything should already be activated by intel_context_pre_pin() */ 359 GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->ring->vma->active)); 360 __intel_ring_pin(ce->ring); 361 362 __intel_timeline_pin(ce->timeline); 363 364 if (ce->state) { 365 GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->state->active)); 366 __i915_vma_pin(ce->state); 367 i915_vma_make_unshrinkable(ce->state); 368 } 369 370 return 0; 371 } 372 373 static int __i915_sw_fence_call 374 sw_fence_dummy_notify(struct i915_sw_fence *sf, 375 enum i915_sw_fence_notify state) 376 { 377 return NOTIFY_DONE; 378 } 379 380 void 381 intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) 382 { 383 GEM_BUG_ON(!engine->cops); 384 GEM_BUG_ON(!engine->gt->vm); 385 386 kref_init(&ce->ref); 387 388 ce->engine = engine; 389 ce->ops = engine->cops; 390 ce->sseu = engine->sseu; 391 ce->ring = NULL; 392 ce->ring_size = SZ_4K; 393 394 ewma_runtime_init(&ce->runtime.avg); 395 396 ce->vm = i915_vm_get(engine->gt->vm); 397 398 /* NB ce->signal_link/lock is used under RCU */ 399 mtx_init(&ce->signal_lock, IPL_NONE); 400 INIT_LIST_HEAD(&ce->signals); 401 402 rw_init(&ce->pin_mutex, "cepin"); 403 404 mtx_init(&ce->guc_state.lock, IPL_NONE); 405 INIT_LIST_HEAD(&ce->guc_state.fences); 406 407 mtx_init(&ce->guc_active.lock, IPL_NONE); 408 INIT_LIST_HEAD(&ce->guc_active.requests); 409 410 ce->guc_id = GUC_INVALID_LRC_ID; 411 INIT_LIST_HEAD(&ce->guc_id_link); 412 413 /* 414 * Initialize fence to be complete as this is expected to be complete 415 * unless there is a pending schedule disable outstanding. 416 */ 417 i915_sw_fence_init(&ce->guc_blocked, sw_fence_dummy_notify); 418 i915_sw_fence_commit(&ce->guc_blocked); 419 420 i915_active_init(&ce->active, 421 __intel_context_active, __intel_context_retire, 0); 422 } 423 424 void intel_context_fini(struct intel_context *ce) 425 { 426 if (ce->timeline) 427 intel_timeline_put(ce->timeline); 428 i915_vm_put(ce->vm); 429 430 mutex_destroy(&ce->pin_mutex); 431 i915_active_fini(&ce->active); 432 i915_sw_fence_fini(&ce->guc_blocked); 433 } 434 435 void i915_context_module_exit(void) 436 { 437 #ifdef __linux__ 438 kmem_cache_destroy(slab_ce); 439 #else 440 pool_destroy(&slab_ce); 441 #endif 442 } 443 444 int __init i915_context_module_init(void) 445 { 446 #ifdef __linux__ 447 slab_ce = KMEM_CACHE(intel_context, SLAB_HWCACHE_ALIGN); 448 if (!slab_ce) 449 return -ENOMEM; 450 #else 451 pool_init(&slab_ce, sizeof(struct intel_context), 452 CACHELINESIZE, IPL_TTY, 0, "ictx", NULL); 453 #endif 454 455 return 0; 456 } 457 458 void intel_context_enter_engine(struct intel_context *ce) 459 { 460 intel_engine_pm_get(ce->engine); 461 intel_timeline_enter(ce->timeline); 462 } 463 464 void intel_context_exit_engine(struct intel_context *ce) 465 { 466 intel_timeline_exit(ce->timeline); 467 intel_engine_pm_put(ce->engine); 468 } 469 470 int intel_context_prepare_remote_request(struct intel_context *ce, 471 struct i915_request *rq) 472 { 473 struct intel_timeline *tl = ce->timeline; 474 int err; 475 476 /* Only suitable for use in remotely modifying this context */ 477 GEM_BUG_ON(rq->context == ce); 478 479 if (rcu_access_pointer(rq->timeline) != tl) { /* timeline sharing! */ 480 /* Queue this switch after current activity by this context. */ 481 err = i915_active_fence_set(&tl->last_request, rq); 482 if (err) 483 return err; 484 } 485 486 /* 487 * Guarantee context image and the timeline remains pinned until the 488 * modifying request is retired by setting the ce activity tracker. 489 * 490 * But we only need to take one pin on the account of it. Or in other 491 * words transfer the pinned ce object to tracked active request. 492 */ 493 GEM_BUG_ON(i915_active_is_idle(&ce->active)); 494 return i915_active_add_request(&ce->active, rq); 495 } 496 497 struct i915_request *intel_context_create_request(struct intel_context *ce) 498 { 499 struct i915_gem_ww_ctx ww; 500 struct i915_request *rq; 501 int err; 502 503 i915_gem_ww_ctx_init(&ww, true); 504 retry: 505 err = intel_context_pin_ww(ce, &ww); 506 if (!err) { 507 rq = i915_request_create(ce); 508 intel_context_unpin(ce); 509 } else if (err == -EDEADLK) { 510 err = i915_gem_ww_ctx_backoff(&ww); 511 if (!err) 512 goto retry; 513 rq = ERR_PTR(err); 514 } else { 515 rq = ERR_PTR(err); 516 } 517 518 i915_gem_ww_ctx_fini(&ww); 519 520 if (IS_ERR(rq)) 521 return rq; 522 523 /* 524 * timeline->mutex should be the inner lock, but is used as outer lock. 525 * Hack around this to shut up lockdep in selftests.. 526 */ 527 lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie); 528 mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_); 529 mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_); 530 rq->cookie = lockdep_pin_lock(&ce->timeline->mutex); 531 532 return rq; 533 } 534 535 struct i915_request *intel_context_find_active_request(struct intel_context *ce) 536 { 537 struct i915_request *rq, *active = NULL; 538 unsigned long flags; 539 540 GEM_BUG_ON(!intel_engine_uses_guc(ce->engine)); 541 542 spin_lock_irqsave(&ce->guc_active.lock, flags); 543 list_for_each_entry_reverse(rq, &ce->guc_active.requests, 544 sched.link) { 545 if (i915_request_completed(rq)) 546 break; 547 548 active = rq; 549 } 550 spin_unlock_irqrestore(&ce->guc_active.lock, flags); 551 552 return active; 553 } 554 555 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) 556 #include "selftest_context.c" 557 #endif 558