1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #include <linux/pci.h> 7 #include <linux/vgaarb.h> 8 9 #include <drm/i915_drm.h> 10 11 #include "i915_drv.h" 12 #include "intel_de.h" 13 #include "intel_vga.h" 14 15 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915) 16 { 17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) 18 return VLV_VGACNTRL; 19 else if (DISPLAY_VER(i915) >= 5) 20 return CPU_VGACNTRL; 21 else 22 return VGACNTRL; 23 } 24 25 /* Disable the VGA plane that we never use */ 26 void intel_vga_disable(struct drm_i915_private *dev_priv) 27 { 28 struct pci_dev *pdev = dev_priv->drm.pdev; 29 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); 30 u8 sr1; 31 32 if (intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE) 33 return; 34 35 /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ 36 vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); 37 #ifdef __linux__ 38 outb(SR01, VGA_SR_INDEX); 39 sr1 = inb(VGA_SR_DATA); 40 outb(sr1 | 1 << 5, VGA_SR_DATA); 41 #else 42 outb(VGA_SR_INDEX, SR01); 43 sr1 = inb(VGA_SR_DATA); 44 outb(VGA_SR_DATA, sr1 | 1 << 5); 45 #endif 46 vga_put(pdev, VGA_RSRC_LEGACY_IO); 47 udelay(300); 48 49 intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE); 50 intel_de_posting_read(dev_priv, vga_reg); 51 } 52 53 void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv) 54 { 55 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); 56 57 if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) { 58 drm_dbg_kms(&dev_priv->drm, 59 "Something enabled VGA plane, disabling it\n"); 60 intel_vga_disable(dev_priv); 61 } 62 } 63 64 void intel_vga_redisable(struct drm_i915_private *i915) 65 { 66 intel_wakeref_t wakeref; 67 68 /* 69 * This function can be called both from intel_modeset_setup_hw_state or 70 * at a very early point in our resume sequence, where the power well 71 * structures are not yet restored. Since this function is at a very 72 * paranoid "someone might have enabled VGA while we were not looking" 73 * level, just check if the power well is enabled instead of trying to 74 * follow the "don't touch the power well if we don't need it" policy 75 * the rest of the driver uses. 76 */ 77 wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA); 78 if (!wakeref) 79 return; 80 81 intel_vga_redisable_power_on(i915); 82 83 intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref); 84 } 85 86 void intel_vga_reset_io_mem(struct drm_i915_private *i915) 87 { 88 struct pci_dev *pdev = i915->drm.pdev; 89 90 /* 91 * After we re-enable the power well, if we touch VGA register 0x3d5 92 * we'll get unclaimed register interrupts. This stops after we write 93 * anything to the VGA MSR register. The vgacon module uses this 94 * register all the time, so if we unbind our driver and, as a 95 * consequence, bind vgacon, we'll get stuck in an infinite loop at 96 * console_unlock(). So make here we touch the VGA MSR register, making 97 * sure vgacon can keep working normally without triggering interrupts 98 * and error messages. 99 */ 100 vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); 101 #ifdef __linux__ 102 outb(inb(VGA_MSR_READ), VGA_MSR_WRITE); 103 #else 104 outb(VGA_MSR_WRITE, inb(VGA_MSR_READ)); 105 #endif 106 vga_put(pdev, VGA_RSRC_LEGACY_IO); 107 } 108 109 static int 110 intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode) 111 { 112 unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; 113 u16 gmch_ctrl; 114 115 if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) { 116 drm_err(&i915->drm, "failed to read control word\n"); 117 return -EIO; 118 } 119 120 if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode) 121 return 0; 122 123 if (enable_decode) 124 gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; 125 else 126 gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; 127 128 if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) { 129 drm_err(&i915->drm, "failed to write control word\n"); 130 return -EIO; 131 } 132 133 return 0; 134 } 135 136 static unsigned int 137 intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) 138 { 139 STUB(); 140 return 0; 141 #ifdef notyet 142 struct drm_i915_private *i915 = pdev_to_i915(pdev); 143 144 intel_vga_set_state(i915, enable_decode); 145 146 if (enable_decode) 147 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | 148 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 149 else 150 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 151 #endif 152 } 153 154 int intel_vga_register(struct drm_i915_private *i915) 155 { 156 157 struct pci_dev *pdev = i915->drm.pdev; 158 int ret; 159 160 /* 161 * If we have > 1 VGA cards, then we need to arbitrate access to the 162 * common VGA resources. 163 * 164 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA), 165 * then we do not take part in VGA arbitration and the 166 * vga_client_register() fails with -ENODEV. 167 */ 168 ret = vga_client_register(pdev, intel_vga_set_decode); 169 if (ret && ret != -ENODEV) 170 return ret; 171 172 return 0; 173 } 174 175 void intel_vga_unregister(struct drm_i915_private *i915) 176 { 177 struct pci_dev *pdev = i915->drm.pdev; 178 179 vga_client_unregister(pdev); 180 } 181