1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33 #include <linux/kernel.h> 34 #include <linux/moduleparam.h> 35 #include <linux/pwm.h> 36 37 #include "intel_connector.h" 38 #include "intel_de.h" 39 #include "intel_display_types.h" 40 #include "intel_dp_aux_backlight.h" 41 #include "intel_dsi_dcs_backlight.h" 42 #include "intel_panel.h" 43 44 void 45 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 46 struct drm_display_mode *adjusted_mode) 47 { 48 drm_mode_copy(adjusted_mode, fixed_mode); 49 50 drm_mode_set_crtcinfo(adjusted_mode, 0); 51 } 52 53 static bool is_downclock_mode(const struct drm_display_mode *downclock_mode, 54 const struct drm_display_mode *fixed_mode) 55 { 56 return drm_mode_match(downclock_mode, fixed_mode, 57 DRM_MODE_MATCH_TIMINGS | 58 DRM_MODE_MATCH_FLAGS | 59 DRM_MODE_MATCH_3D_FLAGS) && 60 downclock_mode->clock < fixed_mode->clock; 61 } 62 63 struct drm_display_mode * 64 intel_panel_edid_downclock_mode(struct intel_connector *connector, 65 const struct drm_display_mode *fixed_mode) 66 { 67 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 68 const struct drm_display_mode *scan, *best_mode = NULL; 69 struct drm_display_mode *downclock_mode; 70 int best_clock = fixed_mode->clock; 71 72 list_for_each_entry(scan, &connector->base.probed_modes, head) { 73 /* 74 * If one mode has the same resolution with the fixed_panel 75 * mode while they have the different refresh rate, it means 76 * that the reduced downclock is found. In such 77 * case we can set the different FPx0/1 to dynamically select 78 * between low and high frequency. 79 */ 80 if (is_downclock_mode(scan, fixed_mode) && 81 scan->clock < best_clock) { 82 /* 83 * The downclock is already found. But we 84 * expect to find the lower downclock. 85 */ 86 best_clock = scan->clock; 87 best_mode = scan; 88 } 89 } 90 91 if (!best_mode) 92 return NULL; 93 94 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode); 95 if (!downclock_mode) 96 return NULL; 97 98 drm_dbg_kms(&dev_priv->drm, 99 "[CONNECTOR:%d:%s] using downclock mode from EDID: ", 100 connector->base.base.id, connector->base.name); 101 drm_mode_debug_printmodeline(downclock_mode); 102 103 return downclock_mode; 104 } 105 106 struct drm_display_mode * 107 intel_panel_edid_fixed_mode(struct intel_connector *connector) 108 { 109 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 110 const struct drm_display_mode *scan; 111 struct drm_display_mode *fixed_mode; 112 113 if (list_empty(&connector->base.probed_modes)) 114 return NULL; 115 116 /* prefer fixed mode from EDID if available */ 117 list_for_each_entry(scan, &connector->base.probed_modes, head) { 118 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0) 119 continue; 120 121 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 122 if (!fixed_mode) 123 return NULL; 124 125 drm_dbg_kms(&dev_priv->drm, 126 "[CONNECTOR:%d:%s] using preferred mode from EDID: ", 127 connector->base.base.id, connector->base.name); 128 drm_mode_debug_printmodeline(fixed_mode); 129 130 return fixed_mode; 131 } 132 133 scan = list_first_entry(&connector->base.probed_modes, 134 typeof(*scan), head); 135 136 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 137 if (!fixed_mode) 138 return NULL; 139 140 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 141 142 drm_dbg_kms(&dev_priv->drm, 143 "[CONNECTOR:%d:%s] using first mode from EDID: ", 144 connector->base.base.id, connector->base.name); 145 drm_mode_debug_printmodeline(fixed_mode); 146 147 return fixed_mode; 148 } 149 150 struct drm_display_mode * 151 intel_panel_vbt_fixed_mode(struct intel_connector *connector) 152 { 153 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 154 struct drm_display_info *info = &connector->base.display_info; 155 struct drm_display_mode *fixed_mode; 156 157 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 158 return NULL; 159 160 fixed_mode = drm_mode_duplicate(&dev_priv->drm, 161 dev_priv->vbt.lfp_lvds_vbt_mode); 162 if (!fixed_mode) 163 return NULL; 164 165 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 166 167 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", 168 connector->base.base.id, connector->base.name); 169 drm_mode_debug_printmodeline(fixed_mode); 170 171 info->width_mm = fixed_mode->width_mm; 172 info->height_mm = fixed_mode->height_mm; 173 174 return fixed_mode; 175 } 176 177 /* adjusted_mode has been preset to be the panel's fixed mode */ 178 int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, 179 const struct drm_connector_state *conn_state) 180 { 181 const struct drm_display_mode *adjusted_mode = 182 &crtc_state->hw.adjusted_mode; 183 int x, y, width, height; 184 185 /* Native modes don't need fitting */ 186 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 187 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h && 188 crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) 189 return 0; 190 191 switch (conn_state->scaling_mode) { 192 case DRM_MODE_SCALE_CENTER: 193 width = crtc_state->pipe_src_w; 194 height = crtc_state->pipe_src_h; 195 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 196 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 197 break; 198 199 case DRM_MODE_SCALE_ASPECT: 200 /* Scale but preserve the aspect ratio */ 201 { 202 u32 scaled_width = adjusted_mode->crtc_hdisplay 203 * crtc_state->pipe_src_h; 204 u32 scaled_height = crtc_state->pipe_src_w 205 * adjusted_mode->crtc_vdisplay; 206 if (scaled_width > scaled_height) { /* pillar */ 207 width = scaled_height / crtc_state->pipe_src_h; 208 if (width & 1) 209 width++; 210 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 211 y = 0; 212 height = adjusted_mode->crtc_vdisplay; 213 } else if (scaled_width < scaled_height) { /* letter */ 214 height = scaled_width / crtc_state->pipe_src_w; 215 if (height & 1) 216 height++; 217 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 218 x = 0; 219 width = adjusted_mode->crtc_hdisplay; 220 } else { 221 x = y = 0; 222 width = adjusted_mode->crtc_hdisplay; 223 height = adjusted_mode->crtc_vdisplay; 224 } 225 } 226 break; 227 228 case DRM_MODE_SCALE_NONE: 229 WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w); 230 WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h); 231 fallthrough; 232 case DRM_MODE_SCALE_FULLSCREEN: 233 x = y = 0; 234 width = adjusted_mode->crtc_hdisplay; 235 height = adjusted_mode->crtc_vdisplay; 236 break; 237 238 default: 239 MISSING_CASE(conn_state->scaling_mode); 240 return -EINVAL; 241 } 242 243 drm_rect_init(&crtc_state->pch_pfit.dst, 244 x, y, width, height); 245 crtc_state->pch_pfit.enabled = true; 246 247 return 0; 248 } 249 250 static void 251 centre_horizontally(struct drm_display_mode *adjusted_mode, 252 int width) 253 { 254 u32 border, sync_pos, blank_width, sync_width; 255 256 /* keep the hsync and hblank widths constant */ 257 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 258 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 259 sync_pos = (blank_width - sync_width + 1) / 2; 260 261 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 262 border += border & 1; /* make the border even */ 263 264 adjusted_mode->crtc_hdisplay = width; 265 adjusted_mode->crtc_hblank_start = width + border; 266 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 267 268 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 269 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 270 } 271 272 static void 273 centre_vertically(struct drm_display_mode *adjusted_mode, 274 int height) 275 { 276 u32 border, sync_pos, blank_width, sync_width; 277 278 /* keep the vsync and vblank widths constant */ 279 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 280 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 281 sync_pos = (blank_width - sync_width + 1) / 2; 282 283 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 284 285 adjusted_mode->crtc_vdisplay = height; 286 adjusted_mode->crtc_vblank_start = height + border; 287 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 288 289 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 290 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 291 } 292 293 static u32 panel_fitter_scaling(u32 source, u32 target) 294 { 295 /* 296 * Floating point operation is not supported. So the FACTOR 297 * is defined, which can avoid the floating point computation 298 * when calculating the panel ratio. 299 */ 300 #define ACCURACY 12 301 #define FACTOR (1 << ACCURACY) 302 u32 ratio = source * FACTOR / target; 303 return (FACTOR * ratio + FACTOR/2) / FACTOR; 304 } 305 306 static void i965_scale_aspect(struct intel_crtc_state *crtc_state, 307 u32 *pfit_control) 308 { 309 const struct drm_display_mode *adjusted_mode = 310 &crtc_state->hw.adjusted_mode; 311 u32 scaled_width = adjusted_mode->crtc_hdisplay * 312 crtc_state->pipe_src_h; 313 u32 scaled_height = crtc_state->pipe_src_w * 314 adjusted_mode->crtc_vdisplay; 315 316 /* 965+ is easy, it does everything in hw */ 317 if (scaled_width > scaled_height) 318 *pfit_control |= PFIT_ENABLE | 319 PFIT_SCALING_PILLAR; 320 else if (scaled_width < scaled_height) 321 *pfit_control |= PFIT_ENABLE | 322 PFIT_SCALING_LETTER; 323 else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w) 324 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 325 } 326 327 static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state, 328 u32 *pfit_control, u32 *pfit_pgm_ratios, 329 u32 *border) 330 { 331 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 332 u32 scaled_width = adjusted_mode->crtc_hdisplay * 333 crtc_state->pipe_src_h; 334 u32 scaled_height = crtc_state->pipe_src_w * 335 adjusted_mode->crtc_vdisplay; 336 u32 bits; 337 338 /* 339 * For earlier chips we have to calculate the scaling 340 * ratio by hand and program it into the 341 * PFIT_PGM_RATIO register 342 */ 343 if (scaled_width > scaled_height) { /* pillar */ 344 centre_horizontally(adjusted_mode, 345 scaled_height / 346 crtc_state->pipe_src_h); 347 348 *border = LVDS_BORDER_ENABLE; 349 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) { 350 bits = panel_fitter_scaling(crtc_state->pipe_src_h, 351 adjusted_mode->crtc_vdisplay); 352 353 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 354 bits << PFIT_VERT_SCALE_SHIFT); 355 *pfit_control |= (PFIT_ENABLE | 356 VERT_INTERP_BILINEAR | 357 HORIZ_INTERP_BILINEAR); 358 } 359 } else if (scaled_width < scaled_height) { /* letter */ 360 centre_vertically(adjusted_mode, 361 scaled_width / 362 crtc_state->pipe_src_w); 363 364 *border = LVDS_BORDER_ENABLE; 365 if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 366 bits = panel_fitter_scaling(crtc_state->pipe_src_w, 367 adjusted_mode->crtc_hdisplay); 368 369 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 370 bits << PFIT_VERT_SCALE_SHIFT); 371 *pfit_control |= (PFIT_ENABLE | 372 VERT_INTERP_BILINEAR | 373 HORIZ_INTERP_BILINEAR); 374 } 375 } else { 376 /* Aspects match, Let hw scale both directions */ 377 *pfit_control |= (PFIT_ENABLE | 378 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 379 VERT_INTERP_BILINEAR | 380 HORIZ_INTERP_BILINEAR); 381 } 382 } 383 384 int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state, 385 const struct drm_connector_state *conn_state) 386 { 387 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 388 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 389 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 390 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 391 392 /* Native modes don't need fitting */ 393 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 394 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h) 395 goto out; 396 397 switch (conn_state->scaling_mode) { 398 case DRM_MODE_SCALE_CENTER: 399 /* 400 * For centered modes, we have to calculate border widths & 401 * heights and modify the values programmed into the CRTC. 402 */ 403 centre_horizontally(adjusted_mode, crtc_state->pipe_src_w); 404 centre_vertically(adjusted_mode, crtc_state->pipe_src_h); 405 border = LVDS_BORDER_ENABLE; 406 break; 407 case DRM_MODE_SCALE_ASPECT: 408 /* Scale but preserve the aspect ratio */ 409 if (DISPLAY_VER(dev_priv) >= 4) 410 i965_scale_aspect(crtc_state, &pfit_control); 411 else 412 i9xx_scale_aspect(crtc_state, &pfit_control, 413 &pfit_pgm_ratios, &border); 414 break; 415 case DRM_MODE_SCALE_FULLSCREEN: 416 /* 417 * Full scaling, even if it changes the aspect ratio. 418 * Fortunately this is all done for us in hw. 419 */ 420 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay || 421 crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 422 pfit_control |= PFIT_ENABLE; 423 if (DISPLAY_VER(dev_priv) >= 4) 424 pfit_control |= PFIT_SCALING_AUTO; 425 else 426 pfit_control |= (VERT_AUTO_SCALE | 427 VERT_INTERP_BILINEAR | 428 HORIZ_AUTO_SCALE | 429 HORIZ_INTERP_BILINEAR); 430 } 431 break; 432 default: 433 MISSING_CASE(conn_state->scaling_mode); 434 return -EINVAL; 435 } 436 437 /* 965+ wants fuzzy fitting */ 438 /* FIXME: handle multiple panels by failing gracefully */ 439 if (DISPLAY_VER(dev_priv) >= 4) 440 pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY; 441 442 out: 443 if ((pfit_control & PFIT_ENABLE) == 0) { 444 pfit_control = 0; 445 pfit_pgm_ratios = 0; 446 } 447 448 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 449 if (DISPLAY_VER(dev_priv) < 4 && crtc_state->pipe_bpp == 18) 450 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 451 452 crtc_state->gmch_pfit.control = pfit_control; 453 crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 454 crtc_state->gmch_pfit.lvds_border_bits = border; 455 456 return 0; 457 } 458 459 /** 460 * scale - scale values from one range to another 461 * @source_val: value in range [@source_min..@source_max] 462 * @source_min: minimum legal value for @source_val 463 * @source_max: maximum legal value for @source_val 464 * @target_min: corresponding target value for @source_min 465 * @target_max: corresponding target value for @source_max 466 * 467 * Return @source_val in range [@source_min..@source_max] scaled to range 468 * [@target_min..@target_max]. 469 */ 470 static u32 scale(u32 source_val, 471 u32 source_min, u32 source_max, 472 u32 target_min, u32 target_max) 473 { 474 u64 target_val; 475 476 WARN_ON(source_min > source_max); 477 WARN_ON(target_min > target_max); 478 479 /* defensive */ 480 source_val = clamp(source_val, source_min, source_max); 481 482 /* avoid overflows */ 483 target_val = mul_u32_u32(source_val - source_min, 484 target_max - target_min); 485 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); 486 target_val += target_min; 487 488 return target_val; 489 } 490 491 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 492 * to [hw_min..hw_max]. */ 493 static u32 clamp_user_to_hw(struct intel_connector *connector, 494 u32 user_level, u32 user_max) 495 { 496 struct intel_panel *panel = &connector->panel; 497 u32 hw_level; 498 499 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 500 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 501 502 return hw_level; 503 } 504 505 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 506 static u32 scale_hw_to_user(struct intel_connector *connector, 507 u32 hw_level, u32 user_max) 508 { 509 struct intel_panel *panel = &connector->panel; 510 511 return scale(hw_level, panel->backlight.min, panel->backlight.max, 512 0, user_max); 513 } 514 515 u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val) 516 { 517 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 518 struct intel_panel *panel = &connector->panel; 519 520 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 521 522 if (dev_priv->params.invert_brightness < 0) 523 return val; 524 525 if (dev_priv->params.invert_brightness > 0 || 526 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 527 return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; 528 } 529 530 return val; 531 } 532 533 void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) 534 { 535 struct intel_connector *connector = to_intel_connector(conn_state->connector); 536 struct drm_i915_private *i915 = to_i915(connector->base.dev); 537 struct intel_panel *panel = &connector->panel; 538 539 drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val); 540 panel->backlight.pwm_funcs->set(conn_state, val); 541 } 542 543 u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) 544 { 545 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 546 struct intel_panel *panel = &connector->panel; 547 548 drm_WARN_ON_ONCE(&dev_priv->drm, 549 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); 550 551 val = scale(val, panel->backlight.min, panel->backlight.max, 552 panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); 553 554 return intel_panel_invert_pwm_level(connector, val); 555 } 556 557 u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) 558 { 559 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 560 struct intel_panel *panel = &connector->panel; 561 562 drm_WARN_ON_ONCE(&dev_priv->drm, 563 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); 564 565 if (dev_priv->params.invert_brightness > 0 || 566 (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)) 567 val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); 568 569 return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max, 570 panel->backlight.min, panel->backlight.max); 571 } 572 573 static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused) 574 { 575 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 576 577 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 578 } 579 580 static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused) 581 { 582 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 583 584 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 585 } 586 587 static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused) 588 { 589 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 590 struct intel_panel *panel = &connector->panel; 591 u32 val; 592 593 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 594 if (DISPLAY_VER(dev_priv) < 4) 595 val >>= 1; 596 597 if (panel->backlight.combination_mode) { 598 u8 lbpc; 599 600 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc); 601 val *= lbpc; 602 } 603 604 return val; 605 } 606 607 static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) 608 { 609 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 610 611 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 612 return 0; 613 614 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 615 } 616 617 static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused) 618 { 619 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 620 struct intel_panel *panel = &connector->panel; 621 622 return intel_de_read(dev_priv, 623 BXT_BLC_PWM_DUTY(panel->backlight.controller)); 624 } 625 626 static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused) 627 { 628 STUB(); 629 return 0; 630 #ifdef notyet 631 struct intel_panel *panel = &connector->panel; 632 struct pwm_state state; 633 634 pwm_get_state(panel->backlight.pwm, &state); 635 return pwm_get_relative_duty_cycle(&state, 100); 636 #endif 637 } 638 639 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 640 { 641 struct intel_connector *connector = to_intel_connector(conn_state->connector); 642 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 643 644 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 645 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); 646 } 647 648 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 649 { 650 struct intel_connector *connector = to_intel_connector(conn_state->connector); 651 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 652 u32 tmp; 653 654 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 655 intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); 656 } 657 658 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 659 { 660 struct intel_connector *connector = to_intel_connector(conn_state->connector); 661 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 662 struct intel_panel *panel = &connector->panel; 663 u32 tmp, mask; 664 665 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 666 667 if (panel->backlight.combination_mode) { 668 u8 lbpc; 669 670 lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1; 671 level /= lbpc; 672 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc); 673 } 674 675 if (DISPLAY_VER(dev_priv) == 4) { 676 mask = BACKLIGHT_DUTY_CYCLE_MASK; 677 } else { 678 level <<= 1; 679 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 680 } 681 682 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; 683 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); 684 } 685 686 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 687 { 688 struct intel_connector *connector = to_intel_connector(conn_state->connector); 689 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 690 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 691 u32 tmp; 692 693 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 694 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); 695 } 696 697 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 698 { 699 struct intel_connector *connector = to_intel_connector(conn_state->connector); 700 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 701 struct intel_panel *panel = &connector->panel; 702 703 intel_de_write(dev_priv, 704 BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 705 } 706 707 static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 708 { 709 STUB(); 710 #ifdef notyet 711 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 712 713 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 714 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 715 #endif 716 } 717 718 static void 719 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 720 { 721 struct intel_connector *connector = to_intel_connector(conn_state->connector); 722 struct drm_i915_private *i915 = to_i915(connector->base.dev); 723 struct intel_panel *panel = &connector->panel; 724 725 drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level); 726 727 panel->backlight.funcs->set(conn_state, level); 728 } 729 730 /* set backlight brightness to level in range [0..max], assuming hw min is 731 * respected. 732 */ 733 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 734 u32 user_level, u32 user_max) 735 { 736 struct intel_connector *connector = to_intel_connector(conn_state->connector); 737 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 738 struct intel_panel *panel = &connector->panel; 739 u32 hw_level; 740 741 /* 742 * Lack of crtc may occur during driver init because 743 * connection_mutex isn't held across the entire backlight 744 * setup + modeset readout, and the BIOS can issue the 745 * requests at any time. 746 */ 747 if (!panel->backlight.present || !conn_state->crtc) 748 return; 749 750 mutex_lock(&dev_priv->backlight_lock); 751 752 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 753 754 hw_level = clamp_user_to_hw(connector, user_level, user_max); 755 panel->backlight.level = hw_level; 756 757 if (panel->backlight.device) 758 panel->backlight.device->props.brightness = 759 scale_hw_to_user(connector, 760 panel->backlight.level, 761 panel->backlight.device->props.max_brightness); 762 763 if (panel->backlight.enabled) 764 intel_panel_actually_set_backlight(conn_state, hw_level); 765 766 mutex_unlock(&dev_priv->backlight_lock); 767 } 768 769 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) 770 { 771 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 772 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 773 u32 tmp; 774 775 intel_panel_set_pwm_level(old_conn_state, level); 776 777 /* 778 * Although we don't support or enable CPU PWM with LPT/SPT based 779 * systems, it may have been enabled prior to loading the 780 * driver. Disable to avoid warnings on LCPLL disable. 781 * 782 * This needs rework if we need to add support for CPU PWM on PCH split 783 * platforms. 784 */ 785 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 786 if (tmp & BLM_PWM_ENABLE) { 787 drm_dbg_kms(&dev_priv->drm, 788 "cpu backlight was enabled, disabling\n"); 789 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 790 tmp & ~BLM_PWM_ENABLE); 791 } 792 793 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 794 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 795 } 796 797 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 798 { 799 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 800 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 801 u32 tmp; 802 803 intel_panel_set_pwm_level(old_conn_state, val); 804 805 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 806 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 807 808 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 809 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 810 } 811 812 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 813 { 814 intel_panel_set_pwm_level(old_conn_state, val); 815 } 816 817 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 818 { 819 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 820 u32 tmp; 821 822 intel_panel_set_pwm_level(old_conn_state, val); 823 824 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); 825 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 826 } 827 828 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 829 { 830 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 831 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 832 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 833 u32 tmp; 834 835 intel_panel_set_pwm_level(old_conn_state, val); 836 837 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 838 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 839 tmp & ~BLM_PWM_ENABLE); 840 } 841 842 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 843 { 844 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 845 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 846 struct intel_panel *panel = &connector->panel; 847 u32 tmp; 848 849 intel_panel_set_pwm_level(old_conn_state, val); 850 851 tmp = intel_de_read(dev_priv, 852 BXT_BLC_PWM_CTL(panel->backlight.controller)); 853 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 854 tmp & ~BXT_BLC_PWM_ENABLE); 855 856 if (panel->backlight.controller == 1) { 857 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 858 val &= ~UTIL_PIN_ENABLE; 859 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 860 } 861 } 862 863 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 864 { 865 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 866 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 867 struct intel_panel *panel = &connector->panel; 868 u32 tmp; 869 870 intel_panel_set_pwm_level(old_conn_state, val); 871 872 tmp = intel_de_read(dev_priv, 873 BXT_BLC_PWM_CTL(panel->backlight.controller)); 874 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 875 tmp & ~BXT_BLC_PWM_ENABLE); 876 } 877 878 static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) 879 { 880 STUB(); 881 #ifdef notyet 882 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 883 struct intel_panel *panel = &connector->panel; 884 885 panel->backlight.pwm_state.enabled = false; 886 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 887 #endif 888 } 889 890 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 891 { 892 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 893 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 894 struct intel_panel *panel = &connector->panel; 895 896 if (!panel->backlight.present) 897 return; 898 899 /* 900 * Do not disable backlight on the vga_switcheroo path. When switching 901 * away from i915, the other client may depend on i915 to handle the 902 * backlight. This will leave the backlight on unnecessarily when 903 * another client is not activated. 904 */ 905 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 906 drm_dbg_kms(&dev_priv->drm, 907 "Skipping backlight disable on vga switch\n"); 908 return; 909 } 910 911 mutex_lock(&dev_priv->backlight_lock); 912 913 if (panel->backlight.device) 914 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 915 panel->backlight.enabled = false; 916 panel->backlight.funcs->disable(old_conn_state, 0); 917 918 mutex_unlock(&dev_priv->backlight_lock); 919 } 920 921 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 922 const struct drm_connector_state *conn_state, u32 level) 923 { 924 struct intel_connector *connector = to_intel_connector(conn_state->connector); 925 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 926 struct intel_panel *panel = &connector->panel; 927 u32 pch_ctl1, pch_ctl2, schicken; 928 929 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 930 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 931 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 932 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 933 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 934 } 935 936 if (HAS_PCH_LPT(dev_priv)) { 937 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); 938 if (panel->backlight.alternate_pwm_increment) 939 schicken |= LPT_PWM_GRANULARITY; 940 else 941 schicken &= ~LPT_PWM_GRANULARITY; 942 intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); 943 } else { 944 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); 945 if (panel->backlight.alternate_pwm_increment) 946 schicken |= SPT_PWM_GRANULARITY; 947 else 948 schicken &= ~SPT_PWM_GRANULARITY; 949 intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); 950 } 951 952 pch_ctl2 = panel->backlight.pwm_level_max << 16; 953 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 954 955 pch_ctl1 = 0; 956 if (panel->backlight.active_low_pwm) 957 pch_ctl1 |= BLM_PCH_POLARITY; 958 959 /* After LPT, override is the default. */ 960 if (HAS_PCH_LPT(dev_priv)) 961 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 962 963 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 964 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 965 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 966 pch_ctl1 | BLM_PCH_PWM_ENABLE); 967 968 /* This won't stick until the above enable. */ 969 intel_panel_set_pwm_level(conn_state, level); 970 } 971 972 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 973 const struct drm_connector_state *conn_state, u32 level) 974 { 975 struct intel_connector *connector = to_intel_connector(conn_state->connector); 976 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 977 struct intel_panel *panel = &connector->panel; 978 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 979 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 980 981 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 982 if (cpu_ctl2 & BLM_PWM_ENABLE) { 983 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); 984 cpu_ctl2 &= ~BLM_PWM_ENABLE; 985 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 986 } 987 988 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 989 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 990 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 991 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 992 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 993 } 994 995 if (cpu_transcoder == TRANSCODER_EDP) 996 cpu_ctl2 = BLM_TRANSCODER_EDP; 997 else 998 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 999 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 1000 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); 1001 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 1002 1003 /* This won't stick until the above enable. */ 1004 intel_panel_set_pwm_level(conn_state, level); 1005 1006 pch_ctl2 = panel->backlight.pwm_level_max << 16; 1007 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 1008 1009 pch_ctl1 = 0; 1010 if (panel->backlight.active_low_pwm) 1011 pch_ctl1 |= BLM_PCH_POLARITY; 1012 1013 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 1014 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 1015 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1016 pch_ctl1 | BLM_PCH_PWM_ENABLE); 1017 } 1018 1019 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 1020 const struct drm_connector_state *conn_state, u32 level) 1021 { 1022 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1023 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1024 struct intel_panel *panel = &connector->panel; 1025 u32 ctl, freq; 1026 1027 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1028 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 1029 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1030 intel_de_write(dev_priv, BLC_PWM_CTL, 0); 1031 } 1032 1033 freq = panel->backlight.pwm_level_max; 1034 if (panel->backlight.combination_mode) 1035 freq /= 0xff; 1036 1037 ctl = freq << 17; 1038 if (panel->backlight.combination_mode) 1039 ctl |= BLM_LEGACY_MODE; 1040 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 1041 ctl |= BLM_POLARITY_PNV; 1042 1043 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1044 intel_de_posting_read(dev_priv, BLC_PWM_CTL); 1045 1046 /* XXX: combine this into above write? */ 1047 intel_panel_set_pwm_level(conn_state, level); 1048 1049 /* 1050 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 1051 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 1052 * that has backlight. 1053 */ 1054 if (DISPLAY_VER(dev_priv) == 2) 1055 intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 1056 } 1057 1058 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 1059 const struct drm_connector_state *conn_state, u32 level) 1060 { 1061 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1062 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1063 struct intel_panel *panel = &connector->panel; 1064 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1065 u32 ctl, ctl2, freq; 1066 1067 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1068 if (ctl2 & BLM_PWM_ENABLE) { 1069 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1070 ctl2 &= ~BLM_PWM_ENABLE; 1071 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1072 } 1073 1074 freq = panel->backlight.pwm_level_max; 1075 if (panel->backlight.combination_mode) 1076 freq /= 0xff; 1077 1078 ctl = freq << 16; 1079 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1080 1081 ctl2 = BLM_PIPE(pipe); 1082 if (panel->backlight.combination_mode) 1083 ctl2 |= BLM_COMBINATION_MODE; 1084 if (panel->backlight.active_low_pwm) 1085 ctl2 |= BLM_POLARITY_I965; 1086 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1087 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); 1088 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1089 1090 intel_panel_set_pwm_level(conn_state, level); 1091 } 1092 1093 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1094 const struct drm_connector_state *conn_state, u32 level) 1095 { 1096 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1097 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1098 struct intel_panel *panel = &connector->panel; 1099 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1100 u32 ctl, ctl2; 1101 1102 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1103 if (ctl2 & BLM_PWM_ENABLE) { 1104 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1105 ctl2 &= ~BLM_PWM_ENABLE; 1106 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1107 } 1108 1109 ctl = panel->backlight.pwm_level_max << 16; 1110 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); 1111 1112 /* XXX: combine this into above write? */ 1113 intel_panel_set_pwm_level(conn_state, level); 1114 1115 ctl2 = 0; 1116 if (panel->backlight.active_low_pwm) 1117 ctl2 |= BLM_POLARITY_I965; 1118 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1119 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1120 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 1121 ctl2 | BLM_PWM_ENABLE); 1122 } 1123 1124 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1125 const struct drm_connector_state *conn_state, u32 level) 1126 { 1127 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1128 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1129 struct intel_panel *panel = &connector->panel; 1130 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1131 u32 pwm_ctl, val; 1132 1133 /* Controller 1 uses the utility pin. */ 1134 if (panel->backlight.controller == 1) { 1135 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1136 if (val & UTIL_PIN_ENABLE) { 1137 drm_dbg_kms(&dev_priv->drm, 1138 "util pin already enabled\n"); 1139 val &= ~UTIL_PIN_ENABLE; 1140 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 1141 } 1142 1143 val = 0; 1144 if (panel->backlight.util_pin_active_low) 1145 val |= UTIL_PIN_POLARITY; 1146 intel_de_write(dev_priv, UTIL_PIN_CTL, 1147 val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1148 } 1149 1150 pwm_ctl = intel_de_read(dev_priv, 1151 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1152 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1153 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1154 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1155 intel_de_write(dev_priv, 1156 BXT_BLC_PWM_CTL(panel->backlight.controller), 1157 pwm_ctl); 1158 } 1159 1160 intel_de_write(dev_priv, 1161 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1162 panel->backlight.pwm_level_max); 1163 1164 intel_panel_set_pwm_level(conn_state, level); 1165 1166 pwm_ctl = 0; 1167 if (panel->backlight.active_low_pwm) 1168 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1169 1170 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1171 pwm_ctl); 1172 intel_de_posting_read(dev_priv, 1173 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1174 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1175 pwm_ctl | BXT_BLC_PWM_ENABLE); 1176 } 1177 1178 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1179 const struct drm_connector_state *conn_state, u32 level) 1180 { 1181 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1182 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1183 struct intel_panel *panel = &connector->panel; 1184 u32 pwm_ctl; 1185 1186 pwm_ctl = intel_de_read(dev_priv, 1187 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1188 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1189 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1190 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1191 intel_de_write(dev_priv, 1192 BXT_BLC_PWM_CTL(panel->backlight.controller), 1193 pwm_ctl); 1194 } 1195 1196 intel_de_write(dev_priv, 1197 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1198 panel->backlight.pwm_level_max); 1199 1200 intel_panel_set_pwm_level(conn_state, level); 1201 1202 pwm_ctl = 0; 1203 if (panel->backlight.active_low_pwm) 1204 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1205 1206 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1207 pwm_ctl); 1208 intel_de_posting_read(dev_priv, 1209 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1210 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1211 pwm_ctl | BXT_BLC_PWM_ENABLE); 1212 } 1213 1214 static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1215 const struct drm_connector_state *conn_state, u32 level) 1216 { 1217 STUB(); 1218 #ifdef notyet 1219 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1220 struct intel_panel *panel = &connector->panel; 1221 1222 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 1223 panel->backlight.pwm_state.enabled = true; 1224 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1225 #endif 1226 } 1227 1228 static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1229 const struct drm_connector_state *conn_state) 1230 { 1231 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1232 struct intel_panel *panel = &connector->panel; 1233 1234 WARN_ON(panel->backlight.max == 0); 1235 1236 if (panel->backlight.level <= panel->backlight.min) { 1237 panel->backlight.level = panel->backlight.max; 1238 if (panel->backlight.device) 1239 panel->backlight.device->props.brightness = 1240 scale_hw_to_user(connector, 1241 panel->backlight.level, 1242 panel->backlight.device->props.max_brightness); 1243 } 1244 1245 panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level); 1246 panel->backlight.enabled = true; 1247 if (panel->backlight.device) 1248 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1249 } 1250 1251 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1252 const struct drm_connector_state *conn_state) 1253 { 1254 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1255 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1256 struct intel_panel *panel = &connector->panel; 1257 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1258 1259 if (!panel->backlight.present) 1260 return; 1261 1262 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); 1263 1264 mutex_lock(&dev_priv->backlight_lock); 1265 1266 __intel_panel_enable_backlight(crtc_state, conn_state); 1267 1268 mutex_unlock(&dev_priv->backlight_lock); 1269 } 1270 1271 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1272 static u32 intel_panel_get_backlight(struct intel_connector *connector) 1273 { 1274 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1275 struct intel_panel *panel = &connector->panel; 1276 u32 val = 0; 1277 1278 mutex_lock(&dev_priv->backlight_lock); 1279 1280 if (panel->backlight.enabled) 1281 val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector)); 1282 1283 mutex_unlock(&dev_priv->backlight_lock); 1284 1285 drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val); 1286 return val; 1287 } 1288 1289 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 1290 static u32 scale_user_to_hw(struct intel_connector *connector, 1291 u32 user_level, u32 user_max) 1292 { 1293 struct intel_panel *panel = &connector->panel; 1294 1295 return scale(user_level, 0, user_max, 1296 panel->backlight.min, panel->backlight.max); 1297 } 1298 1299 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 1300 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 1301 u32 user_level, u32 user_max) 1302 { 1303 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1304 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1305 struct intel_panel *panel = &connector->panel; 1306 u32 hw_level; 1307 1308 if (!panel->backlight.present) 1309 return; 1310 1311 mutex_lock(&dev_priv->backlight_lock); 1312 1313 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1314 1315 hw_level = scale_user_to_hw(connector, user_level, user_max); 1316 panel->backlight.level = hw_level; 1317 1318 if (panel->backlight.enabled) 1319 intel_panel_actually_set_backlight(conn_state, hw_level); 1320 1321 mutex_unlock(&dev_priv->backlight_lock); 1322 } 1323 1324 static int intel_backlight_device_update_status(struct backlight_device *bd) 1325 { 1326 struct intel_connector *connector = bl_get_data(bd); 1327 struct intel_panel *panel = &connector->panel; 1328 struct drm_device *dev = connector->base.dev; 1329 1330 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1331 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1332 bd->props.brightness, bd->props.max_brightness); 1333 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1334 bd->props.max_brightness); 1335 1336 /* 1337 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1338 * backlight class device does not make it easy to to differentiate 1339 * between callbacks for brightness and bl_power, so our backlight_power 1340 * callback needs to take this into account. 1341 */ 1342 if (panel->backlight.enabled) { 1343 if (panel->backlight.power) { 1344 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1345 bd->props.brightness != 0; 1346 panel->backlight.power(connector, enable); 1347 } 1348 } else { 1349 bd->props.power = FB_BLANK_POWERDOWN; 1350 } 1351 1352 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1353 return 0; 1354 } 1355 1356 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1357 { 1358 struct intel_connector *connector = bl_get_data(bd); 1359 struct drm_device *dev = connector->base.dev; 1360 struct drm_i915_private *dev_priv = to_i915(dev); 1361 intel_wakeref_t wakeref; 1362 int ret = 0; 1363 1364 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { 1365 u32 hw_level; 1366 1367 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1368 1369 hw_level = intel_panel_get_backlight(connector); 1370 ret = scale_hw_to_user(connector, 1371 hw_level, bd->props.max_brightness); 1372 1373 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1374 } 1375 1376 return ret; 1377 } 1378 1379 static const struct backlight_ops intel_backlight_device_ops = { 1380 .update_status = intel_backlight_device_update_status, 1381 .get_brightness = intel_backlight_device_get_brightness, 1382 }; 1383 1384 int intel_backlight_device_register(struct intel_connector *connector) 1385 { 1386 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1387 struct intel_panel *panel = &connector->panel; 1388 struct backlight_properties props; 1389 struct backlight_device *bd; 1390 const char *name; 1391 int ret = 0; 1392 1393 if (WARN_ON(panel->backlight.device)) 1394 return -ENODEV; 1395 1396 if (!panel->backlight.present) 1397 return 0; 1398 1399 WARN_ON(panel->backlight.max == 0); 1400 1401 memset(&props, 0, sizeof(props)); 1402 props.type = BACKLIGHT_RAW; 1403 1404 /* 1405 * Note: Everything should work even if the backlight device max 1406 * presented to the userspace is arbitrarily chosen. 1407 */ 1408 props.max_brightness = panel->backlight.max; 1409 props.brightness = scale_hw_to_user(connector, 1410 panel->backlight.level, 1411 props.max_brightness); 1412 1413 if (panel->backlight.enabled) 1414 props.power = FB_BLANK_UNBLANK; 1415 else 1416 props.power = FB_BLANK_POWERDOWN; 1417 1418 name = kstrdup("intel_backlight", GFP_KERNEL); 1419 if (!name) 1420 return -ENOMEM; 1421 1422 bd = backlight_device_register(name, connector->base.kdev, connector, 1423 &intel_backlight_device_ops, &props); 1424 1425 /* 1426 * Using the same name independent of the drm device or connector 1427 * prevents registration of multiple backlight devices in the 1428 * driver. However, we need to use the default name for backward 1429 * compatibility. Use unique names for subsequent backlight devices as a 1430 * fallback when the default name already exists. 1431 */ 1432 if (IS_ERR(bd) && PTR_ERR(bd) == -EEXIST) { 1433 kfree(name); 1434 name = kasprintf(GFP_KERNEL, "card%d-%s-backlight", 1435 i915->drm.primary->index, connector->base.name); 1436 if (!name) 1437 return -ENOMEM; 1438 1439 bd = backlight_device_register(name, connector->base.kdev, connector, 1440 &intel_backlight_device_ops, &props); 1441 } 1442 1443 if (IS_ERR(bd)) { 1444 drm_err(&i915->drm, 1445 "[CONNECTOR:%d:%s] backlight device %s register failed: %ld\n", 1446 connector->base.base.id, connector->base.name, name, PTR_ERR(bd)); 1447 ret = PTR_ERR(bd); 1448 goto out; 1449 } 1450 1451 panel->backlight.device = bd; 1452 1453 drm_dbg_kms(&i915->drm, 1454 "[CONNECTOR:%d:%s] backlight device %s registered\n", 1455 connector->base.base.id, connector->base.name, name); 1456 1457 out: 1458 kfree(name); 1459 1460 return ret; 1461 } 1462 1463 void intel_backlight_device_unregister(struct intel_connector *connector) 1464 { 1465 struct intel_panel *panel = &connector->panel; 1466 1467 if (panel->backlight.device) { 1468 backlight_device_unregister(panel->backlight.device); 1469 panel->backlight.device = NULL; 1470 } 1471 } 1472 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1473 1474 /* 1475 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1476 * PWM increment = 1 1477 */ 1478 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1479 { 1480 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1481 1482 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1483 pwm_freq_hz); 1484 } 1485 1486 /* 1487 * BXT: PWM clock frequency = 19.2 MHz. 1488 */ 1489 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1490 { 1491 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1492 } 1493 1494 /* 1495 * SPT: This value represents the period of the PWM stream in clock periods 1496 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1497 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1498 */ 1499 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1500 { 1501 struct intel_panel *panel = &connector->panel; 1502 u32 mul; 1503 1504 if (panel->backlight.alternate_pwm_increment) 1505 mul = 128; 1506 else 1507 mul = 16; 1508 1509 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1510 } 1511 1512 /* 1513 * LPT: This value represents the period of the PWM stream in clock periods 1514 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1515 * LPT SOUTH_CHICKEN2 register bit 5). 1516 */ 1517 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1518 { 1519 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1520 struct intel_panel *panel = &connector->panel; 1521 u32 mul, clock; 1522 1523 if (panel->backlight.alternate_pwm_increment) 1524 mul = 16; 1525 else 1526 mul = 128; 1527 1528 if (HAS_PCH_LPT_H(dev_priv)) 1529 clock = MHz(135); /* LPT:H */ 1530 else 1531 clock = MHz(24); /* LPT:LP */ 1532 1533 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1534 } 1535 1536 /* 1537 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1538 * display raw clocks multiplied by 128. 1539 */ 1540 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1541 { 1542 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1543 1544 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1545 pwm_freq_hz * 128); 1546 } 1547 1548 /* 1549 * Gen2: This field determines the number of time base events (display core 1550 * clock frequency/32) in total for a complete cycle of modulated backlight 1551 * control. 1552 * 1553 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1554 * divided by 32. 1555 */ 1556 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1557 { 1558 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1559 int clock; 1560 1561 if (IS_PINEVIEW(dev_priv)) 1562 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1563 else 1564 clock = KHz(dev_priv->cdclk.hw.cdclk); 1565 1566 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1567 } 1568 1569 /* 1570 * Gen4: This value represents the period of the PWM stream in display core 1571 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1572 * 1573 */ 1574 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1575 { 1576 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1577 int clock; 1578 1579 if (IS_G4X(dev_priv)) 1580 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1581 else 1582 clock = KHz(dev_priv->cdclk.hw.cdclk); 1583 1584 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1585 } 1586 1587 /* 1588 * VLV: This value represents the period of the PWM stream in display core 1589 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1590 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1591 */ 1592 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1593 { 1594 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1595 int mul, clock; 1596 1597 if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1598 if (IS_CHERRYVIEW(dev_priv)) 1599 clock = KHz(19200); 1600 else 1601 clock = MHz(25); 1602 mul = 16; 1603 } else { 1604 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1605 mul = 128; 1606 } 1607 1608 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1609 } 1610 1611 static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv) 1612 { 1613 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1614 1615 if (pwm_freq_hz) { 1616 drm_dbg_kms(&dev_priv->drm, 1617 "VBT defined backlight frequency %u Hz\n", 1618 pwm_freq_hz); 1619 } else { 1620 pwm_freq_hz = 200; 1621 drm_dbg_kms(&dev_priv->drm, 1622 "default backlight frequency %u Hz\n", 1623 pwm_freq_hz); 1624 } 1625 1626 return pwm_freq_hz; 1627 } 1628 1629 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1630 { 1631 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1632 struct intel_panel *panel = &connector->panel; 1633 u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv); 1634 u32 pwm; 1635 1636 if (!panel->backlight.pwm_funcs->hz_to_pwm) { 1637 drm_dbg_kms(&dev_priv->drm, 1638 "backlight frequency conversion not supported\n"); 1639 return 0; 1640 } 1641 1642 pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz); 1643 if (!pwm) { 1644 drm_dbg_kms(&dev_priv->drm, 1645 "backlight frequency conversion failed\n"); 1646 return 0; 1647 } 1648 1649 return pwm; 1650 } 1651 1652 /* 1653 * Note: The setup hooks can't assume pipe is set! 1654 */ 1655 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1656 { 1657 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1658 struct intel_panel *panel = &connector->panel; 1659 int min; 1660 1661 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 1662 1663 /* 1664 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1665 * to problems. There are such machines out there. Either our 1666 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1667 * against this by letting the minimum be at most (arbitrarily chosen) 1668 * 25% of the max. 1669 */ 1670 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1671 if (min != dev_priv->vbt.backlight.min_brightness) { 1672 drm_dbg_kms(&dev_priv->drm, 1673 "clamping VBT min backlight %d/255 to %d/255\n", 1674 dev_priv->vbt.backlight.min_brightness, min); 1675 } 1676 1677 /* vbt value is a coefficient in range [0..255] */ 1678 return scale(min, 0, 255, 0, panel->backlight.pwm_level_max); 1679 } 1680 1681 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1682 { 1683 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1684 struct intel_panel *panel = &connector->panel; 1685 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1686 bool alt, cpu_mode; 1687 1688 if (HAS_PCH_LPT(dev_priv)) 1689 alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1690 else 1691 alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1692 panel->backlight.alternate_pwm_increment = alt; 1693 1694 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1695 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1696 1697 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1698 panel->backlight.pwm_level_max = pch_ctl2 >> 16; 1699 1700 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1701 1702 if (!panel->backlight.pwm_level_max) 1703 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1704 1705 if (!panel->backlight.pwm_level_max) 1706 return -ENODEV; 1707 1708 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1709 1710 panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1711 1712 cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) && 1713 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && 1714 (cpu_ctl2 & BLM_PWM_ENABLE); 1715 1716 if (cpu_mode) { 1717 val = pch_get_backlight(connector, unused); 1718 1719 drm_dbg_kms(&dev_priv->drm, 1720 "CPU backlight register was enabled, switching to PCH override\n"); 1721 1722 /* Write converted CPU PWM value to PCH override register */ 1723 lpt_set_backlight(connector->base.state, val); 1724 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1725 pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); 1726 1727 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 1728 cpu_ctl2 & ~BLM_PWM_ENABLE); 1729 } 1730 1731 return 0; 1732 } 1733 1734 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) 1735 { 1736 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1737 struct intel_panel *panel = &connector->panel; 1738 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 1739 1740 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1741 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1742 1743 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1744 panel->backlight.pwm_level_max = pch_ctl2 >> 16; 1745 1746 if (!panel->backlight.pwm_level_max) 1747 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1748 1749 if (!panel->backlight.pwm_level_max) 1750 return -ENODEV; 1751 1752 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1753 1754 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1755 panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1756 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1757 1758 return 0; 1759 } 1760 1761 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) 1762 { 1763 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1764 struct intel_panel *panel = &connector->panel; 1765 u32 ctl, val; 1766 1767 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1768 1769 if (DISPLAY_VER(dev_priv) == 2 || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1770 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1771 1772 if (IS_PINEVIEW(dev_priv)) 1773 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1774 1775 panel->backlight.pwm_level_max = ctl >> 17; 1776 1777 if (!panel->backlight.pwm_level_max) { 1778 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1779 panel->backlight.pwm_level_max >>= 1; 1780 } 1781 1782 if (!panel->backlight.pwm_level_max) 1783 return -ENODEV; 1784 1785 if (panel->backlight.combination_mode) 1786 panel->backlight.pwm_level_max *= 0xff; 1787 1788 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1789 1790 val = i9xx_get_backlight(connector, unused); 1791 val = intel_panel_invert_pwm_level(connector, val); 1792 val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); 1793 1794 panel->backlight.pwm_enabled = val != 0; 1795 1796 return 0; 1797 } 1798 1799 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) 1800 { 1801 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1802 struct intel_panel *panel = &connector->panel; 1803 u32 ctl, ctl2; 1804 1805 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1806 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1807 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1808 1809 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1810 panel->backlight.pwm_level_max = ctl >> 16; 1811 1812 if (!panel->backlight.pwm_level_max) 1813 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1814 1815 if (!panel->backlight.pwm_level_max) 1816 return -ENODEV; 1817 1818 if (panel->backlight.combination_mode) 1819 panel->backlight.pwm_level_max *= 0xff; 1820 1821 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1822 1823 panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; 1824 1825 return 0; 1826 } 1827 1828 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1829 { 1830 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1831 struct intel_panel *panel = &connector->panel; 1832 u32 ctl, ctl2; 1833 1834 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 1835 return -ENODEV; 1836 1837 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1838 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1839 1840 ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); 1841 panel->backlight.pwm_level_max = ctl >> 16; 1842 1843 if (!panel->backlight.pwm_level_max) 1844 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1845 1846 if (!panel->backlight.pwm_level_max) 1847 return -ENODEV; 1848 1849 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1850 1851 panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; 1852 1853 return 0; 1854 } 1855 1856 static int 1857 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1858 { 1859 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1860 struct intel_panel *panel = &connector->panel; 1861 u32 pwm_ctl, val; 1862 1863 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1864 1865 pwm_ctl = intel_de_read(dev_priv, 1866 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1867 1868 /* Controller 1 uses the utility pin. */ 1869 if (panel->backlight.controller == 1) { 1870 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1871 panel->backlight.util_pin_active_low = 1872 val & UTIL_PIN_POLARITY; 1873 } 1874 1875 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1876 panel->backlight.pwm_level_max = 1877 intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1878 1879 if (!panel->backlight.pwm_level_max) 1880 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1881 1882 if (!panel->backlight.pwm_level_max) 1883 return -ENODEV; 1884 1885 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1886 1887 panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1888 1889 return 0; 1890 } 1891 1892 static int 1893 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 1894 { 1895 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1896 struct intel_panel *panel = &connector->panel; 1897 u32 pwm_ctl; 1898 1899 /* 1900 * CNP has the BXT implementation of backlight, but with only one 1901 * controller. TODO: ICP has multiple controllers but we only use 1902 * controller 0 for now. 1903 */ 1904 panel->backlight.controller = 0; 1905 1906 pwm_ctl = intel_de_read(dev_priv, 1907 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1908 1909 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1910 panel->backlight.pwm_level_max = 1911 intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1912 1913 if (!panel->backlight.pwm_level_max) 1914 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1915 1916 if (!panel->backlight.pwm_level_max) 1917 return -ENODEV; 1918 1919 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1920 1921 panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1922 1923 return 0; 1924 } 1925 1926 static int ext_pwm_setup_backlight(struct intel_connector *connector, 1927 enum pipe pipe) 1928 { 1929 struct drm_device *dev = connector->base.dev; 1930 struct drm_i915_private *dev_priv = to_i915(dev); 1931 struct intel_panel *panel = &connector->panel; 1932 const char *desc; 1933 u32 level; 1934 1935 /* Get the right PWM chip for DSI backlight according to VBT */ 1936 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { 1937 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); 1938 desc = "PMIC"; 1939 } else { 1940 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); 1941 desc = "SoC"; 1942 } 1943 1944 if (IS_ERR(panel->backlight.pwm)) { 1945 drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", 1946 desc); 1947 panel->backlight.pwm = NULL; 1948 return -ENODEV; 1949 } 1950 1951 panel->backlight.pwm_level_max = 100; /* 100% */ 1952 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1953 1954 #ifdef notyet 1955 if (pwm_is_enabled(panel->backlight.pwm)) { 1956 /* PWM is already enabled, use existing settings */ 1957 pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1958 1959 level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state, 1960 100); 1961 level = intel_panel_invert_pwm_level(connector, level); 1962 panel->backlight.pwm_enabled = true; 1963 1964 drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n", 1965 NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, 1966 get_vbt_pwm_freq(dev_priv), level); 1967 } else { 1968 /* Set period from VBT frequency, leave other settings at 0. */ 1969 panel->backlight.pwm_state.period = 1970 NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv); 1971 } 1972 #else 1973 STUB(); 1974 #endif 1975 1976 drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", 1977 desc); 1978 return 0; 1979 } 1980 1981 static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 1982 { 1983 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1984 struct intel_panel *panel = &connector->panel; 1985 1986 panel->backlight.pwm_funcs->set(conn_state, 1987 intel_panel_invert_pwm_level(connector, level)); 1988 } 1989 1990 static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe) 1991 { 1992 struct intel_panel *panel = &connector->panel; 1993 1994 return intel_panel_invert_pwm_level(connector, 1995 panel->backlight.pwm_funcs->get(connector, pipe)); 1996 } 1997 1998 static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1999 const struct drm_connector_state *conn_state, u32 level) 2000 { 2001 struct intel_connector *connector = to_intel_connector(conn_state->connector); 2002 struct intel_panel *panel = &connector->panel; 2003 2004 panel->backlight.pwm_funcs->enable(crtc_state, conn_state, 2005 intel_panel_invert_pwm_level(connector, level)); 2006 } 2007 2008 static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level) 2009 { 2010 struct intel_connector *connector = to_intel_connector(conn_state->connector); 2011 struct intel_panel *panel = &connector->panel; 2012 2013 panel->backlight.pwm_funcs->disable(conn_state, 2014 intel_panel_invert_pwm_level(connector, level)); 2015 } 2016 2017 static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe) 2018 { 2019 struct intel_panel *panel = &connector->panel; 2020 int ret = panel->backlight.pwm_funcs->setup(connector, pipe); 2021 2022 if (ret < 0) 2023 return ret; 2024 2025 panel->backlight.min = panel->backlight.pwm_level_min; 2026 panel->backlight.max = panel->backlight.pwm_level_max; 2027 panel->backlight.level = intel_pwm_get_backlight(connector, pipe); 2028 panel->backlight.enabled = panel->backlight.pwm_enabled; 2029 2030 return 0; 2031 } 2032 2033 void intel_panel_update_backlight(struct intel_atomic_state *state, 2034 struct intel_encoder *encoder, 2035 const struct intel_crtc_state *crtc_state, 2036 const struct drm_connector_state *conn_state) 2037 { 2038 struct intel_connector *connector = to_intel_connector(conn_state->connector); 2039 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2040 struct intel_panel *panel = &connector->panel; 2041 2042 if (!panel->backlight.present) 2043 return; 2044 2045 mutex_lock(&dev_priv->backlight_lock); 2046 if (!panel->backlight.enabled) 2047 __intel_panel_enable_backlight(crtc_state, conn_state); 2048 2049 mutex_unlock(&dev_priv->backlight_lock); 2050 } 2051 2052 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) 2053 { 2054 struct drm_i915_private *dev_priv = to_i915(connector->dev); 2055 struct intel_connector *intel_connector = to_intel_connector(connector); 2056 struct intel_panel *panel = &intel_connector->panel; 2057 int ret; 2058 2059 if (!dev_priv->vbt.backlight.present) { 2060 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 2061 drm_dbg_kms(&dev_priv->drm, 2062 "no backlight present per VBT, but present per quirk\n"); 2063 } else { 2064 drm_dbg_kms(&dev_priv->drm, 2065 "no backlight present per VBT\n"); 2066 return 0; 2067 } 2068 } 2069 2070 /* ensure intel_panel has been initialized first */ 2071 if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs)) 2072 return -ENODEV; 2073 2074 /* set level and max in panel struct */ 2075 mutex_lock(&dev_priv->backlight_lock); 2076 ret = panel->backlight.funcs->setup(intel_connector, pipe); 2077 mutex_unlock(&dev_priv->backlight_lock); 2078 2079 if (ret) { 2080 drm_dbg_kms(&dev_priv->drm, 2081 "failed to setup backlight for connector %s\n", 2082 connector->name); 2083 return ret; 2084 } 2085 2086 panel->backlight.present = true; 2087 2088 drm_dbg_kms(&dev_priv->drm, 2089 "Connector %s backlight initialized, %s, brightness %u/%u\n", 2090 connector->name, 2091 enableddisabled(panel->backlight.enabled), 2092 panel->backlight.level, panel->backlight.max); 2093 2094 return 0; 2095 } 2096 2097 static void intel_panel_destroy_backlight(struct intel_panel *panel) 2098 { 2099 /* dispose of the pwm */ 2100 if (panel->backlight.pwm) 2101 pwm_put(panel->backlight.pwm); 2102 2103 panel->backlight.present = false; 2104 } 2105 2106 static const struct intel_panel_bl_funcs bxt_pwm_funcs = { 2107 .setup = bxt_setup_backlight, 2108 .enable = bxt_enable_backlight, 2109 .disable = bxt_disable_backlight, 2110 .set = bxt_set_backlight, 2111 .get = bxt_get_backlight, 2112 .hz_to_pwm = bxt_hz_to_pwm, 2113 }; 2114 2115 static const struct intel_panel_bl_funcs cnp_pwm_funcs = { 2116 .setup = cnp_setup_backlight, 2117 .enable = cnp_enable_backlight, 2118 .disable = cnp_disable_backlight, 2119 .set = bxt_set_backlight, 2120 .get = bxt_get_backlight, 2121 .hz_to_pwm = cnp_hz_to_pwm, 2122 }; 2123 2124 static const struct intel_panel_bl_funcs lpt_pwm_funcs = { 2125 .setup = lpt_setup_backlight, 2126 .enable = lpt_enable_backlight, 2127 .disable = lpt_disable_backlight, 2128 .set = lpt_set_backlight, 2129 .get = lpt_get_backlight, 2130 .hz_to_pwm = lpt_hz_to_pwm, 2131 }; 2132 2133 static const struct intel_panel_bl_funcs spt_pwm_funcs = { 2134 .setup = lpt_setup_backlight, 2135 .enable = lpt_enable_backlight, 2136 .disable = lpt_disable_backlight, 2137 .set = lpt_set_backlight, 2138 .get = lpt_get_backlight, 2139 .hz_to_pwm = spt_hz_to_pwm, 2140 }; 2141 2142 static const struct intel_panel_bl_funcs pch_pwm_funcs = { 2143 .setup = pch_setup_backlight, 2144 .enable = pch_enable_backlight, 2145 .disable = pch_disable_backlight, 2146 .set = pch_set_backlight, 2147 .get = pch_get_backlight, 2148 .hz_to_pwm = pch_hz_to_pwm, 2149 }; 2150 2151 static const struct intel_panel_bl_funcs ext_pwm_funcs = { 2152 .setup = ext_pwm_setup_backlight, 2153 .enable = ext_pwm_enable_backlight, 2154 .disable = ext_pwm_disable_backlight, 2155 .set = ext_pwm_set_backlight, 2156 .get = ext_pwm_get_backlight, 2157 }; 2158 2159 static const struct intel_panel_bl_funcs vlv_pwm_funcs = { 2160 .setup = vlv_setup_backlight, 2161 .enable = vlv_enable_backlight, 2162 .disable = vlv_disable_backlight, 2163 .set = vlv_set_backlight, 2164 .get = vlv_get_backlight, 2165 .hz_to_pwm = vlv_hz_to_pwm, 2166 }; 2167 2168 static const struct intel_panel_bl_funcs i965_pwm_funcs = { 2169 .setup = i965_setup_backlight, 2170 .enable = i965_enable_backlight, 2171 .disable = i965_disable_backlight, 2172 .set = i9xx_set_backlight, 2173 .get = i9xx_get_backlight, 2174 .hz_to_pwm = i965_hz_to_pwm, 2175 }; 2176 2177 static const struct intel_panel_bl_funcs i9xx_pwm_funcs = { 2178 .setup = i9xx_setup_backlight, 2179 .enable = i9xx_enable_backlight, 2180 .disable = i9xx_disable_backlight, 2181 .set = i9xx_set_backlight, 2182 .get = i9xx_get_backlight, 2183 .hz_to_pwm = i9xx_hz_to_pwm, 2184 }; 2185 2186 static const struct intel_panel_bl_funcs pwm_bl_funcs = { 2187 .setup = intel_pwm_setup_backlight, 2188 .enable = intel_pwm_enable_backlight, 2189 .disable = intel_pwm_disable_backlight, 2190 .set = intel_pwm_set_backlight, 2191 .get = intel_pwm_get_backlight, 2192 }; 2193 2194 /* Set up chip specific backlight functions */ 2195 static void 2196 intel_panel_init_backlight_funcs(struct intel_panel *panel) 2197 { 2198 struct intel_connector *connector = 2199 container_of(panel, struct intel_connector, panel); 2200 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2201 2202 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 2203 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 2204 return; 2205 2206 if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) { 2207 panel->backlight.pwm_funcs = &bxt_pwm_funcs; 2208 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { 2209 panel->backlight.pwm_funcs = &cnp_pwm_funcs; 2210 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { 2211 if (HAS_PCH_LPT(dev_priv)) 2212 panel->backlight.pwm_funcs = &lpt_pwm_funcs; 2213 else 2214 panel->backlight.pwm_funcs = &spt_pwm_funcs; 2215 } else if (HAS_PCH_SPLIT(dev_priv)) { 2216 panel->backlight.pwm_funcs = &pch_pwm_funcs; 2217 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 2218 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 2219 panel->backlight.pwm_funcs = &ext_pwm_funcs; 2220 } else { 2221 panel->backlight.pwm_funcs = &vlv_pwm_funcs; 2222 } 2223 } else if (DISPLAY_VER(dev_priv) == 4) { 2224 panel->backlight.pwm_funcs = &i965_pwm_funcs; 2225 } else { 2226 panel->backlight.pwm_funcs = &i9xx_pwm_funcs; 2227 } 2228 2229 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 2230 intel_dp_aux_init_backlight_funcs(connector) == 0) 2231 return; 2232 2233 /* We're using a standard PWM backlight interface */ 2234 panel->backlight.funcs = &pwm_bl_funcs; 2235 } 2236 2237 enum drm_connector_status 2238 intel_panel_detect(struct drm_connector *connector, bool force) 2239 { 2240 struct drm_i915_private *i915 = to_i915(connector->dev); 2241 2242 if (!INTEL_DISPLAY_ENABLED(i915)) 2243 return connector_status_disconnected; 2244 2245 return connector_status_connected; 2246 } 2247 2248 int intel_panel_init(struct intel_panel *panel, 2249 struct drm_display_mode *fixed_mode, 2250 struct drm_display_mode *downclock_mode) 2251 { 2252 intel_panel_init_backlight_funcs(panel); 2253 2254 panel->fixed_mode = fixed_mode; 2255 panel->downclock_mode = downclock_mode; 2256 2257 return 0; 2258 } 2259 2260 void intel_panel_fini(struct intel_panel *panel) 2261 { 2262 struct intel_connector *intel_connector = 2263 container_of(panel, struct intel_connector, panel); 2264 2265 intel_panel_destroy_backlight(panel); 2266 2267 if (panel->fixed_mode) 2268 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2269 2270 if (panel->downclock_mode) 2271 drm_mode_destroy(intel_connector->base.dev, 2272 panel->downclock_mode); 2273 } 2274