1 /* $OpenBSD: drm_modes.c,v 1.1 2013/03/18 12:36:51 jsg Exp $ */ 2 /* 3 * Copyright © 1997-2003 by The XFree86 Project, Inc. 4 * Copyright © 2007 Dave Airlie 5 * Copyright © 2007-2008 Intel Corporation 6 * Jesse Barnes <jesse.barnes@intel.com> 7 * Copyright 2005-2006 Luc Verhaegen 8 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a 11 * copy of this software and associated documentation files (the "Software"), 12 * to deal in the Software without restriction, including without limitation 13 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 14 * and/or sell copies of the Software, and to permit persons to whom the 15 * Software is furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice shall be included in 18 * all copies or substantial portions of the Software. 19 * 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 26 * OTHER DEALINGS IN THE SOFTWARE. 27 * 28 * Except as contained in this notice, the name of the copyright holder(s) 29 * and author(s) shall not be used in advertising or otherwise to promote 30 * the sale, use or other dealings in this Software without prior written 31 * authorization from the copyright holder(s) and author(s). 32 */ 33 34 #include "drmP.h" 35 #include "drm_crtc.h" 36 37 #define KHZ2PICOS(a) (1000000000UL/(a)) 38 39 void drm_mode_validate_clocks(struct drm_device *, struct list_head *, 40 int *, int *, int); 41 bool drm_mode_parse_command_line_for_connector(const char *, 42 struct drm_connector *, struct drm_cmdline_mode *); 43 struct drm_display_mode * 44 drm_mode_create_from_cmdline_mode(struct drm_device *, 45 struct drm_cmdline_mode *); 46 int drm_mode_compare(struct drm_display_mode *, struct drm_display_mode*); 47 long simple_strtol(const char *, char **, int); 48 49 /** 50 * drm_mode_debug_printmodeline - debug print a mode 51 * @dev: DRM device 52 * @mode: mode to print 53 * 54 * LOCKING: 55 * None. 56 * 57 * Describe @mode using DRM_DEBUG. 58 */ 59 void 60 drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 61 { 62 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 63 "0x%x 0x%x\n", 64 mode->base.id, mode->name, mode->vrefresh, mode->clock, 65 mode->hdisplay, mode->hsync_start, 66 mode->hsync_end, mode->htotal, 67 mode->vdisplay, mode->vsync_start, 68 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 69 } 70 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 71 72 /** 73 * drm_cvt_mode -create a modeline based on CVT algorithm 74 * @dev: DRM device 75 * @hdisplay: hdisplay size 76 * @vdisplay: vdisplay size 77 * @vrefresh : vrefresh rate 78 * @reduced : Whether the GTF calculation is simplified 79 * @interlaced:Whether the interlace is supported 80 * 81 * LOCKING: 82 * none. 83 * 84 * return the modeline based on CVT algorithm 85 * 86 * This function is called to generate the modeline based on CVT algorithm 87 * according to the hdisplay, vdisplay, vrefresh. 88 * It is based from the VESA(TM) Coordinated Video Timing Generator by 89 * Graham Loveridge April 9, 2003 available at 90 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 91 * 92 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 93 * What I have done is to translate it by using integer calculation. 94 */ 95 #define HV_FACTOR 1000 96 struct drm_display_mode * 97 drm_cvt_mode(struct drm_device *dev, int hdisplay, 98 int vdisplay, int vrefresh, 99 bool reduced, bool interlaced, bool margins) 100 { 101 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 102 #define CVT_MARGIN_PERCENTAGE 18 103 /* 2) character cell horizontal granularity (pixels) - default 8 */ 104 #define CVT_H_GRANULARITY 8 105 /* 3) Minimum vertical porch (lines) - default 3 */ 106 #define CVT_MIN_V_PORCH 3 107 /* 4) Minimum number of vertical back porch lines - default 6 */ 108 #define CVT_MIN_V_BPORCH 6 109 /* Pixel Clock step (kHz) */ 110 #define CVT_CLOCK_STEP 250 111 struct drm_display_mode *drm_mode; 112 unsigned int vfieldrate, hperiod; 113 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 114 int interlace; 115 116 /* allocate the drm_display_mode structure. If failure, we will 117 * return directly 118 */ 119 drm_mode = drm_mode_create(dev); 120 if (!drm_mode) 121 return NULL; 122 123 /* the CVT default refresh rate is 60Hz */ 124 if (!vrefresh) 125 vrefresh = 60; 126 127 /* the required field fresh rate */ 128 if (interlaced) 129 vfieldrate = vrefresh * 2; 130 else 131 vfieldrate = vrefresh; 132 133 /* horizontal pixels */ 134 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 135 136 /* determine the left&right borders */ 137 hmargin = 0; 138 if (margins) { 139 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 140 hmargin -= hmargin % CVT_H_GRANULARITY; 141 } 142 /* find the total active pixels */ 143 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 144 145 /* find the number of lines per field */ 146 if (interlaced) 147 vdisplay_rnd = vdisplay / 2; 148 else 149 vdisplay_rnd = vdisplay; 150 151 /* find the top & bottom borders */ 152 vmargin = 0; 153 if (margins) 154 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 155 156 drm_mode->vdisplay = vdisplay + 2 * vmargin; 157 158 /* Interlaced */ 159 if (interlaced) 160 interlace = 1; 161 else 162 interlace = 0; 163 164 /* Determine VSync Width from aspect ratio */ 165 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 166 vsync = 4; 167 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 168 vsync = 5; 169 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 170 vsync = 6; 171 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 172 vsync = 7; 173 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 174 vsync = 7; 175 else /* custom */ 176 vsync = 10; 177 178 if (!reduced) { 179 /* simplify the GTF calculation */ 180 /* 4) Minimum time of vertical sync + back porch interval (µs) 181 * default 550.0 182 */ 183 int tmp1, tmp2; 184 #define CVT_MIN_VSYNC_BP 550 185 /* 3) Nominal HSync width (% of line period) - default 8 */ 186 #define CVT_HSYNC_PERCENTAGE 8 187 unsigned int hblank_percentage; 188 int vsyncandback_porch, vback_porch, hblank; 189 190 /* estimated the horizontal period */ 191 tmp1 = HV_FACTOR * 1000000 - 192 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 193 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 194 interlace; 195 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 196 197 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 198 /* 9. Find number of lines in sync + backporch */ 199 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 200 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 201 else 202 vsyncandback_porch = tmp1; 203 /* 10. Find number of lines in back porch */ 204 vback_porch = vsyncandback_porch - vsync; 205 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 206 vsyncandback_porch + CVT_MIN_V_PORCH; 207 /* 5) Definition of Horizontal blanking time limitation */ 208 /* Gradient (%/kHz) - default 600 */ 209 #define CVT_M_FACTOR 600 210 /* Offset (%) - default 40 */ 211 #define CVT_C_FACTOR 40 212 /* Blanking time scaling factor - default 128 */ 213 #define CVT_K_FACTOR 128 214 /* Scaling factor weighting - default 20 */ 215 #define CVT_J_FACTOR 20 216 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 217 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 218 CVT_J_FACTOR) 219 /* 12. Find ideal blanking duty cycle from formula */ 220 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 221 hperiod / 1000; 222 /* 13. Blanking time */ 223 if (hblank_percentage < 20 * HV_FACTOR) 224 hblank_percentage = 20 * HV_FACTOR; 225 hblank = drm_mode->hdisplay * hblank_percentage / 226 (100 * HV_FACTOR - hblank_percentage); 227 hblank -= hblank % (2 * CVT_H_GRANULARITY); 228 /* 14. find the total pixes per line */ 229 drm_mode->htotal = drm_mode->hdisplay + hblank; 230 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 231 drm_mode->hsync_start = drm_mode->hsync_end - 232 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 233 drm_mode->hsync_start += CVT_H_GRANULARITY - 234 drm_mode->hsync_start % CVT_H_GRANULARITY; 235 /* fill the Vsync values */ 236 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 237 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 238 } else { 239 /* Reduced blanking */ 240 /* Minimum vertical blanking interval time (µs)- default 460 */ 241 #define CVT_RB_MIN_VBLANK 460 242 /* Fixed number of clocks for horizontal sync */ 243 #define CVT_RB_H_SYNC 32 244 /* Fixed number of clocks for horizontal blanking */ 245 #define CVT_RB_H_BLANK 160 246 /* Fixed number of lines for vertical front porch - default 3*/ 247 #define CVT_RB_VFPORCH 3 248 int vbilines; 249 int tmp1, tmp2; 250 /* 8. Estimate Horizontal period. */ 251 tmp1 = HV_FACTOR * 1000000 - 252 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 253 tmp2 = vdisplay_rnd + 2 * vmargin; 254 hperiod = tmp1 / (tmp2 * vfieldrate); 255 /* 9. Find number of lines in vertical blanking */ 256 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 257 /* 10. Check if vertical blanking is sufficient */ 258 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 259 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 260 /* 11. Find total number of lines in vertical field */ 261 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 262 /* 12. Find total number of pixels in a line */ 263 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 264 /* Fill in HSync values */ 265 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 266 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 267 /* Fill in VSync values */ 268 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 269 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 270 } 271 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 272 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 273 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 274 /* 18/16. Find actual vertical frame frequency */ 275 /* ignore - just set the mode flag for interlaced */ 276 if (interlaced) { 277 drm_mode->vtotal *= 2; 278 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 279 } 280 /* Fill the mode line name */ 281 drm_mode_set_name(drm_mode); 282 if (reduced) 283 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 284 DRM_MODE_FLAG_NVSYNC); 285 else 286 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 287 DRM_MODE_FLAG_NHSYNC); 288 289 return drm_mode; 290 } 291 EXPORT_SYMBOL(drm_cvt_mode); 292 293 /** 294 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 295 * 296 * @dev :drm device 297 * @hdisplay :hdisplay size 298 * @vdisplay :vdisplay size 299 * @vrefresh :vrefresh rate. 300 * @interlaced :whether the interlace is supported 301 * @margins :desired margin size 302 * @GTF_[MCKJ] :extended GTF formula parameters 303 * 304 * LOCKING. 305 * none. 306 * 307 * return the modeline based on full GTF algorithm. 308 * 309 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 310 * in here multiplied by two. For a C of 40, pass in 80. 311 */ 312 struct drm_display_mode * 313 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 314 int vrefresh, bool interlaced, int margins, 315 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 316 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 317 #define GTF_MARGIN_PERCENTAGE 18 318 /* 2) character cell horizontal granularity (pixels) - default 8 */ 319 #define GTF_CELL_GRAN 8 320 /* 3) Minimum vertical porch (lines) - default 3 */ 321 #define GTF_MIN_V_PORCH 1 322 /* width of vsync in lines */ 323 #define V_SYNC_RQD 3 324 /* width of hsync as % of total line */ 325 #define H_SYNC_PERCENT 8 326 /* min time of vsync + back porch (microsec) */ 327 #define MIN_VSYNC_PLUS_BP 550 328 /* C' and M' are part of the Blanking Duty Cycle computation */ 329 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 330 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 331 struct drm_display_mode *drm_mode; 332 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 333 int top_margin, bottom_margin; 334 int interlace; 335 unsigned int hfreq_est; 336 int vsync_plus_bp, vback_porch; 337 unsigned int vtotal_lines, vfieldrate_est, hperiod; 338 unsigned int vfield_rate, vframe_rate; 339 int left_margin, right_margin; 340 unsigned int total_active_pixels, ideal_duty_cycle; 341 unsigned int hblank, total_pixels, pixel_freq; 342 int hsync, hfront_porch, vodd_front_porch_lines; 343 unsigned int tmp1, tmp2; 344 345 drm_mode = drm_mode_create(dev); 346 if (!drm_mode) 347 return NULL; 348 349 /* 1. In order to give correct results, the number of horizontal 350 * pixels requested is first processed to ensure that it is divisible 351 * by the character size, by rounding it to the nearest character 352 * cell boundary: 353 */ 354 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 355 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 356 357 /* 2. If interlace is requested, the number of vertical lines assumed 358 * by the calculation must be halved, as the computation calculates 359 * the number of vertical lines per field. 360 */ 361 if (interlaced) 362 vdisplay_rnd = vdisplay / 2; 363 else 364 vdisplay_rnd = vdisplay; 365 366 /* 3. Find the frame rate required: */ 367 if (interlaced) 368 vfieldrate_rqd = vrefresh * 2; 369 else 370 vfieldrate_rqd = vrefresh; 371 372 /* 4. Find number of lines in Top margin: */ 373 top_margin = 0; 374 if (margins) 375 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 376 1000; 377 /* 5. Find number of lines in bottom margin: */ 378 bottom_margin = top_margin; 379 380 /* 6. If interlace is required, then set variable interlace: */ 381 if (interlaced) 382 interlace = 1; 383 else 384 interlace = 0; 385 386 /* 7. Estimate the Horizontal frequency */ 387 { 388 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 389 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 390 2 + interlace; 391 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 392 } 393 394 /* 8. Find the number of lines in V sync + back porch */ 395 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 396 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 397 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 398 /* 9. Find the number of lines in V back porch alone: */ 399 vback_porch = vsync_plus_bp - V_SYNC_RQD; 400 /* 10. Find the total number of lines in Vertical field period: */ 401 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 402 vsync_plus_bp + GTF_MIN_V_PORCH; 403 /* 11. Estimate the Vertical field frequency: */ 404 vfieldrate_est = hfreq_est / vtotal_lines; 405 /* 12. Find the actual horizontal period: */ 406 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 407 408 /* 13. Find the actual Vertical field frequency: */ 409 vfield_rate = hfreq_est / vtotal_lines; 410 /* 14. Find the Vertical frame frequency: */ 411 if (interlaced) 412 vframe_rate = vfield_rate / 2; 413 else 414 vframe_rate = vfield_rate; 415 /* 15. Find number of pixels in left margin: */ 416 if (margins) 417 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 418 1000; 419 else 420 left_margin = 0; 421 422 /* 16.Find number of pixels in right margin: */ 423 right_margin = left_margin; 424 /* 17.Find total number of active pixels in image and left and right */ 425 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 426 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 427 ideal_duty_cycle = GTF_C_PRIME * 1000 - 428 (GTF_M_PRIME * 1000000 / hfreq_est); 429 /* 19.Find the number of pixels in the blanking time to the nearest 430 * double character cell: */ 431 hblank = total_active_pixels * ideal_duty_cycle / 432 (100000 - ideal_duty_cycle); 433 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 434 hblank = hblank * 2 * GTF_CELL_GRAN; 435 /* 20.Find total number of pixels: */ 436 total_pixels = total_active_pixels + hblank; 437 /* 21.Find pixel clock frequency: */ 438 pixel_freq = total_pixels * hfreq_est / 1000; 439 /* Stage 1 computations are now complete; I should really pass 440 * the results to another function and do the Stage 2 computations, 441 * but I only need a few more values so I'll just append the 442 * computations here for now */ 443 /* 17. Find the number of pixels in the horizontal sync period: */ 444 hsync = H_SYNC_PERCENT * total_pixels / 100; 445 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 446 hsync = hsync * GTF_CELL_GRAN; 447 /* 18. Find the number of pixels in horizontal front porch period */ 448 hfront_porch = hblank / 2 - hsync; 449 /* 36. Find the number of lines in the odd front porch period: */ 450 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 451 452 /* finally, pack the results in the mode struct */ 453 drm_mode->hdisplay = hdisplay_rnd; 454 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 455 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 456 drm_mode->htotal = total_pixels; 457 drm_mode->vdisplay = vdisplay_rnd; 458 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 459 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 460 drm_mode->vtotal = vtotal_lines; 461 462 drm_mode->clock = pixel_freq; 463 464 if (interlaced) { 465 drm_mode->vtotal *= 2; 466 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 467 } 468 469 drm_mode_set_name(drm_mode); 470 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 471 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 472 else 473 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 474 475 return drm_mode; 476 } 477 EXPORT_SYMBOL(drm_gtf_mode_complex); 478 479 /** 480 * drm_gtf_mode - create the modeline based on GTF algorithm 481 * 482 * @dev :drm device 483 * @hdisplay :hdisplay size 484 * @vdisplay :vdisplay size 485 * @vrefresh :vrefresh rate. 486 * @interlaced :whether the interlace is supported 487 * @margins :whether the margin is supported 488 * 489 * LOCKING. 490 * none. 491 * 492 * return the modeline based on GTF algorithm 493 * 494 * This function is to create the modeline based on the GTF algorithm. 495 * Generalized Timing Formula is derived from: 496 * GTF Spreadsheet by Andy Morrish (1/5/97) 497 * available at http://www.vesa.org 498 * 499 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 500 * What I have done is to translate it by using integer calculation. 501 * I also refer to the function of fb_get_mode in the file of 502 * drivers/video/fbmon.c 503 * 504 * Standard GTF parameters: 505 * M = 600 506 * C = 40 507 * K = 128 508 * J = 20 509 */ 510 struct drm_display_mode * 511 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 512 bool lace, int margins) 513 { 514 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 515 margins, 600, 40 * 2, 128, 20 * 2); 516 } 517 EXPORT_SYMBOL(drm_gtf_mode); 518 519 /** 520 * drm_mode_set_name - set the name on a mode 521 * @mode: name will be set in this mode 522 * 523 * LOCKING: 524 * None. 525 * 526 * Set the name of @mode to a standard format. 527 */ 528 void 529 drm_mode_set_name(struct drm_display_mode *mode) 530 { 531 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 532 533 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 534 mode->hdisplay, mode->vdisplay, 535 interlaced ? "i" : ""); 536 } 537 EXPORT_SYMBOL(drm_mode_set_name); 538 539 /** 540 * drm_mode_list_concat - move modes from one list to another 541 * @head: source list 542 * @new: dst list 543 * 544 * LOCKING: 545 * Caller must ensure both lists are locked. 546 * 547 * Move all the modes from @head to @new. 548 */ 549 void 550 drm_mode_list_concat(struct list_head *head, struct list_head *new) 551 { 552 553 struct list_head *entry, *tmp; 554 555 list_for_each_safe(entry, tmp, head) { 556 list_move_tail(entry, new); 557 } 558 } 559 EXPORT_SYMBOL(drm_mode_list_concat); 560 561 /** 562 * drm_mode_width - get the width of a mode 563 * @mode: mode 564 * 565 * LOCKING: 566 * None. 567 * 568 * Return @mode's width (hdisplay) value. 569 * 570 * FIXME: is this needed? 571 * 572 * RETURNS: 573 * @mode->hdisplay 574 */ 575 int 576 drm_mode_width(const struct drm_display_mode *mode) 577 { 578 return mode->hdisplay; 579 580 } 581 EXPORT_SYMBOL(drm_mode_width); 582 583 /** 584 * drm_mode_height - get the height of a mode 585 * @mode: mode 586 * 587 * LOCKING: 588 * None. 589 * 590 * Return @mode's height (vdisplay) value. 591 * 592 * FIXME: is this needed? 593 * 594 * RETURNS: 595 * @mode->vdisplay 596 */ 597 int 598 drm_mode_height(const struct drm_display_mode *mode) 599 { 600 return mode->vdisplay; 601 } 602 EXPORT_SYMBOL(drm_mode_height); 603 604 /** drm_mode_hsync - get the hsync of a mode 605 * @mode: mode 606 * 607 * LOCKING: 608 * None. 609 * 610 * Return @modes's hsync rate in kHz, rounded to the nearest int. 611 */ 612 int 613 drm_mode_hsync(const struct drm_display_mode *mode) 614 { 615 unsigned int calc_val; 616 617 if (mode->hsync) 618 return mode->hsync; 619 620 if (mode->htotal < 0) 621 return 0; 622 623 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 624 calc_val += 500; /* round to 1000Hz */ 625 calc_val /= 1000; /* truncate to kHz */ 626 627 return calc_val; 628 } 629 EXPORT_SYMBOL(drm_mode_hsync); 630 631 /** 632 * drm_mode_vrefresh - get the vrefresh of a mode 633 * @mode: mode 634 * 635 * LOCKING: 636 * None. 637 * 638 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 639 * 640 * FIXME: why is this needed? shouldn't vrefresh be set already? 641 * 642 * RETURNS: 643 * Vertical refresh rate. It will be the result of actual value plus 0.5. 644 * If it is 70.288, it will return 70Hz. 645 * If it is 59.6, it will return 60Hz. 646 */ 647 int 648 drm_mode_vrefresh(const struct drm_display_mode *mode) 649 { 650 int refresh = 0; 651 unsigned int calc_val; 652 653 if (mode->vrefresh > 0) 654 refresh = mode->vrefresh; 655 else if (mode->htotal > 0 && mode->vtotal > 0) { 656 int vtotal; 657 vtotal = mode->vtotal; 658 /* work out vrefresh the value will be x1000 */ 659 calc_val = (mode->clock * 1000); 660 calc_val /= mode->htotal; 661 refresh = (calc_val + vtotal / 2) / vtotal; 662 663 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 664 refresh *= 2; 665 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 666 refresh /= 2; 667 if (mode->vscan > 1) 668 refresh /= mode->vscan; 669 } 670 return refresh; 671 } 672 EXPORT_SYMBOL(drm_mode_vrefresh); 673 674 /** 675 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 676 * @p: mode 677 * @adjust_flags: unused? (FIXME) 678 * 679 * LOCKING: 680 * None. 681 * 682 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 683 */ 684 void 685 drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 686 { 687 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 688 return; 689 690 p->crtc_hdisplay = p->hdisplay; 691 p->crtc_hsync_start = p->hsync_start; 692 p->crtc_hsync_end = p->hsync_end; 693 p->crtc_htotal = p->htotal; 694 p->crtc_hskew = p->hskew; 695 p->crtc_vdisplay = p->vdisplay; 696 p->crtc_vsync_start = p->vsync_start; 697 p->crtc_vsync_end = p->vsync_end; 698 p->crtc_vtotal = p->vtotal; 699 700 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 701 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 702 p->crtc_vdisplay /= 2; 703 p->crtc_vsync_start /= 2; 704 p->crtc_vsync_end /= 2; 705 p->crtc_vtotal /= 2; 706 } 707 } 708 709 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 710 p->crtc_vdisplay *= 2; 711 p->crtc_vsync_start *= 2; 712 p->crtc_vsync_end *= 2; 713 p->crtc_vtotal *= 2; 714 } 715 716 if (p->vscan > 1) { 717 p->crtc_vdisplay *= p->vscan; 718 p->crtc_vsync_start *= p->vscan; 719 p->crtc_vsync_end *= p->vscan; 720 p->crtc_vtotal *= p->vscan; 721 } 722 723 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 724 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 725 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 726 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 727 } 728 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 729 730 731 /** 732 * drm_mode_copy - copy the mode 733 * @dst: mode to overwrite 734 * @src: mode to copy 735 * 736 * LOCKING: 737 * None. 738 * 739 * Copy an existing mode into another mode, preserving the object id 740 * of the destination mode. 741 */ 742 void 743 drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 744 { 745 int id = dst->base.id; 746 747 *dst = *src; 748 dst->base.id = id; 749 INIT_LIST_HEAD(&dst->head); 750 } 751 EXPORT_SYMBOL(drm_mode_copy); 752 753 /** 754 * drm_mode_duplicate - allocate and duplicate an existing mode 755 * @m: mode to duplicate 756 * 757 * LOCKING: 758 * None. 759 * 760 * Just allocate a new mode, copy the existing mode into it, and return 761 * a pointer to it. Used to create new instances of established modes. 762 */ 763 struct drm_display_mode * 764 drm_mode_duplicate(struct drm_device *dev, 765 const struct drm_display_mode *mode) 766 { 767 struct drm_display_mode *nmode; 768 769 nmode = drm_mode_create(dev); 770 if (!nmode) 771 return NULL; 772 773 drm_mode_copy(nmode, mode); 774 775 return nmode; 776 } 777 EXPORT_SYMBOL(drm_mode_duplicate); 778 779 /** 780 * drm_mode_equal - test modes for equality 781 * @mode1: first mode 782 * @mode2: second mode 783 * 784 * LOCKING: 785 * None. 786 * 787 * Check to see if @mode1 and @mode2 are equivalent. 788 * 789 * RETURNS: 790 * True if the modes are equal, false otherwise. 791 */ 792 bool 793 drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 794 { 795 /* do clock check convert to PICOS so fb modes get matched 796 * the same */ 797 if (mode1->clock && mode2->clock) { 798 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 799 return false; 800 } else if (mode1->clock != mode2->clock) 801 return false; 802 803 if (mode1->hdisplay == mode2->hdisplay && 804 mode1->hsync_start == mode2->hsync_start && 805 mode1->hsync_end == mode2->hsync_end && 806 mode1->htotal == mode2->htotal && 807 mode1->hskew == mode2->hskew && 808 mode1->vdisplay == mode2->vdisplay && 809 mode1->vsync_start == mode2->vsync_start && 810 mode1->vsync_end == mode2->vsync_end && 811 mode1->vtotal == mode2->vtotal && 812 mode1->vscan == mode2->vscan && 813 mode1->flags == mode2->flags) 814 return true; 815 816 return false; 817 } 818 EXPORT_SYMBOL(drm_mode_equal); 819 820 /** 821 * drm_mode_validate_size - make sure modes adhere to size constraints 822 * @dev: DRM device 823 * @mode_list: list of modes to check 824 * @maxX: maximum width 825 * @maxY: maximum height 826 * @maxPitch: max pitch 827 * 828 * LOCKING: 829 * Caller must hold a lock protecting @mode_list. 830 * 831 * The DRM device (@dev) has size and pitch limits. Here we validate the 832 * modes we probed for @dev against those limits and set their status as 833 * necessary. 834 */ 835 void 836 drm_mode_validate_size(struct drm_device *dev, 837 struct list_head *mode_list, 838 int maxX, int maxY, int maxPitch) 839 { 840 struct drm_display_mode *mode; 841 842 list_for_each_entry(mode, mode_list, head) { 843 if (maxPitch > 0 && mode->hdisplay > maxPitch) 844 mode->status = MODE_BAD_WIDTH; 845 846 if (maxX > 0 && mode->hdisplay > maxX) 847 mode->status = MODE_VIRTUAL_X; 848 849 if (maxY > 0 && mode->vdisplay > maxY) 850 mode->status = MODE_VIRTUAL_Y; 851 } 852 } 853 EXPORT_SYMBOL(drm_mode_validate_size); 854 855 /** 856 * drm_mode_validate_clocks - validate modes against clock limits 857 * @dev: DRM device 858 * @mode_list: list of modes to check 859 * @min: minimum clock rate array 860 * @max: maximum clock rate array 861 * @n_ranges: number of clock ranges (size of arrays) 862 * 863 * LOCKING: 864 * Caller must hold a lock protecting @mode_list. 865 * 866 * Some code may need to check a mode list against the clock limits of the 867 * device in question. This function walks the mode list, testing to make 868 * sure each mode falls within a given range (defined by @min and @max 869 * arrays) and sets @mode->status as needed. 870 */ 871 void 872 drm_mode_validate_clocks(struct drm_device *dev, 873 struct list_head *mode_list, 874 int *min, int *max, int n_ranges) 875 { 876 struct drm_display_mode *mode; 877 int i; 878 879 list_for_each_entry(mode, mode_list, head) { 880 bool good = false; 881 for (i = 0; i < n_ranges; i++) { 882 if (mode->clock >= min[i] && mode->clock <= max[i]) { 883 good = true; 884 break; 885 } 886 } 887 if (!good) 888 mode->status = MODE_CLOCK_RANGE; 889 } 890 } 891 EXPORT_SYMBOL(drm_mode_validate_clocks); 892 893 /** 894 * drm_mode_prune_invalid - remove invalid modes from mode list 895 * @dev: DRM device 896 * @mode_list: list of modes to check 897 * @verbose: be verbose about it 898 * 899 * LOCKING: 900 * Caller must hold a lock protecting @mode_list. 901 * 902 * Once mode list generation is complete, a caller can use this routine to 903 * remove invalid modes from a mode list. If any of the modes have a 904 * status other than %MODE_OK, they are removed from @mode_list and freed. 905 */ 906 void 907 drm_mode_prune_invalid(struct drm_device *dev, 908 struct list_head *mode_list, bool verbose) 909 { 910 struct drm_display_mode *mode, *t; 911 912 list_for_each_entry_safe(mode, t, mode_list, head) { 913 if (mode->status != MODE_OK) { 914 list_del(&mode->head); 915 if (verbose) { 916 drm_mode_debug_printmodeline(mode); 917 DRM_DEBUG_KMS("Not using %s mode %d\n", 918 mode->name, mode->status); 919 } 920 drm_mode_destroy(dev, mode); 921 } 922 } 923 } 924 EXPORT_SYMBOL(drm_mode_prune_invalid); 925 926 /** 927 * drm_mode_compare - compare modes for favorability 928 * @priv: unused 929 * @lh_a: list_head for first mode 930 * @lh_b: list_head for second mode 931 * 932 * LOCKING: 933 * None. 934 * 935 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 936 * which is better. 937 * 938 * RETURNS: 939 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 940 * positive if @lh_b is better than @lh_a. 941 */ 942 int 943 drm_mode_compare(struct drm_display_mode *a, struct drm_display_mode* b) 944 { 945 int diff; 946 947 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 948 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 949 if (diff) 950 return diff; 951 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 952 if (diff) 953 return diff; 954 diff = b->clock - a->clock; 955 return diff; 956 } 957 958 /** 959 * drm_mode_sort - sort mode list 960 * @mode_list: list to sort 961 * 962 * LOCKING: 963 * Caller must hold a lock protecting @mode_list. 964 * 965 * Sort @mode_list by favorability, putting good modes first. 966 */ 967 RB_HEAD(drm_mode_sort, drm_display_mode); 968 969 RB_PROTOTYPE(drm_mode_sort, drm_display_mode, sort, drm_mode_compare); 970 971 void 972 drm_mode_sort(struct list_head *mode_list) 973 { 974 struct drm_display_mode *mode, *t; 975 struct drm_mode_sort drm_mode_tree; 976 977 RB_INIT(&drm_mode_tree); 978 list_for_each_entry_safe(mode, t, mode_list, head) { 979 RB_INSERT(drm_mode_sort, &drm_mode_tree, mode); 980 list_del(&mode->head); 981 } 982 RB_FOREACH(mode, drm_mode_sort, &drm_mode_tree) 983 list_add_tail(&mode->head, mode_list); 984 } 985 RB_GENERATE(drm_mode_sort, drm_display_mode, sort, drm_mode_compare); 986 987 EXPORT_SYMBOL(drm_mode_sort); 988 989 /** 990 * drm_mode_connector_list_update - update the mode list for the connector 991 * @connector: the connector to update 992 * 993 * LOCKING: 994 * Caller must hold a lock protecting @mode_list. 995 * 996 * This moves the modes from the @connector probed_modes list 997 * to the actual mode list. It compares the probed mode against the current 998 * list and only adds different modes. All modes unverified after this point 999 * will be removed by the prune invalid modes. 1000 */ 1001 void 1002 drm_mode_connector_list_update(struct drm_connector *connector) 1003 { 1004 struct drm_display_mode *mode; 1005 struct drm_display_mode *pmode, *pt; 1006 int found_it; 1007 1008 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 1009 head) { 1010 found_it = 0; 1011 /* go through current modes checking for the new probed mode */ 1012 list_for_each_entry(mode, &connector->modes, head) { 1013 if (drm_mode_equal(pmode, mode)) { 1014 found_it = 1; 1015 /* if equal delete the probed mode */ 1016 mode->status = pmode->status; 1017 /* Merge type bits together */ 1018 mode->type |= pmode->type; 1019 list_del(&pmode->head); 1020 drm_mode_destroy(connector->dev, pmode); 1021 break; 1022 } 1023 } 1024 1025 if (!found_it) { 1026 list_move_tail(&pmode->head, &connector->modes); 1027 } 1028 } 1029 } 1030 EXPORT_SYMBOL(drm_mode_connector_list_update); 1031 1032 /** 1033 * drm_mode_parse_command_line_for_connector - parse command line for connector 1034 * @mode_option - per connector mode option 1035 * @connector - connector to parse line for 1036 * 1037 * This parses the connector specific then generic command lines for 1038 * modes and options to configure the connector. 1039 * 1040 * This uses the same parameters as the fb modedb.c, except for extra 1041 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1042 * 1043 * enable/enable Digital/disable bit at the end 1044 */ 1045 bool 1046 drm_mode_parse_command_line_for_connector(const char *mode_option, 1047 struct drm_connector *connector, 1048 struct drm_cmdline_mode *mode) 1049 { 1050 const char *name; 1051 unsigned int namelen; 1052 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1053 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1054 bool yres_specified = false, cvt = false, rb = false; 1055 bool interlace = false, margins = false, was_digit = false; 1056 int i; 1057 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1058 1059 #ifdef CONFIG_FB 1060 if (!mode_option) 1061 mode_option = fb_mode_option; 1062 #endif 1063 1064 if (!mode_option) { 1065 mode->specified = false; 1066 return false; 1067 } 1068 1069 name = mode_option; 1070 namelen = strlen(name); 1071 for (i = namelen-1; i >= 0; i--) { 1072 switch (name[i]) { 1073 case '@': 1074 if (!refresh_specified && !bpp_specified && 1075 !yres_specified && !cvt && !rb && was_digit) { 1076 refresh = simple_strtol(&name[i+1], NULL, 10); 1077 refresh_specified = true; 1078 was_digit = false; 1079 } else 1080 goto done; 1081 break; 1082 case '-': 1083 if (!bpp_specified && !yres_specified && !cvt && 1084 !rb && was_digit) { 1085 bpp = simple_strtol(&name[i+1], NULL, 10); 1086 bpp_specified = true; 1087 was_digit = false; 1088 } else 1089 goto done; 1090 break; 1091 case 'x': 1092 if (!yres_specified && was_digit) { 1093 yres = simple_strtol(&name[i+1], NULL, 10); 1094 yres_specified = true; 1095 was_digit = false; 1096 } else 1097 goto done; 1098 case '0' ... '9': 1099 was_digit = true; 1100 break; 1101 case 'M': 1102 if (yres_specified || cvt || was_digit) 1103 goto done; 1104 cvt = true; 1105 break; 1106 case 'R': 1107 if (yres_specified || cvt || rb || was_digit) 1108 goto done; 1109 rb = true; 1110 break; 1111 case 'm': 1112 if (cvt || yres_specified || was_digit) 1113 goto done; 1114 margins = true; 1115 break; 1116 case 'i': 1117 if (cvt || yres_specified || was_digit) 1118 goto done; 1119 interlace = true; 1120 break; 1121 case 'e': 1122 if (yres_specified || bpp_specified || refresh_specified || 1123 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1124 goto done; 1125 1126 force = DRM_FORCE_ON; 1127 break; 1128 case 'D': 1129 if (yres_specified || bpp_specified || refresh_specified || 1130 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1131 goto done; 1132 1133 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1134 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1135 force = DRM_FORCE_ON; 1136 else 1137 force = DRM_FORCE_ON_DIGITAL; 1138 break; 1139 case 'd': 1140 if (yres_specified || bpp_specified || refresh_specified || 1141 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1142 goto done; 1143 1144 force = DRM_FORCE_OFF; 1145 break; 1146 default: 1147 goto done; 1148 } 1149 } 1150 1151 if (i < 0 && yres_specified) { 1152 char *ch; 1153 xres = simple_strtol(name, &ch, 10); 1154 if ((ch != NULL) && (*ch == 'x')) 1155 res_specified = true; 1156 else 1157 i = ch - name; 1158 } else if (!yres_specified && was_digit) { 1159 /* catch mode that begins with digits but has no 'x' */ 1160 i = 0; 1161 } 1162 done: 1163 if (i >= 0) { 1164 printf("parse error at position %i in video mode '%s'\n", 1165 i, name); 1166 mode->specified = false; 1167 return false; 1168 } 1169 1170 if (res_specified) { 1171 mode->specified = true; 1172 mode->xres = xres; 1173 mode->yres = yres; 1174 } 1175 1176 if (refresh_specified) { 1177 mode->refresh_specified = true; 1178 mode->refresh = refresh; 1179 } 1180 1181 if (bpp_specified) { 1182 mode->bpp_specified = true; 1183 mode->bpp = bpp; 1184 } 1185 mode->rb = rb; 1186 mode->cvt = cvt; 1187 mode->interlace = interlace; 1188 mode->margins = margins; 1189 mode->force = force; 1190 1191 return true; 1192 } 1193 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1194 1195 struct drm_display_mode * 1196 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1197 struct drm_cmdline_mode *cmd) 1198 { 1199 struct drm_display_mode *mode; 1200 1201 if (cmd->cvt) 1202 mode = drm_cvt_mode(dev, 1203 cmd->xres, cmd->yres, 1204 cmd->refresh_specified ? cmd->refresh : 60, 1205 cmd->rb, cmd->interlace, 1206 cmd->margins); 1207 else 1208 mode = drm_gtf_mode(dev, 1209 cmd->xres, cmd->yres, 1210 cmd->refresh_specified ? cmd->refresh : 60, 1211 cmd->interlace, 1212 cmd->margins); 1213 if (!mode) 1214 return NULL; 1215 1216 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1217 return mode; 1218 } 1219 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1220 1221 /*- 1222 * Copyright (c) 1990 The Regents of the University of California. 1223 * All rights reserved. 1224 * 1225 * Redistribution and use in source and binary forms, with or without 1226 * modification, are permitted provided that the following conditions 1227 * are met: 1228 * 1. Redistributions of source code must retain the above copyright 1229 * notice, this list of conditions and the following disclaimer. 1230 * 2. Redistributions in binary form must reproduce the above copyright 1231 * notice, this list of conditions and the following disclaimer in the 1232 * documentation and/or other materials provided with the distribution. 1233 * 3. Neither the name of the University nor the names of its contributors 1234 * may be used to endorse or promote products derived from this software 1235 * without specific prior written permission. 1236 * 1237 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 1238 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1239 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1240 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 1241 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1242 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 1243 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 1244 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 1245 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 1246 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 1247 * SUCH DAMAGE. 1248 */ 1249 1250 1251 /* 1252 * Convert a string to a long integer. 1253 * 1254 * Ignores `locale' stuff. Assumes that the upper and lower case 1255 * alphabets and digits are each contiguous. 1256 */ 1257 #include <sys/limits.h> 1258 1259 long 1260 simple_strtol(const char *nptr, char **endptr, int base) 1261 { 1262 const char *s; 1263 long acc, cutoff; 1264 int c; 1265 int neg, any, cutlim; 1266 int errno; 1267 1268 /* 1269 * Skip white space and pick up leading +/- sign if any. 1270 * If base is 0, allow 0x for hex and 0 for octal, else 1271 * assume decimal; if base is already 16, allow 0x. 1272 */ 1273 s = nptr; 1274 do { 1275 c = (unsigned char) *s++; 1276 } while (c == ' ' || c == '\t'); 1277 if (c == '-') { 1278 neg = 1; 1279 c = *s++; 1280 } else { 1281 neg = 0; 1282 if (c == '+') 1283 c = *s++; 1284 } 1285 if ((base == 0 || base == 16) && 1286 c == '0' && (*s == 'x' || *s == 'X')) { 1287 c = s[1]; 1288 s += 2; 1289 base = 16; 1290 } 1291 if (base == 0) 1292 base = c == '0' ? 8 : 10; 1293 1294 /* 1295 * Compute the cutoff value between legal numbers and illegal 1296 * numbers. That is the largest legal value, divided by the 1297 * base. An input number that is greater than this value, if 1298 * followed by a legal input character, is too big. One that 1299 * is equal to this value may be valid or not; the limit 1300 * between valid and invalid numbers is then based on the last 1301 * digit. For instance, if the range for longs is 1302 * [-2147483648..2147483647] and the input base is 10, 1303 * cutoff will be set to 214748364 and cutlim to either 1304 * 7 (neg==0) or 8 (neg==1), meaning that if we have accumulated 1305 * a value > 214748364, or equal but the next digit is > 7 (or 8), 1306 * the number is too big, and we will return a range error. 1307 * 1308 * Set any if any `digits' consumed; make it negative to indicate 1309 * overflow. 1310 */ 1311 cutoff = neg ? LONG_MIN : LONG_MAX; 1312 cutlim = cutoff % base; 1313 cutoff /= base; 1314 if (neg) { 1315 if (cutlim > 0) { 1316 cutlim -= base; 1317 cutoff += 1; 1318 } 1319 cutlim = -cutlim; 1320 } 1321 for (acc = 0, any = 0;; c = (unsigned char) *s++) { 1322 if (c >= '0' && c <= '9') 1323 c -= '0'; 1324 else if (c >= 'A' && c <= 'Z') 1325 c -= 'A' - 10; 1326 else if( c >= 'a' && c <= 'z') 1327 c -= 'a' - 10; 1328 else 1329 break; 1330 if (c >= base) 1331 break; 1332 if (any < 0) 1333 continue; 1334 if (neg) { 1335 if (acc < cutoff || (acc == cutoff && c > cutlim)) { 1336 any = -1; 1337 acc = LONG_MIN; 1338 errno = ERANGE; 1339 } else { 1340 any = 1; 1341 acc *= base; 1342 acc -= c; 1343 } 1344 } else { 1345 if (acc > cutoff || (acc == cutoff && c > cutlim)) { 1346 any = -1; 1347 acc = LONG_MAX; 1348 errno = ERANGE; 1349 } else { 1350 any = 1; 1351 acc *= base; 1352 acc += c; 1353 } 1354 } 1355 } 1356 if (endptr != 0) 1357 *endptr = (char *) (any ? s - 1 : nptr); 1358 return (acc); 1359 } 1360