1fb4d8502Sjsg /* 2fb4d8502Sjsg * Copyright (C) 2018 Advanced Micro Devices, Inc. 3fb4d8502Sjsg * 4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"), 6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation 7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions: 10fb4d8502Sjsg * 11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included 12fb4d8502Sjsg * in all copies or substantial portions of the Software. 13fb4d8502Sjsg * 14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15fb4d8502Sjsg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18fb4d8502Sjsg * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19fb4d8502Sjsg * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20fb4d8502Sjsg */ 21fb4d8502Sjsg #ifndef _vega10_ip_offset_HEADER 22fb4d8502Sjsg #define _vega10_ip_offset_HEADER 23fb4d8502Sjsg 24fb4d8502Sjsg #define MAX_INSTANCE 5 25fb4d8502Sjsg #define MAX_SEGMENT 5 26fb4d8502Sjsg 27fb4d8502Sjsg struct IP_BASE_INSTANCE 28fb4d8502Sjsg { 29fb4d8502Sjsg unsigned int segment[MAX_SEGMENT]; 30fb4d8502Sjsg }; 31fb4d8502Sjsg 32fb4d8502Sjsg struct IP_BASE 33fb4d8502Sjsg { 34fb4d8502Sjsg struct IP_BASE_INSTANCE instance[MAX_INSTANCE]; 35fb4d8502Sjsg }; 36fb4d8502Sjsg 37fb4d8502Sjsg 38*5ca02815Sjsg static const struct IP_BASE __maybe_unused NBIF_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0 } }, 39fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 40fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 41fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 42fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 43*5ca02815Sjsg static const struct IP_BASE __maybe_unused NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0 } }, 44fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 45fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 46fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 47fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 48*5ca02815Sjsg static const struct IP_BASE __maybe_unused DCE_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0, 0 } }, 49fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 50fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 51fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 52fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 53*5ca02815Sjsg static const struct IP_BASE __maybe_unused DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0, 0 } }, 54fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 55fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 56fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 57fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 58*5ca02815Sjsg static const struct IP_BASE __maybe_unused MP0_BASE = { { { { 0x00016000, 0, 0, 0, 0 } }, 59fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 60fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 61fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 62fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 63*5ca02815Sjsg static const struct IP_BASE __maybe_unused MP1_BASE = { { { { 0x00016000, 0, 0, 0, 0 } }, 64fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 65fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 66fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 67fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 68*5ca02815Sjsg static const struct IP_BASE __maybe_unused MP2_BASE = { { { { 0x00016000, 0, 0, 0, 0 } }, 69fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 70fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 71fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 72fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 73*5ca02815Sjsg static const struct IP_BASE __maybe_unused DF_BASE = { { { { 0x00007000, 0, 0, 0, 0 } }, 74fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 75fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 76fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 77fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 78*5ca02815Sjsg static const struct IP_BASE __maybe_unused UVD_BASE = { { { { 0x00007800, 0x00007E00, 0, 0, 0 } }, 79fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 80fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 81fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 82fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; //note: GLN does not use the first segment 83*5ca02815Sjsg static const struct IP_BASE __maybe_unused VCN_BASE = { { { { 0x00007800, 0x00007E00, 0, 0, 0 } }, 84fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 85fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 86fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 87fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; //note: GLN does not use the first segment 88*5ca02815Sjsg static const struct IP_BASE __maybe_unused DBGU_BASE = { { { { 0x00000180, 0x000001A0, 0, 0, 0 } }, 89fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 90fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 91fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 92fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // not exist 93*5ca02815Sjsg static const struct IP_BASE __maybe_unused DBGU_NBIO_BASE = { { { { 0x000001C0, 0, 0, 0, 0 } }, 94fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 95fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 96fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 97fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // not exist 98*5ca02815Sjsg static const struct IP_BASE __maybe_unused DBGU_IO_BASE = { { { { 0x000001E0, 0, 0, 0, 0 } }, 99fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 100fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 101fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 102fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // not exist 103*5ca02815Sjsg static const struct IP_BASE __maybe_unused DFX_DAP_BASE = { { { { 0x000005A0, 0, 0, 0, 0 } }, 104fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 105fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 106fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 107fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // not exist 108*5ca02815Sjsg static const struct IP_BASE __maybe_unused DFX_BASE = { { { { 0x00000580, 0, 0, 0, 0 } }, 109fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 110fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 111fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 112fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // this file does not contain registers 113*5ca02815Sjsg static const struct IP_BASE __maybe_unused ISP_BASE = { { { { 0x00018000, 0, 0, 0, 0 } }, 114fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 115fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 116fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 117fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // not exist 118*5ca02815Sjsg static const struct IP_BASE __maybe_unused SYSTEMHUB_BASE = { { { { 0x00000EA0, 0, 0, 0, 0 } }, 119fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 120fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 121fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 122fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; // not exist 123*5ca02815Sjsg static const struct IP_BASE __maybe_unused L2IMU_BASE = { { { { 0x00007DC0, 0, 0, 0, 0 } }, 124fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 125fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 126fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 127fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 128*5ca02815Sjsg static const struct IP_BASE __maybe_unused IOHC_BASE = { { { { 0x00010000, 0, 0, 0, 0 } }, 129fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 130fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 131fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 132fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 133*5ca02815Sjsg static const struct IP_BASE __maybe_unused ATHUB_BASE = { { { { 0x00000C20, 0, 0, 0, 0 } }, 134fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 135fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 136fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 137fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 138*5ca02815Sjsg static const struct IP_BASE __maybe_unused VCE_BASE = { { { { 0x00007E00, 0x00048800, 0, 0, 0 } }, 139fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 140fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 141fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 142fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 143*5ca02815Sjsg static const struct IP_BASE __maybe_unused GC_BASE = { { { { 0x00002000, 0x0000A000, 0, 0, 0 } }, 144fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 145fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 146fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 147fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 148*5ca02815Sjsg static const struct IP_BASE __maybe_unused MMHUB_BASE = { { { { 0x0001A000, 0, 0, 0, 0 } }, 149fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 150fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 151fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 152fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 153*5ca02815Sjsg static const struct IP_BASE __maybe_unused RSMU_BASE = { { { { 0x00012000, 0, 0, 0, 0 } }, 154fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 155fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 156fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 157fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 158*5ca02815Sjsg static const struct IP_BASE __maybe_unused HDP_BASE = { { { { 0x00000F20, 0, 0, 0, 0 } }, 159fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 160fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 161fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 162fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 163*5ca02815Sjsg static const struct IP_BASE __maybe_unused OSSSYS_BASE = { { { { 0x000010A0, 0, 0, 0, 0 } }, 164fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 165fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 166fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 167fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 168*5ca02815Sjsg static const struct IP_BASE __maybe_unused SDMA0_BASE = { { { { 0x00001260, 0, 0, 0, 0 } }, 169fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 170fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 171fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 172fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 173*5ca02815Sjsg static const struct IP_BASE __maybe_unused SDMA1_BASE = { { { { 0x00001460, 0, 0, 0, 0 } }, 174fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 175fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 176fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 177fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 178*5ca02815Sjsg static const struct IP_BASE __maybe_unused XDMA_BASE = { { { { 0x00003400, 0, 0, 0, 0 } }, 179fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 180fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 181fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 182fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 183*5ca02815Sjsg static const struct IP_BASE __maybe_unused UMC_BASE = { { { { 0x00014000, 0, 0, 0, 0 } }, 184fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 185fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 186fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 187fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 188*5ca02815Sjsg static const struct IP_BASE __maybe_unused THM_BASE = { { { { 0x00016600, 0, 0, 0, 0 } }, 189fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 190fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 191fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 192fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 193*5ca02815Sjsg static const struct IP_BASE __maybe_unused SMUIO_BASE = { { { { 0x00016800, 0, 0, 0, 0 } }, 194fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 195fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 196fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 197fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 198*5ca02815Sjsg static const struct IP_BASE __maybe_unused PWR_BASE = { { { { 0x00016A00, 0, 0, 0, 0 } }, 199fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 200fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 201fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 202fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 203*5ca02815Sjsg static const struct IP_BASE __maybe_unused CLK_BASE = { { { { 0x00016C00, 0, 0, 0, 0 } }, 204fb4d8502Sjsg { { 0x00016E00, 0, 0, 0, 0 } }, 205fb4d8502Sjsg { { 0x00017000, 0, 0, 0, 0 } }, 206fb4d8502Sjsg { { 0x00017200, 0, 0, 0, 0 } }, 207fb4d8502Sjsg { { 0x00017E00, 0, 0, 0, 0 } } } }; 208*5ca02815Sjsg static const struct IP_BASE __maybe_unused FUSE_BASE = { { { { 0x00017400, 0, 0, 0, 0 } }, 209fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 210fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 211fb4d8502Sjsg { { 0, 0, 0, 0, 0 } }, 212fb4d8502Sjsg { { 0, 0, 0, 0, 0 } } } }; 213fb4d8502Sjsg 214fb4d8502Sjsg 215fb4d8502Sjsg #define NBIF_BASE__INST0_SEG0 0x00000000 216fb4d8502Sjsg #define NBIF_BASE__INST0_SEG1 0x00000014 217fb4d8502Sjsg #define NBIF_BASE__INST0_SEG2 0x00000D20 218fb4d8502Sjsg #define NBIF_BASE__INST0_SEG3 0x00010400 219fb4d8502Sjsg #define NBIF_BASE__INST0_SEG4 0 220fb4d8502Sjsg 221fb4d8502Sjsg #define NBIF_BASE__INST1_SEG0 0 222fb4d8502Sjsg #define NBIF_BASE__INST1_SEG1 0 223fb4d8502Sjsg #define NBIF_BASE__INST1_SEG2 0 224fb4d8502Sjsg #define NBIF_BASE__INST1_SEG3 0 225fb4d8502Sjsg #define NBIF_BASE__INST1_SEG4 0 226fb4d8502Sjsg 227fb4d8502Sjsg #define NBIF_BASE__INST2_SEG0 0 228fb4d8502Sjsg #define NBIF_BASE__INST2_SEG1 0 229fb4d8502Sjsg #define NBIF_BASE__INST2_SEG2 0 230fb4d8502Sjsg #define NBIF_BASE__INST2_SEG3 0 231fb4d8502Sjsg #define NBIF_BASE__INST2_SEG4 0 232fb4d8502Sjsg 233fb4d8502Sjsg #define NBIF_BASE__INST3_SEG0 0 234fb4d8502Sjsg #define NBIF_BASE__INST3_SEG1 0 235fb4d8502Sjsg #define NBIF_BASE__INST3_SEG2 0 236fb4d8502Sjsg #define NBIF_BASE__INST3_SEG3 0 237fb4d8502Sjsg #define NBIF_BASE__INST3_SEG4 0 238fb4d8502Sjsg 239fb4d8502Sjsg #define NBIF_BASE__INST4_SEG0 0 240fb4d8502Sjsg #define NBIF_BASE__INST4_SEG1 0 241fb4d8502Sjsg #define NBIF_BASE__INST4_SEG2 0 242fb4d8502Sjsg #define NBIF_BASE__INST4_SEG3 0 243fb4d8502Sjsg #define NBIF_BASE__INST4_SEG4 0 244fb4d8502Sjsg 245fb4d8502Sjsg #define NBIO_BASE__INST0_SEG0 0x00000000 246fb4d8502Sjsg #define NBIO_BASE__INST0_SEG1 0x00000014 247fb4d8502Sjsg #define NBIO_BASE__INST0_SEG2 0x00000D20 248fb4d8502Sjsg #define NBIO_BASE__INST0_SEG3 0x00010400 249fb4d8502Sjsg #define NBIO_BASE__INST0_SEG4 0 250fb4d8502Sjsg 251fb4d8502Sjsg #define NBIO_BASE__INST1_SEG0 0 252fb4d8502Sjsg #define NBIO_BASE__INST1_SEG1 0 253fb4d8502Sjsg #define NBIO_BASE__INST1_SEG2 0 254fb4d8502Sjsg #define NBIO_BASE__INST1_SEG3 0 255fb4d8502Sjsg #define NBIO_BASE__INST1_SEG4 0 256fb4d8502Sjsg 257fb4d8502Sjsg #define NBIO_BASE__INST2_SEG0 0 258fb4d8502Sjsg #define NBIO_BASE__INST2_SEG1 0 259fb4d8502Sjsg #define NBIO_BASE__INST2_SEG2 0 260fb4d8502Sjsg #define NBIO_BASE__INST2_SEG3 0 261fb4d8502Sjsg #define NBIO_BASE__INST2_SEG4 0 262fb4d8502Sjsg 263fb4d8502Sjsg #define NBIO_BASE__INST3_SEG0 0 264fb4d8502Sjsg #define NBIO_BASE__INST3_SEG1 0 265fb4d8502Sjsg #define NBIO_BASE__INST3_SEG2 0 266fb4d8502Sjsg #define NBIO_BASE__INST3_SEG3 0 267fb4d8502Sjsg #define NBIO_BASE__INST3_SEG4 0 268fb4d8502Sjsg 269fb4d8502Sjsg #define NBIO_BASE__INST4_SEG0 0 270fb4d8502Sjsg #define NBIO_BASE__INST4_SEG1 0 271fb4d8502Sjsg #define NBIO_BASE__INST4_SEG2 0 272fb4d8502Sjsg #define NBIO_BASE__INST4_SEG3 0 273fb4d8502Sjsg #define NBIO_BASE__INST4_SEG4 0 274fb4d8502Sjsg 275fb4d8502Sjsg #define DCE_BASE__INST0_SEG0 0x00000012 276fb4d8502Sjsg #define DCE_BASE__INST0_SEG1 0x000000C0 277fb4d8502Sjsg #define DCE_BASE__INST0_SEG2 0x000034C0 278fb4d8502Sjsg #define DCE_BASE__INST0_SEG3 0 279fb4d8502Sjsg #define DCE_BASE__INST0_SEG4 0 280fb4d8502Sjsg 281fb4d8502Sjsg #define DCE_BASE__INST1_SEG0 0 282fb4d8502Sjsg #define DCE_BASE__INST1_SEG1 0 283fb4d8502Sjsg #define DCE_BASE__INST1_SEG2 0 284fb4d8502Sjsg #define DCE_BASE__INST1_SEG3 0 285fb4d8502Sjsg #define DCE_BASE__INST1_SEG4 0 286fb4d8502Sjsg 287fb4d8502Sjsg #define DCE_BASE__INST2_SEG0 0 288fb4d8502Sjsg #define DCE_BASE__INST2_SEG1 0 289fb4d8502Sjsg #define DCE_BASE__INST2_SEG2 0 290fb4d8502Sjsg #define DCE_BASE__INST2_SEG3 0 291fb4d8502Sjsg #define DCE_BASE__INST2_SEG4 0 292fb4d8502Sjsg 293fb4d8502Sjsg #define DCE_BASE__INST3_SEG0 0 294fb4d8502Sjsg #define DCE_BASE__INST3_SEG1 0 295fb4d8502Sjsg #define DCE_BASE__INST3_SEG2 0 296fb4d8502Sjsg #define DCE_BASE__INST3_SEG3 0 297fb4d8502Sjsg #define DCE_BASE__INST3_SEG4 0 298fb4d8502Sjsg 299fb4d8502Sjsg #define DCE_BASE__INST4_SEG0 0 300fb4d8502Sjsg #define DCE_BASE__INST4_SEG1 0 301fb4d8502Sjsg #define DCE_BASE__INST4_SEG2 0 302fb4d8502Sjsg #define DCE_BASE__INST4_SEG3 0 303fb4d8502Sjsg #define DCE_BASE__INST4_SEG4 0 304fb4d8502Sjsg 305fb4d8502Sjsg #define DCN_BASE__INST0_SEG0 0x00000012 306fb4d8502Sjsg #define DCN_BASE__INST0_SEG1 0x000000C0 307fb4d8502Sjsg #define DCN_BASE__INST0_SEG2 0x000034C0 308fb4d8502Sjsg #define DCN_BASE__INST0_SEG3 0 309fb4d8502Sjsg #define DCN_BASE__INST0_SEG4 0 310fb4d8502Sjsg 311fb4d8502Sjsg #define DCN_BASE__INST1_SEG0 0 312fb4d8502Sjsg #define DCN_BASE__INST1_SEG1 0 313fb4d8502Sjsg #define DCN_BASE__INST1_SEG2 0 314fb4d8502Sjsg #define DCN_BASE__INST1_SEG3 0 315fb4d8502Sjsg #define DCN_BASE__INST1_SEG4 0 316fb4d8502Sjsg 317fb4d8502Sjsg #define DCN_BASE__INST2_SEG0 0 318fb4d8502Sjsg #define DCN_BASE__INST2_SEG1 0 319fb4d8502Sjsg #define DCN_BASE__INST2_SEG2 0 320fb4d8502Sjsg #define DCN_BASE__INST2_SEG3 0 321fb4d8502Sjsg #define DCN_BASE__INST2_SEG4 0 322fb4d8502Sjsg 323fb4d8502Sjsg #define DCN_BASE__INST3_SEG0 0 324fb4d8502Sjsg #define DCN_BASE__INST3_SEG1 0 325fb4d8502Sjsg #define DCN_BASE__INST3_SEG2 0 326fb4d8502Sjsg #define DCN_BASE__INST3_SEG3 0 327fb4d8502Sjsg #define DCN_BASE__INST3_SEG4 0 328fb4d8502Sjsg 329fb4d8502Sjsg #define DCN_BASE__INST4_SEG0 0 330fb4d8502Sjsg #define DCN_BASE__INST4_SEG1 0 331fb4d8502Sjsg #define DCN_BASE__INST4_SEG2 0 332fb4d8502Sjsg #define DCN_BASE__INST4_SEG3 0 333fb4d8502Sjsg #define DCN_BASE__INST4_SEG4 0 334fb4d8502Sjsg 335fb4d8502Sjsg #define MP0_BASE__INST0_SEG0 0x00016000 336fb4d8502Sjsg #define MP0_BASE__INST0_SEG1 0 337fb4d8502Sjsg #define MP0_BASE__INST0_SEG2 0 338fb4d8502Sjsg #define MP0_BASE__INST0_SEG3 0 339fb4d8502Sjsg #define MP0_BASE__INST0_SEG4 0 340fb4d8502Sjsg 341fb4d8502Sjsg #define MP0_BASE__INST1_SEG0 0 342fb4d8502Sjsg #define MP0_BASE__INST1_SEG1 0 343fb4d8502Sjsg #define MP0_BASE__INST1_SEG2 0 344fb4d8502Sjsg #define MP0_BASE__INST1_SEG3 0 345fb4d8502Sjsg #define MP0_BASE__INST1_SEG4 0 346fb4d8502Sjsg 347fb4d8502Sjsg #define MP0_BASE__INST2_SEG0 0 348fb4d8502Sjsg #define MP0_BASE__INST2_SEG1 0 349fb4d8502Sjsg #define MP0_BASE__INST2_SEG2 0 350fb4d8502Sjsg #define MP0_BASE__INST2_SEG3 0 351fb4d8502Sjsg #define MP0_BASE__INST2_SEG4 0 352fb4d8502Sjsg 353fb4d8502Sjsg #define MP0_BASE__INST3_SEG0 0 354fb4d8502Sjsg #define MP0_BASE__INST3_SEG1 0 355fb4d8502Sjsg #define MP0_BASE__INST3_SEG2 0 356fb4d8502Sjsg #define MP0_BASE__INST3_SEG3 0 357fb4d8502Sjsg #define MP0_BASE__INST3_SEG4 0 358fb4d8502Sjsg 359fb4d8502Sjsg #define MP0_BASE__INST4_SEG0 0 360fb4d8502Sjsg #define MP0_BASE__INST4_SEG1 0 361fb4d8502Sjsg #define MP0_BASE__INST4_SEG2 0 362fb4d8502Sjsg #define MP0_BASE__INST4_SEG3 0 363fb4d8502Sjsg #define MP0_BASE__INST4_SEG4 0 364fb4d8502Sjsg 365fb4d8502Sjsg #define MP1_BASE__INST0_SEG0 0x00016200 366fb4d8502Sjsg #define MP1_BASE__INST0_SEG1 0 367fb4d8502Sjsg #define MP1_BASE__INST0_SEG2 0 368fb4d8502Sjsg #define MP1_BASE__INST0_SEG3 0 369fb4d8502Sjsg #define MP1_BASE__INST0_SEG4 0 370fb4d8502Sjsg 371fb4d8502Sjsg #define MP1_BASE__INST1_SEG0 0 372fb4d8502Sjsg #define MP1_BASE__INST1_SEG1 0 373fb4d8502Sjsg #define MP1_BASE__INST1_SEG2 0 374fb4d8502Sjsg #define MP1_BASE__INST1_SEG3 0 375fb4d8502Sjsg #define MP1_BASE__INST1_SEG4 0 376fb4d8502Sjsg 377fb4d8502Sjsg #define MP1_BASE__INST2_SEG0 0 378fb4d8502Sjsg #define MP1_BASE__INST2_SEG1 0 379fb4d8502Sjsg #define MP1_BASE__INST2_SEG2 0 380fb4d8502Sjsg #define MP1_BASE__INST2_SEG3 0 381fb4d8502Sjsg #define MP1_BASE__INST2_SEG4 0 382fb4d8502Sjsg 383fb4d8502Sjsg #define MP1_BASE__INST3_SEG0 0 384fb4d8502Sjsg #define MP1_BASE__INST3_SEG1 0 385fb4d8502Sjsg #define MP1_BASE__INST3_SEG2 0 386fb4d8502Sjsg #define MP1_BASE__INST3_SEG3 0 387fb4d8502Sjsg #define MP1_BASE__INST3_SEG4 0 388fb4d8502Sjsg 389fb4d8502Sjsg #define MP1_BASE__INST4_SEG0 0 390fb4d8502Sjsg #define MP1_BASE__INST4_SEG1 0 391fb4d8502Sjsg #define MP1_BASE__INST4_SEG2 0 392fb4d8502Sjsg #define MP1_BASE__INST4_SEG3 0 393fb4d8502Sjsg #define MP1_BASE__INST4_SEG4 0 394fb4d8502Sjsg 395fb4d8502Sjsg #define MP2_BASE__INST0_SEG0 0x00016400 396fb4d8502Sjsg #define MP2_BASE__INST0_SEG1 0 397fb4d8502Sjsg #define MP2_BASE__INST0_SEG2 0 398fb4d8502Sjsg #define MP2_BASE__INST0_SEG3 0 399fb4d8502Sjsg #define MP2_BASE__INST0_SEG4 0 400fb4d8502Sjsg 401fb4d8502Sjsg #define MP2_BASE__INST1_SEG0 0 402fb4d8502Sjsg #define MP2_BASE__INST1_SEG1 0 403fb4d8502Sjsg #define MP2_BASE__INST1_SEG2 0 404fb4d8502Sjsg #define MP2_BASE__INST1_SEG3 0 405fb4d8502Sjsg #define MP2_BASE__INST1_SEG4 0 406fb4d8502Sjsg 407fb4d8502Sjsg #define MP2_BASE__INST2_SEG0 0 408fb4d8502Sjsg #define MP2_BASE__INST2_SEG1 0 409fb4d8502Sjsg #define MP2_BASE__INST2_SEG2 0 410fb4d8502Sjsg #define MP2_BASE__INST2_SEG3 0 411fb4d8502Sjsg #define MP2_BASE__INST2_SEG4 0 412fb4d8502Sjsg 413fb4d8502Sjsg #define MP2_BASE__INST3_SEG0 0 414fb4d8502Sjsg #define MP2_BASE__INST3_SEG1 0 415fb4d8502Sjsg #define MP2_BASE__INST3_SEG2 0 416fb4d8502Sjsg #define MP2_BASE__INST3_SEG3 0 417fb4d8502Sjsg #define MP2_BASE__INST3_SEG4 0 418fb4d8502Sjsg 419fb4d8502Sjsg #define MP2_BASE__INST4_SEG0 0 420fb4d8502Sjsg #define MP2_BASE__INST4_SEG1 0 421fb4d8502Sjsg #define MP2_BASE__INST4_SEG2 0 422fb4d8502Sjsg #define MP2_BASE__INST4_SEG3 0 423fb4d8502Sjsg #define MP2_BASE__INST4_SEG4 0 424fb4d8502Sjsg 425fb4d8502Sjsg #define DF_BASE__INST0_SEG0 0x00007000 426fb4d8502Sjsg #define DF_BASE__INST0_SEG1 0 427fb4d8502Sjsg #define DF_BASE__INST0_SEG2 0 428fb4d8502Sjsg #define DF_BASE__INST0_SEG3 0 429fb4d8502Sjsg #define DF_BASE__INST0_SEG4 0 430fb4d8502Sjsg 431fb4d8502Sjsg #define DF_BASE__INST1_SEG0 0 432fb4d8502Sjsg #define DF_BASE__INST1_SEG1 0 433fb4d8502Sjsg #define DF_BASE__INST1_SEG2 0 434fb4d8502Sjsg #define DF_BASE__INST1_SEG3 0 435fb4d8502Sjsg #define DF_BASE__INST1_SEG4 0 436fb4d8502Sjsg 437fb4d8502Sjsg #define DF_BASE__INST2_SEG0 0 438fb4d8502Sjsg #define DF_BASE__INST2_SEG1 0 439fb4d8502Sjsg #define DF_BASE__INST2_SEG2 0 440fb4d8502Sjsg #define DF_BASE__INST2_SEG3 0 441fb4d8502Sjsg #define DF_BASE__INST2_SEG4 0 442fb4d8502Sjsg 443fb4d8502Sjsg #define DF_BASE__INST3_SEG0 0 444fb4d8502Sjsg #define DF_BASE__INST3_SEG1 0 445fb4d8502Sjsg #define DF_BASE__INST3_SEG2 0 446fb4d8502Sjsg #define DF_BASE__INST3_SEG3 0 447fb4d8502Sjsg #define DF_BASE__INST3_SEG4 0 448fb4d8502Sjsg 449fb4d8502Sjsg #define DF_BASE__INST4_SEG0 0 450fb4d8502Sjsg #define DF_BASE__INST4_SEG1 0 451fb4d8502Sjsg #define DF_BASE__INST4_SEG2 0 452fb4d8502Sjsg #define DF_BASE__INST4_SEG3 0 453fb4d8502Sjsg #define DF_BASE__INST4_SEG4 0 454fb4d8502Sjsg 455fb4d8502Sjsg #define UVD_BASE__INST0_SEG0 0x00007800 456fb4d8502Sjsg #define UVD_BASE__INST0_SEG1 0x00007E00 457fb4d8502Sjsg #define UVD_BASE__INST0_SEG2 0 458fb4d8502Sjsg #define UVD_BASE__INST0_SEG3 0 459fb4d8502Sjsg #define UVD_BASE__INST0_SEG4 0 460fb4d8502Sjsg 461fb4d8502Sjsg #define UVD_BASE__INST1_SEG0 0 462fb4d8502Sjsg #define UVD_BASE__INST1_SEG1 0 463fb4d8502Sjsg #define UVD_BASE__INST1_SEG2 0 464fb4d8502Sjsg #define UVD_BASE__INST1_SEG3 0 465fb4d8502Sjsg #define UVD_BASE__INST1_SEG4 0 466fb4d8502Sjsg 467fb4d8502Sjsg #define UVD_BASE__INST2_SEG0 0 468fb4d8502Sjsg #define UVD_BASE__INST2_SEG1 0 469fb4d8502Sjsg #define UVD_BASE__INST2_SEG2 0 470fb4d8502Sjsg #define UVD_BASE__INST2_SEG3 0 471fb4d8502Sjsg #define UVD_BASE__INST2_SEG4 0 472fb4d8502Sjsg 473fb4d8502Sjsg #define UVD_BASE__INST3_SEG0 0 474fb4d8502Sjsg #define UVD_BASE__INST3_SEG1 0 475fb4d8502Sjsg #define UVD_BASE__INST3_SEG2 0 476fb4d8502Sjsg #define UVD_BASE__INST3_SEG3 0 477fb4d8502Sjsg #define UVD_BASE__INST3_SEG4 0 478fb4d8502Sjsg 479fb4d8502Sjsg #define UVD_BASE__INST4_SEG0 0 480fb4d8502Sjsg #define UVD_BASE__INST4_SEG1 0 481fb4d8502Sjsg #define UVD_BASE__INST4_SEG2 0 482fb4d8502Sjsg #define UVD_BASE__INST4_SEG3 0 483fb4d8502Sjsg #define UVD_BASE__INST4_SEG4 0 484fb4d8502Sjsg 485fb4d8502Sjsg #define VCN_BASE__INST0_SEG0 0x00007800 486fb4d8502Sjsg #define VCN_BASE__INST0_SEG1 0x00007E00 487fb4d8502Sjsg #define VCN_BASE__INST0_SEG2 0 488fb4d8502Sjsg #define VCN_BASE__INST0_SEG3 0 489fb4d8502Sjsg #define VCN_BASE__INST0_SEG4 0 490fb4d8502Sjsg 491fb4d8502Sjsg #define VCN_BASE__INST1_SEG0 0 492fb4d8502Sjsg #define VCN_BASE__INST1_SEG1 0 493fb4d8502Sjsg #define VCN_BASE__INST1_SEG2 0 494fb4d8502Sjsg #define VCN_BASE__INST1_SEG3 0 495fb4d8502Sjsg #define VCN_BASE__INST1_SEG4 0 496fb4d8502Sjsg 497fb4d8502Sjsg #define VCN_BASE__INST2_SEG0 0 498fb4d8502Sjsg #define VCN_BASE__INST2_SEG1 0 499fb4d8502Sjsg #define VCN_BASE__INST2_SEG2 0 500fb4d8502Sjsg #define VCN_BASE__INST2_SEG3 0 501fb4d8502Sjsg #define VCN_BASE__INST2_SEG4 0 502fb4d8502Sjsg 503fb4d8502Sjsg #define VCN_BASE__INST3_SEG0 0 504fb4d8502Sjsg #define VCN_BASE__INST3_SEG1 0 505fb4d8502Sjsg #define VCN_BASE__INST3_SEG2 0 506fb4d8502Sjsg #define VCN_BASE__INST3_SEG3 0 507fb4d8502Sjsg #define VCN_BASE__INST3_SEG4 0 508fb4d8502Sjsg 509fb4d8502Sjsg #define VCN_BASE__INST4_SEG0 0 510fb4d8502Sjsg #define VCN_BASE__INST4_SEG1 0 511fb4d8502Sjsg #define VCN_BASE__INST4_SEG2 0 512fb4d8502Sjsg #define VCN_BASE__INST4_SEG3 0 513fb4d8502Sjsg #define VCN_BASE__INST4_SEG4 0 514fb4d8502Sjsg 515fb4d8502Sjsg #define DBGU_BASE__INST0_SEG0 0x00000180 516fb4d8502Sjsg #define DBGU_BASE__INST0_SEG1 0x000001A0 517fb4d8502Sjsg #define DBGU_BASE__INST0_SEG2 0 518fb4d8502Sjsg #define DBGU_BASE__INST0_SEG3 0 519fb4d8502Sjsg #define DBGU_BASE__INST0_SEG4 0 520fb4d8502Sjsg 521fb4d8502Sjsg #define DBGU_BASE__INST1_SEG0 0 522fb4d8502Sjsg #define DBGU_BASE__INST1_SEG1 0 523fb4d8502Sjsg #define DBGU_BASE__INST1_SEG2 0 524fb4d8502Sjsg #define DBGU_BASE__INST1_SEG3 0 525fb4d8502Sjsg #define DBGU_BASE__INST1_SEG4 0 526fb4d8502Sjsg 527fb4d8502Sjsg #define DBGU_BASE__INST2_SEG0 0 528fb4d8502Sjsg #define DBGU_BASE__INST2_SEG1 0 529fb4d8502Sjsg #define DBGU_BASE__INST2_SEG2 0 530fb4d8502Sjsg #define DBGU_BASE__INST2_SEG3 0 531fb4d8502Sjsg #define DBGU_BASE__INST2_SEG4 0 532fb4d8502Sjsg 533fb4d8502Sjsg #define DBGU_BASE__INST3_SEG0 0 534fb4d8502Sjsg #define DBGU_BASE__INST3_SEG1 0 535fb4d8502Sjsg #define DBGU_BASE__INST3_SEG2 0 536fb4d8502Sjsg #define DBGU_BASE__INST3_SEG3 0 537fb4d8502Sjsg #define DBGU_BASE__INST3_SEG4 0 538fb4d8502Sjsg 539fb4d8502Sjsg #define DBGU_BASE__INST4_SEG0 0 540fb4d8502Sjsg #define DBGU_BASE__INST4_SEG1 0 541fb4d8502Sjsg #define DBGU_BASE__INST4_SEG2 0 542fb4d8502Sjsg #define DBGU_BASE__INST4_SEG3 0 543fb4d8502Sjsg #define DBGU_BASE__INST4_SEG4 0 544fb4d8502Sjsg 545fb4d8502Sjsg #define DBGU_NBIO_BASE__INST0_SEG0 0x000001C0 546fb4d8502Sjsg #define DBGU_NBIO_BASE__INST0_SEG1 0 547fb4d8502Sjsg #define DBGU_NBIO_BASE__INST0_SEG2 0 548fb4d8502Sjsg #define DBGU_NBIO_BASE__INST0_SEG3 0 549fb4d8502Sjsg #define DBGU_NBIO_BASE__INST0_SEG4 0 550fb4d8502Sjsg 551fb4d8502Sjsg #define DBGU_NBIO_BASE__INST1_SEG0 0 552fb4d8502Sjsg #define DBGU_NBIO_BASE__INST1_SEG1 0 553fb4d8502Sjsg #define DBGU_NBIO_BASE__INST1_SEG2 0 554fb4d8502Sjsg #define DBGU_NBIO_BASE__INST1_SEG3 0 555fb4d8502Sjsg #define DBGU_NBIO_BASE__INST1_SEG4 0 556fb4d8502Sjsg 557fb4d8502Sjsg #define DBGU_NBIO_BASE__INST2_SEG0 0 558fb4d8502Sjsg #define DBGU_NBIO_BASE__INST2_SEG1 0 559fb4d8502Sjsg #define DBGU_NBIO_BASE__INST2_SEG2 0 560fb4d8502Sjsg #define DBGU_NBIO_BASE__INST2_SEG3 0 561fb4d8502Sjsg #define DBGU_NBIO_BASE__INST2_SEG4 0 562fb4d8502Sjsg 563fb4d8502Sjsg #define DBGU_NBIO_BASE__INST3_SEG0 0 564fb4d8502Sjsg #define DBGU_NBIO_BASE__INST3_SEG1 0 565fb4d8502Sjsg #define DBGU_NBIO_BASE__INST3_SEG2 0 566fb4d8502Sjsg #define DBGU_NBIO_BASE__INST3_SEG3 0 567fb4d8502Sjsg #define DBGU_NBIO_BASE__INST3_SEG4 0 568fb4d8502Sjsg 569fb4d8502Sjsg #define DBGU_NBIO_BASE__INST4_SEG0 0 570fb4d8502Sjsg #define DBGU_NBIO_BASE__INST4_SEG1 0 571fb4d8502Sjsg #define DBGU_NBIO_BASE__INST4_SEG2 0 572fb4d8502Sjsg #define DBGU_NBIO_BASE__INST4_SEG3 0 573fb4d8502Sjsg #define DBGU_NBIO_BASE__INST4_SEG4 0 574fb4d8502Sjsg 575fb4d8502Sjsg #define DBGU_IO_BASE__INST0_SEG0 0x000001E0 576fb4d8502Sjsg #define DBGU_IO_BASE__INST0_SEG1 0 577fb4d8502Sjsg #define DBGU_IO_BASE__INST0_SEG2 0 578fb4d8502Sjsg #define DBGU_IO_BASE__INST0_SEG3 0 579fb4d8502Sjsg #define DBGU_IO_BASE__INST0_SEG4 0 580fb4d8502Sjsg 581fb4d8502Sjsg #define DBGU_IO_BASE__INST1_SEG0 0 582fb4d8502Sjsg #define DBGU_IO_BASE__INST1_SEG1 0 583fb4d8502Sjsg #define DBGU_IO_BASE__INST1_SEG2 0 584fb4d8502Sjsg #define DBGU_IO_BASE__INST1_SEG3 0 585fb4d8502Sjsg #define DBGU_IO_BASE__INST1_SEG4 0 586fb4d8502Sjsg 587fb4d8502Sjsg #define DBGU_IO_BASE__INST2_SEG0 0 588fb4d8502Sjsg #define DBGU_IO_BASE__INST2_SEG1 0 589fb4d8502Sjsg #define DBGU_IO_BASE__INST2_SEG2 0 590fb4d8502Sjsg #define DBGU_IO_BASE__INST2_SEG3 0 591fb4d8502Sjsg #define DBGU_IO_BASE__INST2_SEG4 0 592fb4d8502Sjsg 593fb4d8502Sjsg #define DBGU_IO_BASE__INST3_SEG0 0 594fb4d8502Sjsg #define DBGU_IO_BASE__INST3_SEG1 0 595fb4d8502Sjsg #define DBGU_IO_BASE__INST3_SEG2 0 596fb4d8502Sjsg #define DBGU_IO_BASE__INST3_SEG3 0 597fb4d8502Sjsg #define DBGU_IO_BASE__INST3_SEG4 0 598fb4d8502Sjsg 599fb4d8502Sjsg #define DBGU_IO_BASE__INST4_SEG0 0 600fb4d8502Sjsg #define DBGU_IO_BASE__INST4_SEG1 0 601fb4d8502Sjsg #define DBGU_IO_BASE__INST4_SEG2 0 602fb4d8502Sjsg #define DBGU_IO_BASE__INST4_SEG3 0 603fb4d8502Sjsg #define DBGU_IO_BASE__INST4_SEG4 0 604fb4d8502Sjsg 605fb4d8502Sjsg #define DFX_DAP_BASE__INST0_SEG0 0x000005A0 606fb4d8502Sjsg #define DFX_DAP_BASE__INST0_SEG1 0 607fb4d8502Sjsg #define DFX_DAP_BASE__INST0_SEG2 0 608fb4d8502Sjsg #define DFX_DAP_BASE__INST0_SEG3 0 609fb4d8502Sjsg #define DFX_DAP_BASE__INST0_SEG4 0 610fb4d8502Sjsg 611fb4d8502Sjsg #define DFX_DAP_BASE__INST1_SEG0 0 612fb4d8502Sjsg #define DFX_DAP_BASE__INST1_SEG1 0 613fb4d8502Sjsg #define DFX_DAP_BASE__INST1_SEG2 0 614fb4d8502Sjsg #define DFX_DAP_BASE__INST1_SEG3 0 615fb4d8502Sjsg #define DFX_DAP_BASE__INST1_SEG4 0 616fb4d8502Sjsg 617fb4d8502Sjsg #define DFX_DAP_BASE__INST2_SEG0 0 618fb4d8502Sjsg #define DFX_DAP_BASE__INST2_SEG1 0 619fb4d8502Sjsg #define DFX_DAP_BASE__INST2_SEG2 0 620fb4d8502Sjsg #define DFX_DAP_BASE__INST2_SEG3 0 621fb4d8502Sjsg #define DFX_DAP_BASE__INST2_SEG4 0 622fb4d8502Sjsg 623fb4d8502Sjsg #define DFX_DAP_BASE__INST3_SEG0 0 624fb4d8502Sjsg #define DFX_DAP_BASE__INST3_SEG1 0 625fb4d8502Sjsg #define DFX_DAP_BASE__INST3_SEG2 0 626fb4d8502Sjsg #define DFX_DAP_BASE__INST3_SEG3 0 627fb4d8502Sjsg #define DFX_DAP_BASE__INST3_SEG4 0 628fb4d8502Sjsg 629fb4d8502Sjsg #define DFX_DAP_BASE__INST4_SEG0 0 630fb4d8502Sjsg #define DFX_DAP_BASE__INST4_SEG1 0 631fb4d8502Sjsg #define DFX_DAP_BASE__INST4_SEG2 0 632fb4d8502Sjsg #define DFX_DAP_BASE__INST4_SEG3 0 633fb4d8502Sjsg #define DFX_DAP_BASE__INST4_SEG4 0 634fb4d8502Sjsg 635fb4d8502Sjsg #define DFX_BASE__INST0_SEG0 0x00000580 636fb4d8502Sjsg #define DFX_BASE__INST0_SEG1 0 637fb4d8502Sjsg #define DFX_BASE__INST0_SEG2 0 638fb4d8502Sjsg #define DFX_BASE__INST0_SEG3 0 639fb4d8502Sjsg #define DFX_BASE__INST0_SEG4 0 640fb4d8502Sjsg 641fb4d8502Sjsg #define DFX_BASE__INST1_SEG0 0 642fb4d8502Sjsg #define DFX_BASE__INST1_SEG1 0 643fb4d8502Sjsg #define DFX_BASE__INST1_SEG2 0 644fb4d8502Sjsg #define DFX_BASE__INST1_SEG3 0 645fb4d8502Sjsg #define DFX_BASE__INST1_SEG4 0 646fb4d8502Sjsg 647fb4d8502Sjsg #define DFX_BASE__INST2_SEG0 0 648fb4d8502Sjsg #define DFX_BASE__INST2_SEG1 0 649fb4d8502Sjsg #define DFX_BASE__INST2_SEG2 0 650fb4d8502Sjsg #define DFX_BASE__INST2_SEG3 0 651fb4d8502Sjsg #define DFX_BASE__INST2_SEG4 0 652fb4d8502Sjsg 653fb4d8502Sjsg #define DFX_BASE__INST3_SEG0 0 654fb4d8502Sjsg #define DFX_BASE__INST3_SEG1 0 655fb4d8502Sjsg #define DFX_BASE__INST3_SEG2 0 656fb4d8502Sjsg #define DFX_BASE__INST3_SEG3 0 657fb4d8502Sjsg #define DFX_BASE__INST3_SEG4 0 658fb4d8502Sjsg 659fb4d8502Sjsg #define DFX_BASE__INST4_SEG0 0 660fb4d8502Sjsg #define DFX_BASE__INST4_SEG1 0 661fb4d8502Sjsg #define DFX_BASE__INST4_SEG2 0 662fb4d8502Sjsg #define DFX_BASE__INST4_SEG3 0 663fb4d8502Sjsg #define DFX_BASE__INST4_SEG4 0 664fb4d8502Sjsg 665fb4d8502Sjsg #define ISP_BASE__INST0_SEG0 0x00018000 666fb4d8502Sjsg #define ISP_BASE__INST0_SEG1 0 667fb4d8502Sjsg #define ISP_BASE__INST0_SEG2 0 668fb4d8502Sjsg #define ISP_BASE__INST0_SEG3 0 669fb4d8502Sjsg #define ISP_BASE__INST0_SEG4 0 670fb4d8502Sjsg 671fb4d8502Sjsg #define ISP_BASE__INST1_SEG0 0 672fb4d8502Sjsg #define ISP_BASE__INST1_SEG1 0 673fb4d8502Sjsg #define ISP_BASE__INST1_SEG2 0 674fb4d8502Sjsg #define ISP_BASE__INST1_SEG3 0 675fb4d8502Sjsg #define ISP_BASE__INST1_SEG4 0 676fb4d8502Sjsg 677fb4d8502Sjsg #define ISP_BASE__INST2_SEG0 0 678fb4d8502Sjsg #define ISP_BASE__INST2_SEG1 0 679fb4d8502Sjsg #define ISP_BASE__INST2_SEG2 0 680fb4d8502Sjsg #define ISP_BASE__INST2_SEG3 0 681fb4d8502Sjsg #define ISP_BASE__INST2_SEG4 0 682fb4d8502Sjsg 683fb4d8502Sjsg #define ISP_BASE__INST3_SEG0 0 684fb4d8502Sjsg #define ISP_BASE__INST3_SEG1 0 685fb4d8502Sjsg #define ISP_BASE__INST3_SEG2 0 686fb4d8502Sjsg #define ISP_BASE__INST3_SEG3 0 687fb4d8502Sjsg #define ISP_BASE__INST3_SEG4 0 688fb4d8502Sjsg 689fb4d8502Sjsg #define ISP_BASE__INST4_SEG0 0 690fb4d8502Sjsg #define ISP_BASE__INST4_SEG1 0 691fb4d8502Sjsg #define ISP_BASE__INST4_SEG2 0 692fb4d8502Sjsg #define ISP_BASE__INST4_SEG3 0 693fb4d8502Sjsg #define ISP_BASE__INST4_SEG4 0 694fb4d8502Sjsg 695fb4d8502Sjsg #define SYSTEMHUB_BASE__INST0_SEG0 0x00000EA0 696fb4d8502Sjsg #define SYSTEMHUB_BASE__INST0_SEG1 0 697fb4d8502Sjsg #define SYSTEMHUB_BASE__INST0_SEG2 0 698fb4d8502Sjsg #define SYSTEMHUB_BASE__INST0_SEG3 0 699fb4d8502Sjsg #define SYSTEMHUB_BASE__INST0_SEG4 0 700fb4d8502Sjsg 701fb4d8502Sjsg #define SYSTEMHUB_BASE__INST1_SEG0 0 702fb4d8502Sjsg #define SYSTEMHUB_BASE__INST1_SEG1 0 703fb4d8502Sjsg #define SYSTEMHUB_BASE__INST1_SEG2 0 704fb4d8502Sjsg #define SYSTEMHUB_BASE__INST1_SEG3 0 705fb4d8502Sjsg #define SYSTEMHUB_BASE__INST1_SEG4 0 706fb4d8502Sjsg 707fb4d8502Sjsg #define SYSTEMHUB_BASE__INST2_SEG0 0 708fb4d8502Sjsg #define SYSTEMHUB_BASE__INST2_SEG1 0 709fb4d8502Sjsg #define SYSTEMHUB_BASE__INST2_SEG2 0 710fb4d8502Sjsg #define SYSTEMHUB_BASE__INST2_SEG3 0 711fb4d8502Sjsg #define SYSTEMHUB_BASE__INST2_SEG4 0 712fb4d8502Sjsg 713fb4d8502Sjsg #define SYSTEMHUB_BASE__INST3_SEG0 0 714fb4d8502Sjsg #define SYSTEMHUB_BASE__INST3_SEG1 0 715fb4d8502Sjsg #define SYSTEMHUB_BASE__INST3_SEG2 0 716fb4d8502Sjsg #define SYSTEMHUB_BASE__INST3_SEG3 0 717fb4d8502Sjsg #define SYSTEMHUB_BASE__INST3_SEG4 0 718fb4d8502Sjsg 719fb4d8502Sjsg #define SYSTEMHUB_BASE__INST4_SEG0 0 720fb4d8502Sjsg #define SYSTEMHUB_BASE__INST4_SEG1 0 721fb4d8502Sjsg #define SYSTEMHUB_BASE__INST4_SEG2 0 722fb4d8502Sjsg #define SYSTEMHUB_BASE__INST4_SEG3 0 723fb4d8502Sjsg #define SYSTEMHUB_BASE__INST4_SEG4 0 724fb4d8502Sjsg 725fb4d8502Sjsg #define L2IMU_BASE__INST0_SEG0 0x00007DC0 726fb4d8502Sjsg #define L2IMU_BASE__INST0_SEG1 0 727fb4d8502Sjsg #define L2IMU_BASE__INST0_SEG2 0 728fb4d8502Sjsg #define L2IMU_BASE__INST0_SEG3 0 729fb4d8502Sjsg #define L2IMU_BASE__INST0_SEG4 0 730fb4d8502Sjsg 731fb4d8502Sjsg #define L2IMU_BASE__INST1_SEG0 0 732fb4d8502Sjsg #define L2IMU_BASE__INST1_SEG1 0 733fb4d8502Sjsg #define L2IMU_BASE__INST1_SEG2 0 734fb4d8502Sjsg #define L2IMU_BASE__INST1_SEG3 0 735fb4d8502Sjsg #define L2IMU_BASE__INST1_SEG4 0 736fb4d8502Sjsg 737fb4d8502Sjsg #define L2IMU_BASE__INST2_SEG0 0 738fb4d8502Sjsg #define L2IMU_BASE__INST2_SEG1 0 739fb4d8502Sjsg #define L2IMU_BASE__INST2_SEG2 0 740fb4d8502Sjsg #define L2IMU_BASE__INST2_SEG3 0 741fb4d8502Sjsg #define L2IMU_BASE__INST2_SEG4 0 742fb4d8502Sjsg 743fb4d8502Sjsg #define L2IMU_BASE__INST3_SEG0 0 744fb4d8502Sjsg #define L2IMU_BASE__INST3_SEG1 0 745fb4d8502Sjsg #define L2IMU_BASE__INST3_SEG2 0 746fb4d8502Sjsg #define L2IMU_BASE__INST3_SEG3 0 747fb4d8502Sjsg #define L2IMU_BASE__INST3_SEG4 0 748fb4d8502Sjsg 749fb4d8502Sjsg #define L2IMU_BASE__INST4_SEG0 0 750fb4d8502Sjsg #define L2IMU_BASE__INST4_SEG1 0 751fb4d8502Sjsg #define L2IMU_BASE__INST4_SEG2 0 752fb4d8502Sjsg #define L2IMU_BASE__INST4_SEG3 0 753fb4d8502Sjsg #define L2IMU_BASE__INST4_SEG4 0 754fb4d8502Sjsg 755fb4d8502Sjsg #define IOHC_BASE__INST0_SEG0 0x00010000 756fb4d8502Sjsg #define IOHC_BASE__INST0_SEG1 0 757fb4d8502Sjsg #define IOHC_BASE__INST0_SEG2 0 758fb4d8502Sjsg #define IOHC_BASE__INST0_SEG3 0 759fb4d8502Sjsg #define IOHC_BASE__INST0_SEG4 0 760fb4d8502Sjsg 761fb4d8502Sjsg #define IOHC_BASE__INST1_SEG0 0 762fb4d8502Sjsg #define IOHC_BASE__INST1_SEG1 0 763fb4d8502Sjsg #define IOHC_BASE__INST1_SEG2 0 764fb4d8502Sjsg #define IOHC_BASE__INST1_SEG3 0 765fb4d8502Sjsg #define IOHC_BASE__INST1_SEG4 0 766fb4d8502Sjsg 767fb4d8502Sjsg #define IOHC_BASE__INST2_SEG0 0 768fb4d8502Sjsg #define IOHC_BASE__INST2_SEG1 0 769fb4d8502Sjsg #define IOHC_BASE__INST2_SEG2 0 770fb4d8502Sjsg #define IOHC_BASE__INST2_SEG3 0 771fb4d8502Sjsg #define IOHC_BASE__INST2_SEG4 0 772fb4d8502Sjsg 773fb4d8502Sjsg #define IOHC_BASE__INST3_SEG0 0 774fb4d8502Sjsg #define IOHC_BASE__INST3_SEG1 0 775fb4d8502Sjsg #define IOHC_BASE__INST3_SEG2 0 776fb4d8502Sjsg #define IOHC_BASE__INST3_SEG3 0 777fb4d8502Sjsg #define IOHC_BASE__INST3_SEG4 0 778fb4d8502Sjsg 779fb4d8502Sjsg #define IOHC_BASE__INST4_SEG0 0 780fb4d8502Sjsg #define IOHC_BASE__INST4_SEG1 0 781fb4d8502Sjsg #define IOHC_BASE__INST4_SEG2 0 782fb4d8502Sjsg #define IOHC_BASE__INST4_SEG3 0 783fb4d8502Sjsg #define IOHC_BASE__INST4_SEG4 0 784fb4d8502Sjsg 785fb4d8502Sjsg #define ATHUB_BASE__INST0_SEG0 0x00000C20 786fb4d8502Sjsg #define ATHUB_BASE__INST0_SEG1 0 787fb4d8502Sjsg #define ATHUB_BASE__INST0_SEG2 0 788fb4d8502Sjsg #define ATHUB_BASE__INST0_SEG3 0 789fb4d8502Sjsg #define ATHUB_BASE__INST0_SEG4 0 790fb4d8502Sjsg 791fb4d8502Sjsg #define ATHUB_BASE__INST1_SEG0 0 792fb4d8502Sjsg #define ATHUB_BASE__INST1_SEG1 0 793fb4d8502Sjsg #define ATHUB_BASE__INST1_SEG2 0 794fb4d8502Sjsg #define ATHUB_BASE__INST1_SEG3 0 795fb4d8502Sjsg #define ATHUB_BASE__INST1_SEG4 0 796fb4d8502Sjsg 797fb4d8502Sjsg #define ATHUB_BASE__INST2_SEG0 0 798fb4d8502Sjsg #define ATHUB_BASE__INST2_SEG1 0 799fb4d8502Sjsg #define ATHUB_BASE__INST2_SEG2 0 800fb4d8502Sjsg #define ATHUB_BASE__INST2_SEG3 0 801fb4d8502Sjsg #define ATHUB_BASE__INST2_SEG4 0 802fb4d8502Sjsg 803fb4d8502Sjsg #define ATHUB_BASE__INST3_SEG0 0 804fb4d8502Sjsg #define ATHUB_BASE__INST3_SEG1 0 805fb4d8502Sjsg #define ATHUB_BASE__INST3_SEG2 0 806fb4d8502Sjsg #define ATHUB_BASE__INST3_SEG3 0 807fb4d8502Sjsg #define ATHUB_BASE__INST3_SEG4 0 808fb4d8502Sjsg 809fb4d8502Sjsg #define ATHUB_BASE__INST4_SEG0 0 810fb4d8502Sjsg #define ATHUB_BASE__INST4_SEG1 0 811fb4d8502Sjsg #define ATHUB_BASE__INST4_SEG2 0 812fb4d8502Sjsg #define ATHUB_BASE__INST4_SEG3 0 813fb4d8502Sjsg #define ATHUB_BASE__INST4_SEG4 0 814fb4d8502Sjsg 815fb4d8502Sjsg #define VCE_BASE__INST0_SEG0 0x00007E00 816fb4d8502Sjsg #define VCE_BASE__INST0_SEG1 0x00048800 817fb4d8502Sjsg #define VCE_BASE__INST0_SEG2 0 818fb4d8502Sjsg #define VCE_BASE__INST0_SEG3 0 819fb4d8502Sjsg #define VCE_BASE__INST0_SEG4 0 820fb4d8502Sjsg 821fb4d8502Sjsg #define VCE_BASE__INST1_SEG0 0 822fb4d8502Sjsg #define VCE_BASE__INST1_SEG1 0 823fb4d8502Sjsg #define VCE_BASE__INST1_SEG2 0 824fb4d8502Sjsg #define VCE_BASE__INST1_SEG3 0 825fb4d8502Sjsg #define VCE_BASE__INST1_SEG4 0 826fb4d8502Sjsg 827fb4d8502Sjsg #define VCE_BASE__INST2_SEG0 0 828fb4d8502Sjsg #define VCE_BASE__INST2_SEG1 0 829fb4d8502Sjsg #define VCE_BASE__INST2_SEG2 0 830fb4d8502Sjsg #define VCE_BASE__INST2_SEG3 0 831fb4d8502Sjsg #define VCE_BASE__INST2_SEG4 0 832fb4d8502Sjsg 833fb4d8502Sjsg #define VCE_BASE__INST3_SEG0 0 834fb4d8502Sjsg #define VCE_BASE__INST3_SEG1 0 835fb4d8502Sjsg #define VCE_BASE__INST3_SEG2 0 836fb4d8502Sjsg #define VCE_BASE__INST3_SEG3 0 837fb4d8502Sjsg #define VCE_BASE__INST3_SEG4 0 838fb4d8502Sjsg 839fb4d8502Sjsg #define VCE_BASE__INST4_SEG0 0 840fb4d8502Sjsg #define VCE_BASE__INST4_SEG1 0 841fb4d8502Sjsg #define VCE_BASE__INST4_SEG2 0 842fb4d8502Sjsg #define VCE_BASE__INST4_SEG3 0 843fb4d8502Sjsg #define VCE_BASE__INST4_SEG4 0 844fb4d8502Sjsg 845fb4d8502Sjsg #define GC_BASE__INST0_SEG0 0x00002000 846fb4d8502Sjsg #define GC_BASE__INST0_SEG1 0x0000A000 847fb4d8502Sjsg #define GC_BASE__INST0_SEG2 0 848fb4d8502Sjsg #define GC_BASE__INST0_SEG3 0 849fb4d8502Sjsg #define GC_BASE__INST0_SEG4 0 850fb4d8502Sjsg 851fb4d8502Sjsg #define GC_BASE__INST1_SEG0 0 852fb4d8502Sjsg #define GC_BASE__INST1_SEG1 0 853fb4d8502Sjsg #define GC_BASE__INST1_SEG2 0 854fb4d8502Sjsg #define GC_BASE__INST1_SEG3 0 855fb4d8502Sjsg #define GC_BASE__INST1_SEG4 0 856fb4d8502Sjsg 857fb4d8502Sjsg #define GC_BASE__INST2_SEG0 0 858fb4d8502Sjsg #define GC_BASE__INST2_SEG1 0 859fb4d8502Sjsg #define GC_BASE__INST2_SEG2 0 860fb4d8502Sjsg #define GC_BASE__INST2_SEG3 0 861fb4d8502Sjsg #define GC_BASE__INST2_SEG4 0 862fb4d8502Sjsg 863fb4d8502Sjsg #define GC_BASE__INST3_SEG0 0 864fb4d8502Sjsg #define GC_BASE__INST3_SEG1 0 865fb4d8502Sjsg #define GC_BASE__INST3_SEG2 0 866fb4d8502Sjsg #define GC_BASE__INST3_SEG3 0 867fb4d8502Sjsg #define GC_BASE__INST3_SEG4 0 868fb4d8502Sjsg 869fb4d8502Sjsg #define GC_BASE__INST4_SEG0 0 870fb4d8502Sjsg #define GC_BASE__INST4_SEG1 0 871fb4d8502Sjsg #define GC_BASE__INST4_SEG2 0 872fb4d8502Sjsg #define GC_BASE__INST4_SEG3 0 873fb4d8502Sjsg #define GC_BASE__INST4_SEG4 0 874fb4d8502Sjsg 875fb4d8502Sjsg #define MMHUB_BASE__INST0_SEG0 0x0001A000 876fb4d8502Sjsg #define MMHUB_BASE__INST0_SEG1 0 877fb4d8502Sjsg #define MMHUB_BASE__INST0_SEG2 0 878fb4d8502Sjsg #define MMHUB_BASE__INST0_SEG3 0 879fb4d8502Sjsg #define MMHUB_BASE__INST0_SEG4 0 880fb4d8502Sjsg 881fb4d8502Sjsg #define MMHUB_BASE__INST1_SEG0 0 882fb4d8502Sjsg #define MMHUB_BASE__INST1_SEG1 0 883fb4d8502Sjsg #define MMHUB_BASE__INST1_SEG2 0 884fb4d8502Sjsg #define MMHUB_BASE__INST1_SEG3 0 885fb4d8502Sjsg #define MMHUB_BASE__INST1_SEG4 0 886fb4d8502Sjsg 887fb4d8502Sjsg #define MMHUB_BASE__INST2_SEG0 0 888fb4d8502Sjsg #define MMHUB_BASE__INST2_SEG1 0 889fb4d8502Sjsg #define MMHUB_BASE__INST2_SEG2 0 890fb4d8502Sjsg #define MMHUB_BASE__INST2_SEG3 0 891fb4d8502Sjsg #define MMHUB_BASE__INST2_SEG4 0 892fb4d8502Sjsg 893fb4d8502Sjsg #define MMHUB_BASE__INST3_SEG0 0 894fb4d8502Sjsg #define MMHUB_BASE__INST3_SEG1 0 895fb4d8502Sjsg #define MMHUB_BASE__INST3_SEG2 0 896fb4d8502Sjsg #define MMHUB_BASE__INST3_SEG3 0 897fb4d8502Sjsg #define MMHUB_BASE__INST3_SEG4 0 898fb4d8502Sjsg 899fb4d8502Sjsg #define MMHUB_BASE__INST4_SEG0 0 900fb4d8502Sjsg #define MMHUB_BASE__INST4_SEG1 0 901fb4d8502Sjsg #define MMHUB_BASE__INST4_SEG2 0 902fb4d8502Sjsg #define MMHUB_BASE__INST4_SEG3 0 903fb4d8502Sjsg #define MMHUB_BASE__INST4_SEG4 0 904fb4d8502Sjsg 905fb4d8502Sjsg #define RSMU_BASE__INST0_SEG0 0x00012000 906fb4d8502Sjsg #define RSMU_BASE__INST0_SEG1 0 907fb4d8502Sjsg #define RSMU_BASE__INST0_SEG2 0 908fb4d8502Sjsg #define RSMU_BASE__INST0_SEG3 0 909fb4d8502Sjsg #define RSMU_BASE__INST0_SEG4 0 910fb4d8502Sjsg 911fb4d8502Sjsg #define RSMU_BASE__INST1_SEG0 0 912fb4d8502Sjsg #define RSMU_BASE__INST1_SEG1 0 913fb4d8502Sjsg #define RSMU_BASE__INST1_SEG2 0 914fb4d8502Sjsg #define RSMU_BASE__INST1_SEG3 0 915fb4d8502Sjsg #define RSMU_BASE__INST1_SEG4 0 916fb4d8502Sjsg 917fb4d8502Sjsg #define RSMU_BASE__INST2_SEG0 0 918fb4d8502Sjsg #define RSMU_BASE__INST2_SEG1 0 919fb4d8502Sjsg #define RSMU_BASE__INST2_SEG2 0 920fb4d8502Sjsg #define RSMU_BASE__INST2_SEG3 0 921fb4d8502Sjsg #define RSMU_BASE__INST2_SEG4 0 922fb4d8502Sjsg 923fb4d8502Sjsg #define RSMU_BASE__INST3_SEG0 0 924fb4d8502Sjsg #define RSMU_BASE__INST3_SEG1 0 925fb4d8502Sjsg #define RSMU_BASE__INST3_SEG2 0 926fb4d8502Sjsg #define RSMU_BASE__INST3_SEG3 0 927fb4d8502Sjsg #define RSMU_BASE__INST3_SEG4 0 928fb4d8502Sjsg 929fb4d8502Sjsg #define RSMU_BASE__INST4_SEG0 0 930fb4d8502Sjsg #define RSMU_BASE__INST4_SEG1 0 931fb4d8502Sjsg #define RSMU_BASE__INST4_SEG2 0 932fb4d8502Sjsg #define RSMU_BASE__INST4_SEG3 0 933fb4d8502Sjsg #define RSMU_BASE__INST4_SEG4 0 934fb4d8502Sjsg 935fb4d8502Sjsg #define HDP_BASE__INST0_SEG0 0x00000F20 936fb4d8502Sjsg #define HDP_BASE__INST0_SEG1 0 937fb4d8502Sjsg #define HDP_BASE__INST0_SEG2 0 938fb4d8502Sjsg #define HDP_BASE__INST0_SEG3 0 939fb4d8502Sjsg #define HDP_BASE__INST0_SEG4 0 940fb4d8502Sjsg 941fb4d8502Sjsg #define HDP_BASE__INST1_SEG0 0 942fb4d8502Sjsg #define HDP_BASE__INST1_SEG1 0 943fb4d8502Sjsg #define HDP_BASE__INST1_SEG2 0 944fb4d8502Sjsg #define HDP_BASE__INST1_SEG3 0 945fb4d8502Sjsg #define HDP_BASE__INST1_SEG4 0 946fb4d8502Sjsg 947fb4d8502Sjsg #define HDP_BASE__INST2_SEG0 0 948fb4d8502Sjsg #define HDP_BASE__INST2_SEG1 0 949fb4d8502Sjsg #define HDP_BASE__INST2_SEG2 0 950fb4d8502Sjsg #define HDP_BASE__INST2_SEG3 0 951fb4d8502Sjsg #define HDP_BASE__INST2_SEG4 0 952fb4d8502Sjsg 953fb4d8502Sjsg #define HDP_BASE__INST3_SEG0 0 954fb4d8502Sjsg #define HDP_BASE__INST3_SEG1 0 955fb4d8502Sjsg #define HDP_BASE__INST3_SEG2 0 956fb4d8502Sjsg #define HDP_BASE__INST3_SEG3 0 957fb4d8502Sjsg #define HDP_BASE__INST3_SEG4 0 958fb4d8502Sjsg 959fb4d8502Sjsg #define HDP_BASE__INST4_SEG0 0 960fb4d8502Sjsg #define HDP_BASE__INST4_SEG1 0 961fb4d8502Sjsg #define HDP_BASE__INST4_SEG2 0 962fb4d8502Sjsg #define HDP_BASE__INST4_SEG3 0 963fb4d8502Sjsg #define HDP_BASE__INST4_SEG4 0 964fb4d8502Sjsg 965fb4d8502Sjsg #define OSSSYS_BASE__INST0_SEG0 0x000010A0 966fb4d8502Sjsg #define OSSSYS_BASE__INST0_SEG1 0 967fb4d8502Sjsg #define OSSSYS_BASE__INST0_SEG2 0 968fb4d8502Sjsg #define OSSSYS_BASE__INST0_SEG3 0 969fb4d8502Sjsg #define OSSSYS_BASE__INST0_SEG4 0 970fb4d8502Sjsg 971fb4d8502Sjsg #define OSSSYS_BASE__INST1_SEG0 0 972fb4d8502Sjsg #define OSSSYS_BASE__INST1_SEG1 0 973fb4d8502Sjsg #define OSSSYS_BASE__INST1_SEG2 0 974fb4d8502Sjsg #define OSSSYS_BASE__INST1_SEG3 0 975fb4d8502Sjsg #define OSSSYS_BASE__INST1_SEG4 0 976fb4d8502Sjsg 977fb4d8502Sjsg #define OSSSYS_BASE__INST2_SEG0 0 978fb4d8502Sjsg #define OSSSYS_BASE__INST2_SEG1 0 979fb4d8502Sjsg #define OSSSYS_BASE__INST2_SEG2 0 980fb4d8502Sjsg #define OSSSYS_BASE__INST2_SEG3 0 981fb4d8502Sjsg #define OSSSYS_BASE__INST2_SEG4 0 982fb4d8502Sjsg 983fb4d8502Sjsg #define OSSSYS_BASE__INST3_SEG0 0 984fb4d8502Sjsg #define OSSSYS_BASE__INST3_SEG1 0 985fb4d8502Sjsg #define OSSSYS_BASE__INST3_SEG2 0 986fb4d8502Sjsg #define OSSSYS_BASE__INST3_SEG3 0 987fb4d8502Sjsg #define OSSSYS_BASE__INST3_SEG4 0 988fb4d8502Sjsg 989fb4d8502Sjsg #define OSSSYS_BASE__INST4_SEG0 0 990fb4d8502Sjsg #define OSSSYS_BASE__INST4_SEG1 0 991fb4d8502Sjsg #define OSSSYS_BASE__INST4_SEG2 0 992fb4d8502Sjsg #define OSSSYS_BASE__INST4_SEG3 0 993fb4d8502Sjsg #define OSSSYS_BASE__INST4_SEG4 0 994fb4d8502Sjsg 995fb4d8502Sjsg #define SDMA0_BASE__INST0_SEG0 0x00001260 996fb4d8502Sjsg #define SDMA0_BASE__INST0_SEG1 0 997fb4d8502Sjsg #define SDMA0_BASE__INST0_SEG2 0 998fb4d8502Sjsg #define SDMA0_BASE__INST0_SEG3 0 999fb4d8502Sjsg #define SDMA0_BASE__INST0_SEG4 0 1000fb4d8502Sjsg 1001fb4d8502Sjsg #define SDMA0_BASE__INST1_SEG0 0 1002fb4d8502Sjsg #define SDMA0_BASE__INST1_SEG1 0 1003fb4d8502Sjsg #define SDMA0_BASE__INST1_SEG2 0 1004fb4d8502Sjsg #define SDMA0_BASE__INST1_SEG3 0 1005fb4d8502Sjsg #define SDMA0_BASE__INST1_SEG4 0 1006fb4d8502Sjsg 1007fb4d8502Sjsg #define SDMA0_BASE__INST2_SEG0 0 1008fb4d8502Sjsg #define SDMA0_BASE__INST2_SEG1 0 1009fb4d8502Sjsg #define SDMA0_BASE__INST2_SEG2 0 1010fb4d8502Sjsg #define SDMA0_BASE__INST2_SEG3 0 1011fb4d8502Sjsg #define SDMA0_BASE__INST2_SEG4 0 1012fb4d8502Sjsg 1013fb4d8502Sjsg #define SDMA0_BASE__INST3_SEG0 0 1014fb4d8502Sjsg #define SDMA0_BASE__INST3_SEG1 0 1015fb4d8502Sjsg #define SDMA0_BASE__INST3_SEG2 0 1016fb4d8502Sjsg #define SDMA0_BASE__INST3_SEG3 0 1017fb4d8502Sjsg #define SDMA0_BASE__INST3_SEG4 0 1018fb4d8502Sjsg 1019fb4d8502Sjsg #define SDMA0_BASE__INST4_SEG0 0 1020fb4d8502Sjsg #define SDMA0_BASE__INST4_SEG1 0 1021fb4d8502Sjsg #define SDMA0_BASE__INST4_SEG2 0 1022fb4d8502Sjsg #define SDMA0_BASE__INST4_SEG3 0 1023fb4d8502Sjsg #define SDMA0_BASE__INST4_SEG4 0 1024fb4d8502Sjsg 1025fb4d8502Sjsg #define SDMA1_BASE__INST0_SEG0 0x00001460 1026fb4d8502Sjsg #define SDMA1_BASE__INST0_SEG1 0 1027fb4d8502Sjsg #define SDMA1_BASE__INST0_SEG2 0 1028fb4d8502Sjsg #define SDMA1_BASE__INST0_SEG3 0 1029fb4d8502Sjsg #define SDMA1_BASE__INST0_SEG4 0 1030fb4d8502Sjsg 1031fb4d8502Sjsg #define SDMA1_BASE__INST1_SEG0 0 1032fb4d8502Sjsg #define SDMA1_BASE__INST1_SEG1 0 1033fb4d8502Sjsg #define SDMA1_BASE__INST1_SEG2 0 1034fb4d8502Sjsg #define SDMA1_BASE__INST1_SEG3 0 1035fb4d8502Sjsg #define SDMA1_BASE__INST1_SEG4 0 1036fb4d8502Sjsg 1037fb4d8502Sjsg #define SDMA1_BASE__INST2_SEG0 0 1038fb4d8502Sjsg #define SDMA1_BASE__INST2_SEG1 0 1039fb4d8502Sjsg #define SDMA1_BASE__INST2_SEG2 0 1040fb4d8502Sjsg #define SDMA1_BASE__INST2_SEG3 0 1041fb4d8502Sjsg #define SDMA1_BASE__INST2_SEG4 0 1042fb4d8502Sjsg 1043fb4d8502Sjsg #define SDMA1_BASE__INST3_SEG0 0 1044fb4d8502Sjsg #define SDMA1_BASE__INST3_SEG1 0 1045fb4d8502Sjsg #define SDMA1_BASE__INST3_SEG2 0 1046fb4d8502Sjsg #define SDMA1_BASE__INST3_SEG3 0 1047fb4d8502Sjsg #define SDMA1_BASE__INST3_SEG4 0 1048fb4d8502Sjsg 1049fb4d8502Sjsg #define SDMA1_BASE__INST4_SEG0 0 1050fb4d8502Sjsg #define SDMA1_BASE__INST4_SEG1 0 1051fb4d8502Sjsg #define SDMA1_BASE__INST4_SEG2 0 1052fb4d8502Sjsg #define SDMA1_BASE__INST4_SEG3 0 1053fb4d8502Sjsg #define SDMA1_BASE__INST4_SEG4 0 1054fb4d8502Sjsg 1055fb4d8502Sjsg #define XDMA_BASE__INST0_SEG0 0x00003400 1056fb4d8502Sjsg #define XDMA_BASE__INST0_SEG1 0 1057fb4d8502Sjsg #define XDMA_BASE__INST0_SEG2 0 1058fb4d8502Sjsg #define XDMA_BASE__INST0_SEG3 0 1059fb4d8502Sjsg #define XDMA_BASE__INST0_SEG4 0 1060fb4d8502Sjsg 1061fb4d8502Sjsg #define XDMA_BASE__INST1_SEG0 0 1062fb4d8502Sjsg #define XDMA_BASE__INST1_SEG1 0 1063fb4d8502Sjsg #define XDMA_BASE__INST1_SEG2 0 1064fb4d8502Sjsg #define XDMA_BASE__INST1_SEG3 0 1065fb4d8502Sjsg #define XDMA_BASE__INST1_SEG4 0 1066fb4d8502Sjsg 1067fb4d8502Sjsg #define XDMA_BASE__INST2_SEG0 0 1068fb4d8502Sjsg #define XDMA_BASE__INST2_SEG1 0 1069fb4d8502Sjsg #define XDMA_BASE__INST2_SEG2 0 1070fb4d8502Sjsg #define XDMA_BASE__INST2_SEG3 0 1071fb4d8502Sjsg #define XDMA_BASE__INST2_SEG4 0 1072fb4d8502Sjsg 1073fb4d8502Sjsg #define XDMA_BASE__INST3_SEG0 0 1074fb4d8502Sjsg #define XDMA_BASE__INST3_SEG1 0 1075fb4d8502Sjsg #define XDMA_BASE__INST3_SEG2 0 1076fb4d8502Sjsg #define XDMA_BASE__INST3_SEG3 0 1077fb4d8502Sjsg #define XDMA_BASE__INST3_SEG4 0 1078fb4d8502Sjsg 1079fb4d8502Sjsg #define XDMA_BASE__INST4_SEG0 0 1080fb4d8502Sjsg #define XDMA_BASE__INST4_SEG1 0 1081fb4d8502Sjsg #define XDMA_BASE__INST4_SEG2 0 1082fb4d8502Sjsg #define XDMA_BASE__INST4_SEG3 0 1083fb4d8502Sjsg #define XDMA_BASE__INST4_SEG4 0 1084fb4d8502Sjsg 1085fb4d8502Sjsg #define UMC_BASE__INST0_SEG0 0x00014000 1086fb4d8502Sjsg #define UMC_BASE__INST0_SEG1 0 1087fb4d8502Sjsg #define UMC_BASE__INST0_SEG2 0 1088fb4d8502Sjsg #define UMC_BASE__INST0_SEG3 0 1089fb4d8502Sjsg #define UMC_BASE__INST0_SEG4 0 1090fb4d8502Sjsg 1091fb4d8502Sjsg #define UMC_BASE__INST1_SEG0 0 1092fb4d8502Sjsg #define UMC_BASE__INST1_SEG1 0 1093fb4d8502Sjsg #define UMC_BASE__INST1_SEG2 0 1094fb4d8502Sjsg #define UMC_BASE__INST1_SEG3 0 1095fb4d8502Sjsg #define UMC_BASE__INST1_SEG4 0 1096fb4d8502Sjsg 1097fb4d8502Sjsg #define UMC_BASE__INST2_SEG0 0 1098fb4d8502Sjsg #define UMC_BASE__INST2_SEG1 0 1099fb4d8502Sjsg #define UMC_BASE__INST2_SEG2 0 1100fb4d8502Sjsg #define UMC_BASE__INST2_SEG3 0 1101fb4d8502Sjsg #define UMC_BASE__INST2_SEG4 0 1102fb4d8502Sjsg 1103fb4d8502Sjsg #define UMC_BASE__INST3_SEG0 0 1104fb4d8502Sjsg #define UMC_BASE__INST3_SEG1 0 1105fb4d8502Sjsg #define UMC_BASE__INST3_SEG2 0 1106fb4d8502Sjsg #define UMC_BASE__INST3_SEG3 0 1107fb4d8502Sjsg #define UMC_BASE__INST3_SEG4 0 1108fb4d8502Sjsg 1109fb4d8502Sjsg #define UMC_BASE__INST4_SEG0 0 1110fb4d8502Sjsg #define UMC_BASE__INST4_SEG1 0 1111fb4d8502Sjsg #define UMC_BASE__INST4_SEG2 0 1112fb4d8502Sjsg #define UMC_BASE__INST4_SEG3 0 1113fb4d8502Sjsg #define UMC_BASE__INST4_SEG4 0 1114fb4d8502Sjsg 1115fb4d8502Sjsg #define THM_BASE__INST0_SEG0 0x00016600 1116fb4d8502Sjsg #define THM_BASE__INST0_SEG1 0 1117fb4d8502Sjsg #define THM_BASE__INST0_SEG2 0 1118fb4d8502Sjsg #define THM_BASE__INST0_SEG3 0 1119fb4d8502Sjsg #define THM_BASE__INST0_SEG4 0 1120fb4d8502Sjsg 1121fb4d8502Sjsg #define THM_BASE__INST1_SEG0 0 1122fb4d8502Sjsg #define THM_BASE__INST1_SEG1 0 1123fb4d8502Sjsg #define THM_BASE__INST1_SEG2 0 1124fb4d8502Sjsg #define THM_BASE__INST1_SEG3 0 1125fb4d8502Sjsg #define THM_BASE__INST1_SEG4 0 1126fb4d8502Sjsg 1127fb4d8502Sjsg #define THM_BASE__INST2_SEG0 0 1128fb4d8502Sjsg #define THM_BASE__INST2_SEG1 0 1129fb4d8502Sjsg #define THM_BASE__INST2_SEG2 0 1130fb4d8502Sjsg #define THM_BASE__INST2_SEG3 0 1131fb4d8502Sjsg #define THM_BASE__INST2_SEG4 0 1132fb4d8502Sjsg 1133fb4d8502Sjsg #define THM_BASE__INST3_SEG0 0 1134fb4d8502Sjsg #define THM_BASE__INST3_SEG1 0 1135fb4d8502Sjsg #define THM_BASE__INST3_SEG2 0 1136fb4d8502Sjsg #define THM_BASE__INST3_SEG3 0 1137fb4d8502Sjsg #define THM_BASE__INST3_SEG4 0 1138fb4d8502Sjsg 1139fb4d8502Sjsg #define THM_BASE__INST4_SEG0 0 1140fb4d8502Sjsg #define THM_BASE__INST4_SEG1 0 1141fb4d8502Sjsg #define THM_BASE__INST4_SEG2 0 1142fb4d8502Sjsg #define THM_BASE__INST4_SEG3 0 1143fb4d8502Sjsg #define THM_BASE__INST4_SEG4 0 1144fb4d8502Sjsg 1145fb4d8502Sjsg #define SMUIO_BASE__INST0_SEG0 0x00016800 1146fb4d8502Sjsg #define SMUIO_BASE__INST0_SEG1 0 1147fb4d8502Sjsg #define SMUIO_BASE__INST0_SEG2 0 1148fb4d8502Sjsg #define SMUIO_BASE__INST0_SEG3 0 1149fb4d8502Sjsg #define SMUIO_BASE__INST0_SEG4 0 1150fb4d8502Sjsg 1151fb4d8502Sjsg #define SMUIO_BASE__INST1_SEG0 0 1152fb4d8502Sjsg #define SMUIO_BASE__INST1_SEG1 0 1153fb4d8502Sjsg #define SMUIO_BASE__INST1_SEG2 0 1154fb4d8502Sjsg #define SMUIO_BASE__INST1_SEG3 0 1155fb4d8502Sjsg #define SMUIO_BASE__INST1_SEG4 0 1156fb4d8502Sjsg 1157fb4d8502Sjsg #define SMUIO_BASE__INST2_SEG0 0 1158fb4d8502Sjsg #define SMUIO_BASE__INST2_SEG1 0 1159fb4d8502Sjsg #define SMUIO_BASE__INST2_SEG2 0 1160fb4d8502Sjsg #define SMUIO_BASE__INST2_SEG3 0 1161fb4d8502Sjsg #define SMUIO_BASE__INST2_SEG4 0 1162fb4d8502Sjsg 1163fb4d8502Sjsg #define SMUIO_BASE__INST3_SEG0 0 1164fb4d8502Sjsg #define SMUIO_BASE__INST3_SEG1 0 1165fb4d8502Sjsg #define SMUIO_BASE__INST3_SEG2 0 1166fb4d8502Sjsg #define SMUIO_BASE__INST3_SEG3 0 1167fb4d8502Sjsg #define SMUIO_BASE__INST3_SEG4 0 1168fb4d8502Sjsg 1169fb4d8502Sjsg #define SMUIO_BASE__INST4_SEG0 0 1170fb4d8502Sjsg #define SMUIO_BASE__INST4_SEG1 0 1171fb4d8502Sjsg #define SMUIO_BASE__INST4_SEG2 0 1172fb4d8502Sjsg #define SMUIO_BASE__INST4_SEG3 0 1173fb4d8502Sjsg #define SMUIO_BASE__INST4_SEG4 0 1174fb4d8502Sjsg 1175fb4d8502Sjsg #define PWR_BASE__INST0_SEG0 0x00016A00 1176fb4d8502Sjsg #define PWR_BASE__INST0_SEG1 0 1177fb4d8502Sjsg #define PWR_BASE__INST0_SEG2 0 1178fb4d8502Sjsg #define PWR_BASE__INST0_SEG3 0 1179fb4d8502Sjsg #define PWR_BASE__INST0_SEG4 0 1180fb4d8502Sjsg 1181fb4d8502Sjsg #define PWR_BASE__INST1_SEG0 0 1182fb4d8502Sjsg #define PWR_BASE__INST1_SEG1 0 1183fb4d8502Sjsg #define PWR_BASE__INST1_SEG2 0 1184fb4d8502Sjsg #define PWR_BASE__INST1_SEG3 0 1185fb4d8502Sjsg #define PWR_BASE__INST1_SEG4 0 1186fb4d8502Sjsg 1187fb4d8502Sjsg #define PWR_BASE__INST2_SEG0 0 1188fb4d8502Sjsg #define PWR_BASE__INST2_SEG1 0 1189fb4d8502Sjsg #define PWR_BASE__INST2_SEG2 0 1190fb4d8502Sjsg #define PWR_BASE__INST2_SEG3 0 1191fb4d8502Sjsg #define PWR_BASE__INST2_SEG4 0 1192fb4d8502Sjsg 1193fb4d8502Sjsg #define PWR_BASE__INST3_SEG0 0 1194fb4d8502Sjsg #define PWR_BASE__INST3_SEG1 0 1195fb4d8502Sjsg #define PWR_BASE__INST3_SEG2 0 1196fb4d8502Sjsg #define PWR_BASE__INST3_SEG3 0 1197fb4d8502Sjsg #define PWR_BASE__INST3_SEG4 0 1198fb4d8502Sjsg 1199fb4d8502Sjsg #define PWR_BASE__INST4_SEG0 0 1200fb4d8502Sjsg #define PWR_BASE__INST4_SEG1 0 1201fb4d8502Sjsg #define PWR_BASE__INST4_SEG2 0 1202fb4d8502Sjsg #define PWR_BASE__INST4_SEG3 0 1203fb4d8502Sjsg #define PWR_BASE__INST4_SEG4 0 1204fb4d8502Sjsg 1205fb4d8502Sjsg #define CLK_BASE__INST0_SEG0 0x00016C00 1206fb4d8502Sjsg #define CLK_BASE__INST0_SEG1 0 1207fb4d8502Sjsg #define CLK_BASE__INST0_SEG2 0 1208fb4d8502Sjsg #define CLK_BASE__INST0_SEG3 0 1209fb4d8502Sjsg #define CLK_BASE__INST0_SEG4 0 1210fb4d8502Sjsg 1211fb4d8502Sjsg #define CLK_BASE__INST1_SEG0 0x00016E00 1212fb4d8502Sjsg #define CLK_BASE__INST1_SEG1 0 1213fb4d8502Sjsg #define CLK_BASE__INST1_SEG2 0 1214fb4d8502Sjsg #define CLK_BASE__INST1_SEG3 0 1215fb4d8502Sjsg #define CLK_BASE__INST1_SEG4 0 1216fb4d8502Sjsg 1217fb4d8502Sjsg #define CLK_BASE__INST2_SEG0 0x00017000 1218fb4d8502Sjsg #define CLK_BASE__INST2_SEG1 0 1219fb4d8502Sjsg #define CLK_BASE__INST2_SEG2 0 1220fb4d8502Sjsg #define CLK_BASE__INST2_SEG3 0 1221fb4d8502Sjsg #define CLK_BASE__INST2_SEG4 0 1222fb4d8502Sjsg 1223fb4d8502Sjsg #define CLK_BASE__INST3_SEG0 0x00017200 1224fb4d8502Sjsg #define CLK_BASE__INST3_SEG1 0 1225fb4d8502Sjsg #define CLK_BASE__INST3_SEG2 0 1226fb4d8502Sjsg #define CLK_BASE__INST3_SEG3 0 1227fb4d8502Sjsg #define CLK_BASE__INST3_SEG4 0 1228fb4d8502Sjsg 1229fb4d8502Sjsg #define CLK_BASE__INST4_SEG0 0x00017E00 1230fb4d8502Sjsg #define CLK_BASE__INST4_SEG1 0 1231fb4d8502Sjsg #define CLK_BASE__INST4_SEG2 0 1232fb4d8502Sjsg #define CLK_BASE__INST4_SEG3 0 1233fb4d8502Sjsg #define CLK_BASE__INST4_SEG4 0 1234fb4d8502Sjsg 1235fb4d8502Sjsg #define FUSE_BASE__INST0_SEG0 0x00017400 1236fb4d8502Sjsg #define FUSE_BASE__INST0_SEG1 0 1237fb4d8502Sjsg #define FUSE_BASE__INST0_SEG2 0 1238fb4d8502Sjsg #define FUSE_BASE__INST0_SEG3 0 1239fb4d8502Sjsg #define FUSE_BASE__INST0_SEG4 0 1240fb4d8502Sjsg 1241fb4d8502Sjsg #define FUSE_BASE__INST1_SEG0 0 1242fb4d8502Sjsg #define FUSE_BASE__INST1_SEG1 0 1243fb4d8502Sjsg #define FUSE_BASE__INST1_SEG2 0 1244fb4d8502Sjsg #define FUSE_BASE__INST1_SEG3 0 1245fb4d8502Sjsg #define FUSE_BASE__INST1_SEG4 0 1246fb4d8502Sjsg 1247fb4d8502Sjsg #define FUSE_BASE__INST2_SEG0 0 1248fb4d8502Sjsg #define FUSE_BASE__INST2_SEG1 0 1249fb4d8502Sjsg #define FUSE_BASE__INST2_SEG2 0 1250fb4d8502Sjsg #define FUSE_BASE__INST2_SEG3 0 1251fb4d8502Sjsg #define FUSE_BASE__INST2_SEG4 0 1252fb4d8502Sjsg 1253fb4d8502Sjsg #define FUSE_BASE__INST3_SEG0 0 1254fb4d8502Sjsg #define FUSE_BASE__INST3_SEG1 0 1255fb4d8502Sjsg #define FUSE_BASE__INST3_SEG2 0 1256fb4d8502Sjsg #define FUSE_BASE__INST3_SEG3 0 1257fb4d8502Sjsg #define FUSE_BASE__INST3_SEG4 0 1258fb4d8502Sjsg 1259fb4d8502Sjsg #define FUSE_BASE__INST4_SEG0 0 1260fb4d8502Sjsg #define FUSE_BASE__INST4_SEG1 0 1261fb4d8502Sjsg #define FUSE_BASE__INST4_SEG2 0 1262fb4d8502Sjsg #define FUSE_BASE__INST4_SEG3 0 1263fb4d8502Sjsg #define FUSE_BASE__INST4_SEG4 0 1264fb4d8502Sjsg #endif 1265fb4d8502Sjsg 1266