1*5ca02815Sjsg /* 2*5ca02815Sjsg * Copyright 2019 Advanced Micro Devices, Inc. 3*5ca02815Sjsg * 4*5ca02815Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5*5ca02815Sjsg * copy of this software and associated documentation files (the "Software"), 6*5ca02815Sjsg * to deal in the Software without restriction, including without limitation 7*5ca02815Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*5ca02815Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9*5ca02815Sjsg * Software is furnished to do so, subject to the following conditions: 10*5ca02815Sjsg * 11*5ca02815Sjsg * The above copyright notice and this permission notice shall be included in 12*5ca02815Sjsg * all copies or substantial portions of the Software. 13*5ca02815Sjsg * 14*5ca02815Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*5ca02815Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*5ca02815Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*5ca02815Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*5ca02815Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*5ca02815Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*5ca02815Sjsg * OTHER DEALINGS IN THE SOFTWARE. 21*5ca02815Sjsg * 22*5ca02815Sjsg */ 23*5ca02815Sjsg 24*5ca02815Sjsg #ifndef __VANGOGH_IP_OFFSET_H__ 25*5ca02815Sjsg #define __VANGOGH_IP_OFFSET_H__ 26*5ca02815Sjsg 27*5ca02815Sjsg #define MAX_INSTANCE 8 28*5ca02815Sjsg #define MAX_SEGMENT 6 29*5ca02815Sjsg 30*5ca02815Sjsg 31*5ca02815Sjsg struct IP_BASE_INSTANCE 32*5ca02815Sjsg { 33*5ca02815Sjsg unsigned int segment[MAX_SEGMENT]; 34*5ca02815Sjsg }; 35*5ca02815Sjsg 36*5ca02815Sjsg struct IP_BASE 37*5ca02815Sjsg { 38*5ca02815Sjsg struct IP_BASE_INSTANCE instance[MAX_INSTANCE]; 39*5ca02815Sjsg } __maybe_unused; 40*5ca02815Sjsg 41*5ca02815Sjsg 42*5ca02815Sjsg static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } }, 43*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 44*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 45*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 46*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 47*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 48*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 49*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 50*5ca02815Sjsg static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } }, 51*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 52*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 53*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 54*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 55*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 56*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 57*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 58*5ca02815Sjsg static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, 59*5ca02815Sjsg { { 0x00016E00, 0x02401C00, 0, 0, 0, 0 } }, 60*5ca02815Sjsg { { 0x00017000, 0x02402000, 0, 0, 0, 0 } }, 61*5ca02815Sjsg { { 0x00017200, 0x02402400, 0, 0, 0, 0 } }, 62*5ca02815Sjsg { { 0x0001B000, 0x0242D800, 0, 0, 0, 0 } }, 63*5ca02815Sjsg { { 0x0001B200, 0x0242DC00, 0, 0, 0, 0 } }, 64*5ca02815Sjsg { { 0x0001B400, 0x0242E000, 0, 0, 0, 0 } }, 65*5ca02815Sjsg { { 0x00017E00, 0x0240BC00, 0, 0, 0, 0 } } } }; 66*5ca02815Sjsg static const struct IP_BASE DF_BASE = { { { { 0x00007000, 0x0240B800, 0, 0, 0, 0 } }, 67*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 68*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 69*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 70*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 71*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 72*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 73*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 74*5ca02815Sjsg static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, 75*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 76*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 77*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 78*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 79*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 80*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 81*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 82*5ca02815Sjsg static const struct IP_BASE DPCS_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, 83*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 84*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 85*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 86*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 87*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 88*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 89*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 90*5ca02815Sjsg static const struct IP_BASE FCH_BASE = { { { { 0x0240C000, 0x00B40000, 0x11000000, 0, 0, 0 } }, 91*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 92*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 93*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 94*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 95*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 96*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 97*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 98*5ca02815Sjsg static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } }, 99*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 100*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 101*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 102*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 103*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 104*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 105*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 106*5ca02815Sjsg static const struct IP_BASE GC_BASE = { { { { 0x00001260, 0x0000A000, 0x02402C00, 0, 0, 0 } }, 107*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 108*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 109*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 110*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 111*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 112*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 113*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 114*5ca02815Sjsg static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } }, 115*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 116*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 117*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 118*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 119*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 120*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 121*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 122*5ca02815Sjsg static const struct IP_BASE ISP_BASE = { { { { 0x00018000, 0x0240B000, 0, 0, 0, 0 } }, 123*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 124*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 125*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 126*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 127*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 128*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 129*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 130*5ca02815Sjsg static const struct IP_BASE MMHUB_BASE = { { { { 0x00013200, 0x0001A000, 0x02408800, 0, 0, 0 } }, 131*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 132*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 133*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 134*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 135*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 136*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 137*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 138*5ca02815Sjsg static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } }, 139*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 140*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 141*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 142*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 143*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 144*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 145*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 146*5ca02815Sjsg static const struct IP_BASE MP1_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } }, 147*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 148*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 149*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 150*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 151*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 152*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 153*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 154*5ca02815Sjsg static const struct IP_BASE MP2_BASE = { { { { 0x00016400, 0x02400800, 0x00F40000, 0x00F80000, 0x00FC0000, 0 } }, 155*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 156*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 157*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 158*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 159*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 160*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 161*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 162*5ca02815Sjsg static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } }, 163*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 164*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 165*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 166*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 167*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 168*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 169*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 170*5ca02815Sjsg static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0, 0 } }, 171*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 172*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 173*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 174*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 175*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 176*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 177*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 178*5ca02815Sjsg static const struct IP_BASE PCIE0_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } }, 179*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 180*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 181*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 182*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 183*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 184*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 185*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 186*5ca02815Sjsg static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0x00016A00, 0x02401000, 0x00440000, 0, 0 } }, 187*5ca02815Sjsg { { 0x0001BC00, 0x0242D400, 0, 0, 0, 0 } }, 188*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 189*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 190*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 191*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 192*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 193*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 194*5ca02815Sjsg static const struct IP_BASE THM_BASE = { { { { 0x00016600, 0x02400C00, 0, 0, 0, 0 } }, 195*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 196*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 197*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 198*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 199*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 200*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 201*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 202*5ca02815Sjsg static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0, 0 } }, 203*5ca02815Sjsg { { 0x00054000, 0x02425C00, 0, 0, 0, 0 } }, 204*5ca02815Sjsg { { 0x00094000, 0x02426000, 0, 0, 0, 0 } }, 205*5ca02815Sjsg { { 0x000D4000, 0x02426400, 0, 0, 0, 0 } }, 206*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 207*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 208*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 209*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 210*5ca02815Sjsg static const struct IP_BASE USB_BASE = { { { { 0x0242A800, 0x05B00000, 0, 0, 0, 0 } }, 211*5ca02815Sjsg { { 0x0242AC00, 0x05B80000, 0, 0, 0, 0 } }, 212*5ca02815Sjsg { { 0x0242B000, 0x05C00000, 0, 0, 0, 0 } }, 213*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 214*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 215*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 216*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 217*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 218*5ca02815Sjsg static const struct IP_BASE VCN_BASE = { { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0, 0 } }, 219*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 220*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 221*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 222*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 223*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 224*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 225*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 226*5ca02815Sjsg 227*5ca02815Sjsg 228*5ca02815Sjsg #define ACP_BASE__INST0_SEG0 0x02403800 229*5ca02815Sjsg #define ACP_BASE__INST0_SEG1 0x00480000 230*5ca02815Sjsg #define ACP_BASE__INST0_SEG2 0 231*5ca02815Sjsg #define ACP_BASE__INST0_SEG3 0 232*5ca02815Sjsg #define ACP_BASE__INST0_SEG4 0 233*5ca02815Sjsg #define ACP_BASE__INST0_SEG5 0 234*5ca02815Sjsg 235*5ca02815Sjsg #define ACP_BASE__INST1_SEG0 0 236*5ca02815Sjsg #define ACP_BASE__INST1_SEG1 0 237*5ca02815Sjsg #define ACP_BASE__INST1_SEG2 0 238*5ca02815Sjsg #define ACP_BASE__INST1_SEG3 0 239*5ca02815Sjsg #define ACP_BASE__INST1_SEG4 0 240*5ca02815Sjsg #define ACP_BASE__INST1_SEG5 0 241*5ca02815Sjsg 242*5ca02815Sjsg #define ACP_BASE__INST2_SEG0 0 243*5ca02815Sjsg #define ACP_BASE__INST2_SEG1 0 244*5ca02815Sjsg #define ACP_BASE__INST2_SEG2 0 245*5ca02815Sjsg #define ACP_BASE__INST2_SEG3 0 246*5ca02815Sjsg #define ACP_BASE__INST2_SEG4 0 247*5ca02815Sjsg #define ACP_BASE__INST2_SEG5 0 248*5ca02815Sjsg 249*5ca02815Sjsg #define ACP_BASE__INST3_SEG0 0 250*5ca02815Sjsg #define ACP_BASE__INST3_SEG1 0 251*5ca02815Sjsg #define ACP_BASE__INST3_SEG2 0 252*5ca02815Sjsg #define ACP_BASE__INST3_SEG3 0 253*5ca02815Sjsg #define ACP_BASE__INST3_SEG4 0 254*5ca02815Sjsg #define ACP_BASE__INST3_SEG5 0 255*5ca02815Sjsg 256*5ca02815Sjsg #define ACP_BASE__INST4_SEG0 0 257*5ca02815Sjsg #define ACP_BASE__INST4_SEG1 0 258*5ca02815Sjsg #define ACP_BASE__INST4_SEG2 0 259*5ca02815Sjsg #define ACP_BASE__INST4_SEG3 0 260*5ca02815Sjsg #define ACP_BASE__INST4_SEG4 0 261*5ca02815Sjsg #define ACP_BASE__INST4_SEG5 0 262*5ca02815Sjsg 263*5ca02815Sjsg #define ACP_BASE__INST5_SEG0 0 264*5ca02815Sjsg #define ACP_BASE__INST5_SEG1 0 265*5ca02815Sjsg #define ACP_BASE__INST5_SEG2 0 266*5ca02815Sjsg #define ACP_BASE__INST5_SEG3 0 267*5ca02815Sjsg #define ACP_BASE__INST5_SEG4 0 268*5ca02815Sjsg #define ACP_BASE__INST5_SEG5 0 269*5ca02815Sjsg 270*5ca02815Sjsg #define ACP_BASE__INST6_SEG0 0 271*5ca02815Sjsg #define ACP_BASE__INST6_SEG1 0 272*5ca02815Sjsg #define ACP_BASE__INST6_SEG2 0 273*5ca02815Sjsg #define ACP_BASE__INST6_SEG3 0 274*5ca02815Sjsg #define ACP_BASE__INST6_SEG4 0 275*5ca02815Sjsg #define ACP_BASE__INST6_SEG5 0 276*5ca02815Sjsg 277*5ca02815Sjsg #define ACP_BASE__INST7_SEG0 0 278*5ca02815Sjsg #define ACP_BASE__INST7_SEG1 0 279*5ca02815Sjsg #define ACP_BASE__INST7_SEG2 0 280*5ca02815Sjsg #define ACP_BASE__INST7_SEG3 0 281*5ca02815Sjsg #define ACP_BASE__INST7_SEG4 0 282*5ca02815Sjsg #define ACP_BASE__INST7_SEG5 0 283*5ca02815Sjsg 284*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG0 0x00000C00 285*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG1 0x00013300 286*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG2 0x02408C00 287*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG3 0 288*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG4 0 289*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG5 0 290*5ca02815Sjsg 291*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG0 0 292*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG1 0 293*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG2 0 294*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG3 0 295*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG4 0 296*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG5 0 297*5ca02815Sjsg 298*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG0 0 299*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG1 0 300*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG2 0 301*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG3 0 302*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG4 0 303*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG5 0 304*5ca02815Sjsg 305*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG0 0 306*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG1 0 307*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG2 0 308*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG3 0 309*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG4 0 310*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG5 0 311*5ca02815Sjsg 312*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG0 0 313*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG1 0 314*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG2 0 315*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG3 0 316*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG4 0 317*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG5 0 318*5ca02815Sjsg 319*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG0 0 320*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG1 0 321*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG2 0 322*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG3 0 323*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG4 0 324*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG5 0 325*5ca02815Sjsg 326*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG0 0 327*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG1 0 328*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG2 0 329*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG3 0 330*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG4 0 331*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG5 0 332*5ca02815Sjsg 333*5ca02815Sjsg #define ATHUB_BASE__INST7_SEG0 0 334*5ca02815Sjsg #define ATHUB_BASE__INST7_SEG1 0 335*5ca02815Sjsg #define ATHUB_BASE__INST7_SEG2 0 336*5ca02815Sjsg #define ATHUB_BASE__INST7_SEG3 0 337*5ca02815Sjsg #define ATHUB_BASE__INST7_SEG4 0 338*5ca02815Sjsg #define ATHUB_BASE__INST7_SEG5 0 339*5ca02815Sjsg 340*5ca02815Sjsg #define CLK_BASE__INST0_SEG0 0x00016C00 341*5ca02815Sjsg #define CLK_BASE__INST0_SEG1 0x02401800 342*5ca02815Sjsg #define CLK_BASE__INST0_SEG2 0 343*5ca02815Sjsg #define CLK_BASE__INST0_SEG3 0 344*5ca02815Sjsg #define CLK_BASE__INST0_SEG4 0 345*5ca02815Sjsg #define CLK_BASE__INST0_SEG5 0 346*5ca02815Sjsg 347*5ca02815Sjsg #define CLK_BASE__INST1_SEG0 0x00016E00 348*5ca02815Sjsg #define CLK_BASE__INST1_SEG1 0x02401C00 349*5ca02815Sjsg #define CLK_BASE__INST1_SEG2 0 350*5ca02815Sjsg #define CLK_BASE__INST1_SEG3 0 351*5ca02815Sjsg #define CLK_BASE__INST1_SEG4 0 352*5ca02815Sjsg #define CLK_BASE__INST1_SEG5 0 353*5ca02815Sjsg 354*5ca02815Sjsg #define CLK_BASE__INST2_SEG0 0x00017000 355*5ca02815Sjsg #define CLK_BASE__INST2_SEG1 0x02402000 356*5ca02815Sjsg #define CLK_BASE__INST2_SEG2 0 357*5ca02815Sjsg #define CLK_BASE__INST2_SEG3 0 358*5ca02815Sjsg #define CLK_BASE__INST2_SEG4 0 359*5ca02815Sjsg #define CLK_BASE__INST2_SEG5 0 360*5ca02815Sjsg 361*5ca02815Sjsg #define CLK_BASE__INST3_SEG0 0x00017200 362*5ca02815Sjsg #define CLK_BASE__INST3_SEG1 0x02402400 363*5ca02815Sjsg #define CLK_BASE__INST3_SEG2 0 364*5ca02815Sjsg #define CLK_BASE__INST3_SEG3 0 365*5ca02815Sjsg #define CLK_BASE__INST3_SEG4 0 366*5ca02815Sjsg #define CLK_BASE__INST3_SEG5 0 367*5ca02815Sjsg 368*5ca02815Sjsg #define CLK_BASE__INST4_SEG0 0x0001B000 369*5ca02815Sjsg #define CLK_BASE__INST4_SEG1 0x0242D800 370*5ca02815Sjsg #define CLK_BASE__INST4_SEG2 0 371*5ca02815Sjsg #define CLK_BASE__INST4_SEG3 0 372*5ca02815Sjsg #define CLK_BASE__INST4_SEG4 0 373*5ca02815Sjsg #define CLK_BASE__INST4_SEG5 0 374*5ca02815Sjsg 375*5ca02815Sjsg #define CLK_BASE__INST5_SEG0 0x0001B200 376*5ca02815Sjsg #define CLK_BASE__INST5_SEG1 0x0242DC00 377*5ca02815Sjsg #define CLK_BASE__INST5_SEG2 0 378*5ca02815Sjsg #define CLK_BASE__INST5_SEG3 0 379*5ca02815Sjsg #define CLK_BASE__INST5_SEG4 0 380*5ca02815Sjsg #define CLK_BASE__INST5_SEG5 0 381*5ca02815Sjsg 382*5ca02815Sjsg #define CLK_BASE__INST6_SEG0 0x0001B400 383*5ca02815Sjsg #define CLK_BASE__INST6_SEG1 0x0242E000 384*5ca02815Sjsg #define CLK_BASE__INST6_SEG2 0 385*5ca02815Sjsg #define CLK_BASE__INST6_SEG3 0 386*5ca02815Sjsg #define CLK_BASE__INST6_SEG4 0 387*5ca02815Sjsg #define CLK_BASE__INST6_SEG5 0 388*5ca02815Sjsg 389*5ca02815Sjsg #define CLK_BASE__INST7_SEG0 0x00017E00 390*5ca02815Sjsg #define CLK_BASE__INST7_SEG1 0x0240BC00 391*5ca02815Sjsg #define CLK_BASE__INST7_SEG2 0 392*5ca02815Sjsg #define CLK_BASE__INST7_SEG3 0 393*5ca02815Sjsg #define CLK_BASE__INST7_SEG4 0 394*5ca02815Sjsg #define CLK_BASE__INST7_SEG5 0 395*5ca02815Sjsg 396*5ca02815Sjsg #define DF_BASE__INST0_SEG0 0x00007000 397*5ca02815Sjsg #define DF_BASE__INST0_SEG1 0x0240B800 398*5ca02815Sjsg #define DF_BASE__INST0_SEG2 0 399*5ca02815Sjsg #define DF_BASE__INST0_SEG3 0 400*5ca02815Sjsg #define DF_BASE__INST0_SEG4 0 401*5ca02815Sjsg #define DF_BASE__INST0_SEG5 0 402*5ca02815Sjsg 403*5ca02815Sjsg #define DF_BASE__INST1_SEG0 0 404*5ca02815Sjsg #define DF_BASE__INST1_SEG1 0 405*5ca02815Sjsg #define DF_BASE__INST1_SEG2 0 406*5ca02815Sjsg #define DF_BASE__INST1_SEG3 0 407*5ca02815Sjsg #define DF_BASE__INST1_SEG4 0 408*5ca02815Sjsg #define DF_BASE__INST1_SEG5 0 409*5ca02815Sjsg 410*5ca02815Sjsg #define DF_BASE__INST2_SEG0 0 411*5ca02815Sjsg #define DF_BASE__INST2_SEG1 0 412*5ca02815Sjsg #define DF_BASE__INST2_SEG2 0 413*5ca02815Sjsg #define DF_BASE__INST2_SEG3 0 414*5ca02815Sjsg #define DF_BASE__INST2_SEG4 0 415*5ca02815Sjsg #define DF_BASE__INST2_SEG5 0 416*5ca02815Sjsg 417*5ca02815Sjsg #define DF_BASE__INST3_SEG0 0 418*5ca02815Sjsg #define DF_BASE__INST3_SEG1 0 419*5ca02815Sjsg #define DF_BASE__INST3_SEG2 0 420*5ca02815Sjsg #define DF_BASE__INST3_SEG3 0 421*5ca02815Sjsg #define DF_BASE__INST3_SEG4 0 422*5ca02815Sjsg #define DF_BASE__INST3_SEG5 0 423*5ca02815Sjsg 424*5ca02815Sjsg #define DF_BASE__INST4_SEG0 0 425*5ca02815Sjsg #define DF_BASE__INST4_SEG1 0 426*5ca02815Sjsg #define DF_BASE__INST4_SEG2 0 427*5ca02815Sjsg #define DF_BASE__INST4_SEG3 0 428*5ca02815Sjsg #define DF_BASE__INST4_SEG4 0 429*5ca02815Sjsg #define DF_BASE__INST4_SEG5 0 430*5ca02815Sjsg 431*5ca02815Sjsg #define DF_BASE__INST5_SEG0 0 432*5ca02815Sjsg #define DF_BASE__INST5_SEG1 0 433*5ca02815Sjsg #define DF_BASE__INST5_SEG2 0 434*5ca02815Sjsg #define DF_BASE__INST5_SEG3 0 435*5ca02815Sjsg #define DF_BASE__INST5_SEG4 0 436*5ca02815Sjsg #define DF_BASE__INST5_SEG5 0 437*5ca02815Sjsg 438*5ca02815Sjsg #define DF_BASE__INST6_SEG0 0 439*5ca02815Sjsg #define DF_BASE__INST6_SEG1 0 440*5ca02815Sjsg #define DF_BASE__INST6_SEG2 0 441*5ca02815Sjsg #define DF_BASE__INST6_SEG3 0 442*5ca02815Sjsg #define DF_BASE__INST6_SEG4 0 443*5ca02815Sjsg #define DF_BASE__INST6_SEG5 0 444*5ca02815Sjsg 445*5ca02815Sjsg #define DF_BASE__INST7_SEG0 0 446*5ca02815Sjsg #define DF_BASE__INST7_SEG1 0 447*5ca02815Sjsg #define DF_BASE__INST7_SEG2 0 448*5ca02815Sjsg #define DF_BASE__INST7_SEG3 0 449*5ca02815Sjsg #define DF_BASE__INST7_SEG4 0 450*5ca02815Sjsg #define DF_BASE__INST7_SEG5 0 451*5ca02815Sjsg 452*5ca02815Sjsg #define DCN_BASE__INST0_SEG0 0x00000012 453*5ca02815Sjsg #define DCN_BASE__INST0_SEG1 0x000000C0 454*5ca02815Sjsg #define DCN_BASE__INST0_SEG2 0x000034C0 455*5ca02815Sjsg #define DCN_BASE__INST0_SEG3 0x00009000 456*5ca02815Sjsg #define DCN_BASE__INST0_SEG4 0x02403C00 457*5ca02815Sjsg #define DCN_BASE__INST0_SEG5 0 458*5ca02815Sjsg 459*5ca02815Sjsg #define DCN_BASE__INST1_SEG0 0 460*5ca02815Sjsg #define DCN_BASE__INST1_SEG1 0 461*5ca02815Sjsg #define DCN_BASE__INST1_SEG2 0 462*5ca02815Sjsg #define DCN_BASE__INST1_SEG3 0 463*5ca02815Sjsg #define DCN_BASE__INST1_SEG4 0 464*5ca02815Sjsg #define DCN_BASE__INST1_SEG5 0 465*5ca02815Sjsg 466*5ca02815Sjsg #define DCN_BASE__INST2_SEG0 0 467*5ca02815Sjsg #define DCN_BASE__INST2_SEG1 0 468*5ca02815Sjsg #define DCN_BASE__INST2_SEG2 0 469*5ca02815Sjsg #define DCN_BASE__INST2_SEG3 0 470*5ca02815Sjsg #define DCN_BASE__INST2_SEG4 0 471*5ca02815Sjsg #define DCN_BASE__INST2_SEG5 0 472*5ca02815Sjsg 473*5ca02815Sjsg #define DCN_BASE__INST3_SEG0 0 474*5ca02815Sjsg #define DCN_BASE__INST3_SEG1 0 475*5ca02815Sjsg #define DCN_BASE__INST3_SEG2 0 476*5ca02815Sjsg #define DCN_BASE__INST3_SEG3 0 477*5ca02815Sjsg #define DCN_BASE__INST3_SEG4 0 478*5ca02815Sjsg #define DCN_BASE__INST3_SEG5 0 479*5ca02815Sjsg 480*5ca02815Sjsg #define DCN_BASE__INST4_SEG0 0 481*5ca02815Sjsg #define DCN_BASE__INST4_SEG1 0 482*5ca02815Sjsg #define DCN_BASE__INST4_SEG2 0 483*5ca02815Sjsg #define DCN_BASE__INST4_SEG3 0 484*5ca02815Sjsg #define DCN_BASE__INST4_SEG4 0 485*5ca02815Sjsg #define DCN_BASE__INST4_SEG5 0 486*5ca02815Sjsg 487*5ca02815Sjsg #define DCN_BASE__INST5_SEG0 0 488*5ca02815Sjsg #define DCN_BASE__INST5_SEG1 0 489*5ca02815Sjsg #define DCN_BASE__INST5_SEG2 0 490*5ca02815Sjsg #define DCN_BASE__INST5_SEG3 0 491*5ca02815Sjsg #define DCN_BASE__INST5_SEG4 0 492*5ca02815Sjsg #define DCN_BASE__INST5_SEG5 0 493*5ca02815Sjsg 494*5ca02815Sjsg #define DCN_BASE__INST6_SEG0 0 495*5ca02815Sjsg #define DCN_BASE__INST6_SEG1 0 496*5ca02815Sjsg #define DCN_BASE__INST6_SEG2 0 497*5ca02815Sjsg #define DCN_BASE__INST6_SEG3 0 498*5ca02815Sjsg #define DCN_BASE__INST6_SEG4 0 499*5ca02815Sjsg #define DCN_BASE__INST6_SEG5 0 500*5ca02815Sjsg 501*5ca02815Sjsg #define DCN_BASE__INST7_SEG0 0 502*5ca02815Sjsg #define DCN_BASE__INST7_SEG1 0 503*5ca02815Sjsg #define DCN_BASE__INST7_SEG2 0 504*5ca02815Sjsg #define DCN_BASE__INST7_SEG3 0 505*5ca02815Sjsg #define DCN_BASE__INST7_SEG4 0 506*5ca02815Sjsg #define DCN_BASE__INST7_SEG5 0 507*5ca02815Sjsg 508*5ca02815Sjsg #define DPCS_BASE__INST0_SEG0 0x00000012 509*5ca02815Sjsg #define DPCS_BASE__INST0_SEG1 0x000000C0 510*5ca02815Sjsg #define DPCS_BASE__INST0_SEG2 0x000034C0 511*5ca02815Sjsg #define DPCS_BASE__INST0_SEG3 0x00009000 512*5ca02815Sjsg #define DPCS_BASE__INST0_SEG4 0x02403C00 513*5ca02815Sjsg #define DPCS_BASE__INST0_SEG5 0 514*5ca02815Sjsg 515*5ca02815Sjsg #define DPCS_BASE__INST1_SEG0 0 516*5ca02815Sjsg #define DPCS_BASE__INST1_SEG1 0 517*5ca02815Sjsg #define DPCS_BASE__INST1_SEG2 0 518*5ca02815Sjsg #define DPCS_BASE__INST1_SEG3 0 519*5ca02815Sjsg #define DPCS_BASE__INST1_SEG4 0 520*5ca02815Sjsg #define DPCS_BASE__INST1_SEG5 0 521*5ca02815Sjsg 522*5ca02815Sjsg #define DPCS_BASE__INST2_SEG0 0 523*5ca02815Sjsg #define DPCS_BASE__INST2_SEG1 0 524*5ca02815Sjsg #define DPCS_BASE__INST2_SEG2 0 525*5ca02815Sjsg #define DPCS_BASE__INST2_SEG3 0 526*5ca02815Sjsg #define DPCS_BASE__INST2_SEG4 0 527*5ca02815Sjsg #define DPCS_BASE__INST2_SEG5 0 528*5ca02815Sjsg 529*5ca02815Sjsg #define DPCS_BASE__INST3_SEG0 0 530*5ca02815Sjsg #define DPCS_BASE__INST3_SEG1 0 531*5ca02815Sjsg #define DPCS_BASE__INST3_SEG2 0 532*5ca02815Sjsg #define DPCS_BASE__INST3_SEG3 0 533*5ca02815Sjsg #define DPCS_BASE__INST3_SEG4 0 534*5ca02815Sjsg #define DPCS_BASE__INST3_SEG5 0 535*5ca02815Sjsg 536*5ca02815Sjsg #define DPCS_BASE__INST4_SEG0 0 537*5ca02815Sjsg #define DPCS_BASE__INST4_SEG1 0 538*5ca02815Sjsg #define DPCS_BASE__INST4_SEG2 0 539*5ca02815Sjsg #define DPCS_BASE__INST4_SEG3 0 540*5ca02815Sjsg #define DPCS_BASE__INST4_SEG4 0 541*5ca02815Sjsg #define DPCS_BASE__INST4_SEG5 0 542*5ca02815Sjsg 543*5ca02815Sjsg #define DPCS_BASE__INST5_SEG0 0 544*5ca02815Sjsg #define DPCS_BASE__INST5_SEG1 0 545*5ca02815Sjsg #define DPCS_BASE__INST5_SEG2 0 546*5ca02815Sjsg #define DPCS_BASE__INST5_SEG3 0 547*5ca02815Sjsg #define DPCS_BASE__INST5_SEG4 0 548*5ca02815Sjsg #define DPCS_BASE__INST5_SEG5 0 549*5ca02815Sjsg 550*5ca02815Sjsg #define DPCS_BASE__INST6_SEG0 0 551*5ca02815Sjsg #define DPCS_BASE__INST6_SEG1 0 552*5ca02815Sjsg #define DPCS_BASE__INST6_SEG2 0 553*5ca02815Sjsg #define DPCS_BASE__INST6_SEG3 0 554*5ca02815Sjsg #define DPCS_BASE__INST6_SEG4 0 555*5ca02815Sjsg #define DPCS_BASE__INST6_SEG5 0 556*5ca02815Sjsg 557*5ca02815Sjsg #define DPCS_BASE__INST7_SEG0 0 558*5ca02815Sjsg #define DPCS_BASE__INST7_SEG1 0 559*5ca02815Sjsg #define DPCS_BASE__INST7_SEG2 0 560*5ca02815Sjsg #define DPCS_BASE__INST7_SEG3 0 561*5ca02815Sjsg #define DPCS_BASE__INST7_SEG4 0 562*5ca02815Sjsg #define DPCS_BASE__INST7_SEG5 0 563*5ca02815Sjsg 564*5ca02815Sjsg #define FCH_BASE__INST0_SEG0 0x0240C000 565*5ca02815Sjsg #define FCH_BASE__INST0_SEG1 0x00B40000 566*5ca02815Sjsg #define FCH_BASE__INST0_SEG2 0x11000000 567*5ca02815Sjsg #define FCH_BASE__INST0_SEG3 0 568*5ca02815Sjsg #define FCH_BASE__INST0_SEG4 0 569*5ca02815Sjsg #define FCH_BASE__INST0_SEG5 0 570*5ca02815Sjsg 571*5ca02815Sjsg #define FCH_BASE__INST1_SEG0 0 572*5ca02815Sjsg #define FCH_BASE__INST1_SEG1 0 573*5ca02815Sjsg #define FCH_BASE__INST1_SEG2 0 574*5ca02815Sjsg #define FCH_BASE__INST1_SEG3 0 575*5ca02815Sjsg #define FCH_BASE__INST1_SEG4 0 576*5ca02815Sjsg #define FCH_BASE__INST1_SEG5 0 577*5ca02815Sjsg 578*5ca02815Sjsg #define FCH_BASE__INST2_SEG0 0 579*5ca02815Sjsg #define FCH_BASE__INST2_SEG1 0 580*5ca02815Sjsg #define FCH_BASE__INST2_SEG2 0 581*5ca02815Sjsg #define FCH_BASE__INST2_SEG3 0 582*5ca02815Sjsg #define FCH_BASE__INST2_SEG4 0 583*5ca02815Sjsg #define FCH_BASE__INST2_SEG5 0 584*5ca02815Sjsg 585*5ca02815Sjsg #define FCH_BASE__INST3_SEG0 0 586*5ca02815Sjsg #define FCH_BASE__INST3_SEG1 0 587*5ca02815Sjsg #define FCH_BASE__INST3_SEG2 0 588*5ca02815Sjsg #define FCH_BASE__INST3_SEG3 0 589*5ca02815Sjsg #define FCH_BASE__INST3_SEG4 0 590*5ca02815Sjsg #define FCH_BASE__INST3_SEG5 0 591*5ca02815Sjsg 592*5ca02815Sjsg #define FCH_BASE__INST4_SEG0 0 593*5ca02815Sjsg #define FCH_BASE__INST4_SEG1 0 594*5ca02815Sjsg #define FCH_BASE__INST4_SEG2 0 595*5ca02815Sjsg #define FCH_BASE__INST4_SEG3 0 596*5ca02815Sjsg #define FCH_BASE__INST4_SEG4 0 597*5ca02815Sjsg #define FCH_BASE__INST4_SEG5 0 598*5ca02815Sjsg 599*5ca02815Sjsg #define FCH_BASE__INST5_SEG0 0 600*5ca02815Sjsg #define FCH_BASE__INST5_SEG1 0 601*5ca02815Sjsg #define FCH_BASE__INST5_SEG2 0 602*5ca02815Sjsg #define FCH_BASE__INST5_SEG3 0 603*5ca02815Sjsg #define FCH_BASE__INST5_SEG4 0 604*5ca02815Sjsg #define FCH_BASE__INST5_SEG5 0 605*5ca02815Sjsg 606*5ca02815Sjsg #define FCH_BASE__INST6_SEG0 0 607*5ca02815Sjsg #define FCH_BASE__INST6_SEG1 0 608*5ca02815Sjsg #define FCH_BASE__INST6_SEG2 0 609*5ca02815Sjsg #define FCH_BASE__INST6_SEG3 0 610*5ca02815Sjsg #define FCH_BASE__INST6_SEG4 0 611*5ca02815Sjsg #define FCH_BASE__INST6_SEG5 0 612*5ca02815Sjsg 613*5ca02815Sjsg #define FCH_BASE__INST7_SEG0 0 614*5ca02815Sjsg #define FCH_BASE__INST7_SEG1 0 615*5ca02815Sjsg #define FCH_BASE__INST7_SEG2 0 616*5ca02815Sjsg #define FCH_BASE__INST7_SEG3 0 617*5ca02815Sjsg #define FCH_BASE__INST7_SEG4 0 618*5ca02815Sjsg #define FCH_BASE__INST7_SEG5 0 619*5ca02815Sjsg 620*5ca02815Sjsg #define FUSE_BASE__INST0_SEG0 0x00017400 621*5ca02815Sjsg #define FUSE_BASE__INST0_SEG1 0x02401400 622*5ca02815Sjsg #define FUSE_BASE__INST0_SEG2 0 623*5ca02815Sjsg #define FUSE_BASE__INST0_SEG3 0 624*5ca02815Sjsg #define FUSE_BASE__INST0_SEG4 0 625*5ca02815Sjsg #define FUSE_BASE__INST0_SEG5 0 626*5ca02815Sjsg 627*5ca02815Sjsg #define FUSE_BASE__INST1_SEG0 0 628*5ca02815Sjsg #define FUSE_BASE__INST1_SEG1 0 629*5ca02815Sjsg #define FUSE_BASE__INST1_SEG2 0 630*5ca02815Sjsg #define FUSE_BASE__INST1_SEG3 0 631*5ca02815Sjsg #define FUSE_BASE__INST1_SEG4 0 632*5ca02815Sjsg #define FUSE_BASE__INST1_SEG5 0 633*5ca02815Sjsg 634*5ca02815Sjsg #define FUSE_BASE__INST2_SEG0 0 635*5ca02815Sjsg #define FUSE_BASE__INST2_SEG1 0 636*5ca02815Sjsg #define FUSE_BASE__INST2_SEG2 0 637*5ca02815Sjsg #define FUSE_BASE__INST2_SEG3 0 638*5ca02815Sjsg #define FUSE_BASE__INST2_SEG4 0 639*5ca02815Sjsg #define FUSE_BASE__INST2_SEG5 0 640*5ca02815Sjsg 641*5ca02815Sjsg #define FUSE_BASE__INST3_SEG0 0 642*5ca02815Sjsg #define FUSE_BASE__INST3_SEG1 0 643*5ca02815Sjsg #define FUSE_BASE__INST3_SEG2 0 644*5ca02815Sjsg #define FUSE_BASE__INST3_SEG3 0 645*5ca02815Sjsg #define FUSE_BASE__INST3_SEG4 0 646*5ca02815Sjsg #define FUSE_BASE__INST3_SEG5 0 647*5ca02815Sjsg 648*5ca02815Sjsg #define FUSE_BASE__INST4_SEG0 0 649*5ca02815Sjsg #define FUSE_BASE__INST4_SEG1 0 650*5ca02815Sjsg #define FUSE_BASE__INST4_SEG2 0 651*5ca02815Sjsg #define FUSE_BASE__INST4_SEG3 0 652*5ca02815Sjsg #define FUSE_BASE__INST4_SEG4 0 653*5ca02815Sjsg #define FUSE_BASE__INST4_SEG5 0 654*5ca02815Sjsg 655*5ca02815Sjsg #define FUSE_BASE__INST5_SEG0 0 656*5ca02815Sjsg #define FUSE_BASE__INST5_SEG1 0 657*5ca02815Sjsg #define FUSE_BASE__INST5_SEG2 0 658*5ca02815Sjsg #define FUSE_BASE__INST5_SEG3 0 659*5ca02815Sjsg #define FUSE_BASE__INST5_SEG4 0 660*5ca02815Sjsg #define FUSE_BASE__INST5_SEG5 0 661*5ca02815Sjsg 662*5ca02815Sjsg #define FUSE_BASE__INST6_SEG0 0 663*5ca02815Sjsg #define FUSE_BASE__INST6_SEG1 0 664*5ca02815Sjsg #define FUSE_BASE__INST6_SEG2 0 665*5ca02815Sjsg #define FUSE_BASE__INST6_SEG3 0 666*5ca02815Sjsg #define FUSE_BASE__INST6_SEG4 0 667*5ca02815Sjsg #define FUSE_BASE__INST6_SEG5 0 668*5ca02815Sjsg 669*5ca02815Sjsg #define FUSE_BASE__INST7_SEG0 0 670*5ca02815Sjsg #define FUSE_BASE__INST7_SEG1 0 671*5ca02815Sjsg #define FUSE_BASE__INST7_SEG2 0 672*5ca02815Sjsg #define FUSE_BASE__INST7_SEG3 0 673*5ca02815Sjsg #define FUSE_BASE__INST7_SEG4 0 674*5ca02815Sjsg #define FUSE_BASE__INST7_SEG5 0 675*5ca02815Sjsg 676*5ca02815Sjsg #define GC_BASE__INST0_SEG0 0x00001260 677*5ca02815Sjsg #define GC_BASE__INST0_SEG1 0x0000A000 678*5ca02815Sjsg #define GC_BASE__INST0_SEG2 0x02402C00 679*5ca02815Sjsg #define GC_BASE__INST0_SEG3 0 680*5ca02815Sjsg #define GC_BASE__INST0_SEG4 0 681*5ca02815Sjsg #define GC_BASE__INST0_SEG5 0 682*5ca02815Sjsg 683*5ca02815Sjsg #define GC_BASE__INST1_SEG0 0 684*5ca02815Sjsg #define GC_BASE__INST1_SEG1 0 685*5ca02815Sjsg #define GC_BASE__INST1_SEG2 0 686*5ca02815Sjsg #define GC_BASE__INST1_SEG3 0 687*5ca02815Sjsg #define GC_BASE__INST1_SEG4 0 688*5ca02815Sjsg #define GC_BASE__INST1_SEG5 0 689*5ca02815Sjsg 690*5ca02815Sjsg #define GC_BASE__INST2_SEG0 0 691*5ca02815Sjsg #define GC_BASE__INST2_SEG1 0 692*5ca02815Sjsg #define GC_BASE__INST2_SEG2 0 693*5ca02815Sjsg #define GC_BASE__INST2_SEG3 0 694*5ca02815Sjsg #define GC_BASE__INST2_SEG4 0 695*5ca02815Sjsg #define GC_BASE__INST2_SEG5 0 696*5ca02815Sjsg 697*5ca02815Sjsg #define GC_BASE__INST3_SEG0 0 698*5ca02815Sjsg #define GC_BASE__INST3_SEG1 0 699*5ca02815Sjsg #define GC_BASE__INST3_SEG2 0 700*5ca02815Sjsg #define GC_BASE__INST3_SEG3 0 701*5ca02815Sjsg #define GC_BASE__INST3_SEG4 0 702*5ca02815Sjsg #define GC_BASE__INST3_SEG5 0 703*5ca02815Sjsg 704*5ca02815Sjsg #define GC_BASE__INST4_SEG0 0 705*5ca02815Sjsg #define GC_BASE__INST4_SEG1 0 706*5ca02815Sjsg #define GC_BASE__INST4_SEG2 0 707*5ca02815Sjsg #define GC_BASE__INST4_SEG3 0 708*5ca02815Sjsg #define GC_BASE__INST4_SEG4 0 709*5ca02815Sjsg #define GC_BASE__INST4_SEG5 0 710*5ca02815Sjsg 711*5ca02815Sjsg #define GC_BASE__INST5_SEG0 0 712*5ca02815Sjsg #define GC_BASE__INST5_SEG1 0 713*5ca02815Sjsg #define GC_BASE__INST5_SEG2 0 714*5ca02815Sjsg #define GC_BASE__INST5_SEG3 0 715*5ca02815Sjsg #define GC_BASE__INST5_SEG4 0 716*5ca02815Sjsg #define GC_BASE__INST5_SEG5 0 717*5ca02815Sjsg 718*5ca02815Sjsg #define GC_BASE__INST6_SEG0 0 719*5ca02815Sjsg #define GC_BASE__INST6_SEG1 0 720*5ca02815Sjsg #define GC_BASE__INST6_SEG2 0 721*5ca02815Sjsg #define GC_BASE__INST6_SEG3 0 722*5ca02815Sjsg #define GC_BASE__INST6_SEG4 0 723*5ca02815Sjsg #define GC_BASE__INST6_SEG5 0 724*5ca02815Sjsg 725*5ca02815Sjsg #define GC_BASE__INST7_SEG0 0 726*5ca02815Sjsg #define GC_BASE__INST7_SEG1 0 727*5ca02815Sjsg #define GC_BASE__INST7_SEG2 0 728*5ca02815Sjsg #define GC_BASE__INST7_SEG3 0 729*5ca02815Sjsg #define GC_BASE__INST7_SEG4 0 730*5ca02815Sjsg #define GC_BASE__INST7_SEG5 0 731*5ca02815Sjsg 732*5ca02815Sjsg #define HDP_BASE__INST0_SEG0 0x00000F20 733*5ca02815Sjsg #define HDP_BASE__INST0_SEG1 0x0240A400 734*5ca02815Sjsg #define HDP_BASE__INST0_SEG2 0 735*5ca02815Sjsg #define HDP_BASE__INST0_SEG3 0 736*5ca02815Sjsg #define HDP_BASE__INST0_SEG4 0 737*5ca02815Sjsg #define HDP_BASE__INST0_SEG5 0 738*5ca02815Sjsg 739*5ca02815Sjsg #define HDP_BASE__INST1_SEG0 0 740*5ca02815Sjsg #define HDP_BASE__INST1_SEG1 0 741*5ca02815Sjsg #define HDP_BASE__INST1_SEG2 0 742*5ca02815Sjsg #define HDP_BASE__INST1_SEG3 0 743*5ca02815Sjsg #define HDP_BASE__INST1_SEG4 0 744*5ca02815Sjsg #define HDP_BASE__INST1_SEG5 0 745*5ca02815Sjsg 746*5ca02815Sjsg #define HDP_BASE__INST2_SEG0 0 747*5ca02815Sjsg #define HDP_BASE__INST2_SEG1 0 748*5ca02815Sjsg #define HDP_BASE__INST2_SEG2 0 749*5ca02815Sjsg #define HDP_BASE__INST2_SEG3 0 750*5ca02815Sjsg #define HDP_BASE__INST2_SEG4 0 751*5ca02815Sjsg #define HDP_BASE__INST2_SEG5 0 752*5ca02815Sjsg 753*5ca02815Sjsg #define HDP_BASE__INST3_SEG0 0 754*5ca02815Sjsg #define HDP_BASE__INST3_SEG1 0 755*5ca02815Sjsg #define HDP_BASE__INST3_SEG2 0 756*5ca02815Sjsg #define HDP_BASE__INST3_SEG3 0 757*5ca02815Sjsg #define HDP_BASE__INST3_SEG4 0 758*5ca02815Sjsg #define HDP_BASE__INST3_SEG5 0 759*5ca02815Sjsg 760*5ca02815Sjsg #define HDP_BASE__INST4_SEG0 0 761*5ca02815Sjsg #define HDP_BASE__INST4_SEG1 0 762*5ca02815Sjsg #define HDP_BASE__INST4_SEG2 0 763*5ca02815Sjsg #define HDP_BASE__INST4_SEG3 0 764*5ca02815Sjsg #define HDP_BASE__INST4_SEG4 0 765*5ca02815Sjsg #define HDP_BASE__INST4_SEG5 0 766*5ca02815Sjsg 767*5ca02815Sjsg #define HDP_BASE__INST5_SEG0 0 768*5ca02815Sjsg #define HDP_BASE__INST5_SEG1 0 769*5ca02815Sjsg #define HDP_BASE__INST5_SEG2 0 770*5ca02815Sjsg #define HDP_BASE__INST5_SEG3 0 771*5ca02815Sjsg #define HDP_BASE__INST5_SEG4 0 772*5ca02815Sjsg #define HDP_BASE__INST5_SEG5 0 773*5ca02815Sjsg 774*5ca02815Sjsg #define HDP_BASE__INST6_SEG0 0 775*5ca02815Sjsg #define HDP_BASE__INST6_SEG1 0 776*5ca02815Sjsg #define HDP_BASE__INST6_SEG2 0 777*5ca02815Sjsg #define HDP_BASE__INST6_SEG3 0 778*5ca02815Sjsg #define HDP_BASE__INST6_SEG4 0 779*5ca02815Sjsg #define HDP_BASE__INST6_SEG5 0 780*5ca02815Sjsg 781*5ca02815Sjsg #define HDP_BASE__INST7_SEG0 0 782*5ca02815Sjsg #define HDP_BASE__INST7_SEG1 0 783*5ca02815Sjsg #define HDP_BASE__INST7_SEG2 0 784*5ca02815Sjsg #define HDP_BASE__INST7_SEG3 0 785*5ca02815Sjsg #define HDP_BASE__INST7_SEG4 0 786*5ca02815Sjsg #define HDP_BASE__INST7_SEG5 0 787*5ca02815Sjsg 788*5ca02815Sjsg #define ISP_BASE__INST0_SEG0 0x00018000 789*5ca02815Sjsg #define ISP_BASE__INST0_SEG1 0x0240B000 790*5ca02815Sjsg #define ISP_BASE__INST0_SEG2 0 791*5ca02815Sjsg #define ISP_BASE__INST0_SEG3 0 792*5ca02815Sjsg #define ISP_BASE__INST0_SEG4 0 793*5ca02815Sjsg #define ISP_BASE__INST0_SEG5 0 794*5ca02815Sjsg 795*5ca02815Sjsg #define ISP_BASE__INST1_SEG0 0 796*5ca02815Sjsg #define ISP_BASE__INST1_SEG1 0 797*5ca02815Sjsg #define ISP_BASE__INST1_SEG2 0 798*5ca02815Sjsg #define ISP_BASE__INST1_SEG3 0 799*5ca02815Sjsg #define ISP_BASE__INST1_SEG4 0 800*5ca02815Sjsg #define ISP_BASE__INST1_SEG5 0 801*5ca02815Sjsg 802*5ca02815Sjsg #define ISP_BASE__INST2_SEG0 0 803*5ca02815Sjsg #define ISP_BASE__INST2_SEG1 0 804*5ca02815Sjsg #define ISP_BASE__INST2_SEG2 0 805*5ca02815Sjsg #define ISP_BASE__INST2_SEG3 0 806*5ca02815Sjsg #define ISP_BASE__INST2_SEG4 0 807*5ca02815Sjsg #define ISP_BASE__INST2_SEG5 0 808*5ca02815Sjsg 809*5ca02815Sjsg #define ISP_BASE__INST3_SEG0 0 810*5ca02815Sjsg #define ISP_BASE__INST3_SEG1 0 811*5ca02815Sjsg #define ISP_BASE__INST3_SEG2 0 812*5ca02815Sjsg #define ISP_BASE__INST3_SEG3 0 813*5ca02815Sjsg #define ISP_BASE__INST3_SEG4 0 814*5ca02815Sjsg #define ISP_BASE__INST3_SEG5 0 815*5ca02815Sjsg 816*5ca02815Sjsg #define ISP_BASE__INST4_SEG0 0 817*5ca02815Sjsg #define ISP_BASE__INST4_SEG1 0 818*5ca02815Sjsg #define ISP_BASE__INST4_SEG2 0 819*5ca02815Sjsg #define ISP_BASE__INST4_SEG3 0 820*5ca02815Sjsg #define ISP_BASE__INST4_SEG4 0 821*5ca02815Sjsg #define ISP_BASE__INST4_SEG5 0 822*5ca02815Sjsg 823*5ca02815Sjsg #define ISP_BASE__INST5_SEG0 0 824*5ca02815Sjsg #define ISP_BASE__INST5_SEG1 0 825*5ca02815Sjsg #define ISP_BASE__INST5_SEG2 0 826*5ca02815Sjsg #define ISP_BASE__INST5_SEG3 0 827*5ca02815Sjsg #define ISP_BASE__INST5_SEG4 0 828*5ca02815Sjsg #define ISP_BASE__INST5_SEG5 0 829*5ca02815Sjsg 830*5ca02815Sjsg #define ISP_BASE__INST6_SEG0 0 831*5ca02815Sjsg #define ISP_BASE__INST6_SEG1 0 832*5ca02815Sjsg #define ISP_BASE__INST6_SEG2 0 833*5ca02815Sjsg #define ISP_BASE__INST6_SEG3 0 834*5ca02815Sjsg #define ISP_BASE__INST6_SEG4 0 835*5ca02815Sjsg #define ISP_BASE__INST6_SEG5 0 836*5ca02815Sjsg 837*5ca02815Sjsg #define ISP_BASE__INST7_SEG0 0 838*5ca02815Sjsg #define ISP_BASE__INST7_SEG1 0 839*5ca02815Sjsg #define ISP_BASE__INST7_SEG2 0 840*5ca02815Sjsg #define ISP_BASE__INST7_SEG3 0 841*5ca02815Sjsg #define ISP_BASE__INST7_SEG4 0 842*5ca02815Sjsg #define ISP_BASE__INST7_SEG5 0 843*5ca02815Sjsg 844*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG0 0x00013200 845*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG1 0x0001A000 846*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG2 0x02408800 847*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG3 0 848*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG4 0 849*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG5 0 850*5ca02815Sjsg 851*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG0 0 852*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG1 0 853*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG2 0 854*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG3 0 855*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG4 0 856*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG5 0 857*5ca02815Sjsg 858*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG0 0 859*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG1 0 860*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG2 0 861*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG3 0 862*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG4 0 863*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG5 0 864*5ca02815Sjsg 865*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG0 0 866*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG1 0 867*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG2 0 868*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG3 0 869*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG4 0 870*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG5 0 871*5ca02815Sjsg 872*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG0 0 873*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG1 0 874*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG2 0 875*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG3 0 876*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG4 0 877*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG5 0 878*5ca02815Sjsg 879*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG0 0 880*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG1 0 881*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG2 0 882*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG3 0 883*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG4 0 884*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG5 0 885*5ca02815Sjsg 886*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG0 0 887*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG1 0 888*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG2 0 889*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG3 0 890*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG4 0 891*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG5 0 892*5ca02815Sjsg 893*5ca02815Sjsg #define MMHUB_BASE__INST7_SEG0 0 894*5ca02815Sjsg #define MMHUB_BASE__INST7_SEG1 0 895*5ca02815Sjsg #define MMHUB_BASE__INST7_SEG2 0 896*5ca02815Sjsg #define MMHUB_BASE__INST7_SEG3 0 897*5ca02815Sjsg #define MMHUB_BASE__INST7_SEG4 0 898*5ca02815Sjsg #define MMHUB_BASE__INST7_SEG5 0 899*5ca02815Sjsg 900*5ca02815Sjsg #define MP0_BASE__INST0_SEG0 0x00016000 901*5ca02815Sjsg #define MP0_BASE__INST0_SEG1 0x0243FC00 902*5ca02815Sjsg #define MP0_BASE__INST0_SEG2 0x00DC0000 903*5ca02815Sjsg #define MP0_BASE__INST0_SEG3 0x00E00000 904*5ca02815Sjsg #define MP0_BASE__INST0_SEG4 0x00E40000 905*5ca02815Sjsg #define MP0_BASE__INST0_SEG5 0 906*5ca02815Sjsg 907*5ca02815Sjsg #define MP0_BASE__INST1_SEG0 0 908*5ca02815Sjsg #define MP0_BASE__INST1_SEG1 0 909*5ca02815Sjsg #define MP0_BASE__INST1_SEG2 0 910*5ca02815Sjsg #define MP0_BASE__INST1_SEG3 0 911*5ca02815Sjsg #define MP0_BASE__INST1_SEG4 0 912*5ca02815Sjsg #define MP0_BASE__INST1_SEG5 0 913*5ca02815Sjsg 914*5ca02815Sjsg #define MP0_BASE__INST2_SEG0 0 915*5ca02815Sjsg #define MP0_BASE__INST2_SEG1 0 916*5ca02815Sjsg #define MP0_BASE__INST2_SEG2 0 917*5ca02815Sjsg #define MP0_BASE__INST2_SEG3 0 918*5ca02815Sjsg #define MP0_BASE__INST2_SEG4 0 919*5ca02815Sjsg #define MP0_BASE__INST2_SEG5 0 920*5ca02815Sjsg 921*5ca02815Sjsg #define MP0_BASE__INST3_SEG0 0 922*5ca02815Sjsg #define MP0_BASE__INST3_SEG1 0 923*5ca02815Sjsg #define MP0_BASE__INST3_SEG2 0 924*5ca02815Sjsg #define MP0_BASE__INST3_SEG3 0 925*5ca02815Sjsg #define MP0_BASE__INST3_SEG4 0 926*5ca02815Sjsg #define MP0_BASE__INST3_SEG5 0 927*5ca02815Sjsg 928*5ca02815Sjsg #define MP0_BASE__INST4_SEG0 0 929*5ca02815Sjsg #define MP0_BASE__INST4_SEG1 0 930*5ca02815Sjsg #define MP0_BASE__INST4_SEG2 0 931*5ca02815Sjsg #define MP0_BASE__INST4_SEG3 0 932*5ca02815Sjsg #define MP0_BASE__INST4_SEG4 0 933*5ca02815Sjsg #define MP0_BASE__INST4_SEG5 0 934*5ca02815Sjsg 935*5ca02815Sjsg #define MP0_BASE__INST5_SEG0 0 936*5ca02815Sjsg #define MP0_BASE__INST5_SEG1 0 937*5ca02815Sjsg #define MP0_BASE__INST5_SEG2 0 938*5ca02815Sjsg #define MP0_BASE__INST5_SEG3 0 939*5ca02815Sjsg #define MP0_BASE__INST5_SEG4 0 940*5ca02815Sjsg #define MP0_BASE__INST5_SEG5 0 941*5ca02815Sjsg 942*5ca02815Sjsg #define MP0_BASE__INST6_SEG0 0 943*5ca02815Sjsg #define MP0_BASE__INST6_SEG1 0 944*5ca02815Sjsg #define MP0_BASE__INST6_SEG2 0 945*5ca02815Sjsg #define MP0_BASE__INST6_SEG3 0 946*5ca02815Sjsg #define MP0_BASE__INST6_SEG4 0 947*5ca02815Sjsg #define MP0_BASE__INST6_SEG5 0 948*5ca02815Sjsg 949*5ca02815Sjsg #define MP0_BASE__INST7_SEG0 0 950*5ca02815Sjsg #define MP0_BASE__INST7_SEG1 0 951*5ca02815Sjsg #define MP0_BASE__INST7_SEG2 0 952*5ca02815Sjsg #define MP0_BASE__INST7_SEG3 0 953*5ca02815Sjsg #define MP0_BASE__INST7_SEG4 0 954*5ca02815Sjsg #define MP0_BASE__INST7_SEG5 0 955*5ca02815Sjsg 956*5ca02815Sjsg #define MP1_BASE__INST0_SEG0 0x00016000 957*5ca02815Sjsg #define MP1_BASE__INST0_SEG1 0x0243FC00 958*5ca02815Sjsg #define MP1_BASE__INST0_SEG2 0x00DC0000 959*5ca02815Sjsg #define MP1_BASE__INST0_SEG3 0x00E00000 960*5ca02815Sjsg #define MP1_BASE__INST0_SEG4 0x00E40000 961*5ca02815Sjsg #define MP1_BASE__INST0_SEG5 0 962*5ca02815Sjsg 963*5ca02815Sjsg #define MP1_BASE__INST1_SEG0 0 964*5ca02815Sjsg #define MP1_BASE__INST1_SEG1 0 965*5ca02815Sjsg #define MP1_BASE__INST1_SEG2 0 966*5ca02815Sjsg #define MP1_BASE__INST1_SEG3 0 967*5ca02815Sjsg #define MP1_BASE__INST1_SEG4 0 968*5ca02815Sjsg #define MP1_BASE__INST1_SEG5 0 969*5ca02815Sjsg 970*5ca02815Sjsg #define MP1_BASE__INST2_SEG0 0 971*5ca02815Sjsg #define MP1_BASE__INST2_SEG1 0 972*5ca02815Sjsg #define MP1_BASE__INST2_SEG2 0 973*5ca02815Sjsg #define MP1_BASE__INST2_SEG3 0 974*5ca02815Sjsg #define MP1_BASE__INST2_SEG4 0 975*5ca02815Sjsg #define MP1_BASE__INST2_SEG5 0 976*5ca02815Sjsg 977*5ca02815Sjsg #define MP1_BASE__INST3_SEG0 0 978*5ca02815Sjsg #define MP1_BASE__INST3_SEG1 0 979*5ca02815Sjsg #define MP1_BASE__INST3_SEG2 0 980*5ca02815Sjsg #define MP1_BASE__INST3_SEG3 0 981*5ca02815Sjsg #define MP1_BASE__INST3_SEG4 0 982*5ca02815Sjsg #define MP1_BASE__INST3_SEG5 0 983*5ca02815Sjsg 984*5ca02815Sjsg #define MP1_BASE__INST4_SEG0 0 985*5ca02815Sjsg #define MP1_BASE__INST4_SEG1 0 986*5ca02815Sjsg #define MP1_BASE__INST4_SEG2 0 987*5ca02815Sjsg #define MP1_BASE__INST4_SEG3 0 988*5ca02815Sjsg #define MP1_BASE__INST4_SEG4 0 989*5ca02815Sjsg #define MP1_BASE__INST4_SEG5 0 990*5ca02815Sjsg 991*5ca02815Sjsg #define MP1_BASE__INST5_SEG0 0 992*5ca02815Sjsg #define MP1_BASE__INST5_SEG1 0 993*5ca02815Sjsg #define MP1_BASE__INST5_SEG2 0 994*5ca02815Sjsg #define MP1_BASE__INST5_SEG3 0 995*5ca02815Sjsg #define MP1_BASE__INST5_SEG4 0 996*5ca02815Sjsg #define MP1_BASE__INST5_SEG5 0 997*5ca02815Sjsg 998*5ca02815Sjsg #define MP1_BASE__INST6_SEG0 0 999*5ca02815Sjsg #define MP1_BASE__INST6_SEG1 0 1000*5ca02815Sjsg #define MP1_BASE__INST6_SEG2 0 1001*5ca02815Sjsg #define MP1_BASE__INST6_SEG3 0 1002*5ca02815Sjsg #define MP1_BASE__INST6_SEG4 0 1003*5ca02815Sjsg #define MP1_BASE__INST6_SEG5 0 1004*5ca02815Sjsg 1005*5ca02815Sjsg #define MP1_BASE__INST7_SEG0 0 1006*5ca02815Sjsg #define MP1_BASE__INST7_SEG1 0 1007*5ca02815Sjsg #define MP1_BASE__INST7_SEG2 0 1008*5ca02815Sjsg #define MP1_BASE__INST7_SEG3 0 1009*5ca02815Sjsg #define MP1_BASE__INST7_SEG4 0 1010*5ca02815Sjsg #define MP1_BASE__INST7_SEG5 0 1011*5ca02815Sjsg 1012*5ca02815Sjsg #define MP2_BASE__INST0_SEG0 0x00016400 1013*5ca02815Sjsg #define MP2_BASE__INST0_SEG1 0x02400800 1014*5ca02815Sjsg #define MP2_BASE__INST0_SEG2 0x00F40000 1015*5ca02815Sjsg #define MP2_BASE__INST0_SEG3 0x00F80000 1016*5ca02815Sjsg #define MP2_BASE__INST0_SEG4 0x00FC0000 1017*5ca02815Sjsg #define MP2_BASE__INST0_SEG5 0 1018*5ca02815Sjsg 1019*5ca02815Sjsg #define MP2_BASE__INST1_SEG0 0 1020*5ca02815Sjsg #define MP2_BASE__INST1_SEG1 0 1021*5ca02815Sjsg #define MP2_BASE__INST1_SEG2 0 1022*5ca02815Sjsg #define MP2_BASE__INST1_SEG3 0 1023*5ca02815Sjsg #define MP2_BASE__INST1_SEG4 0 1024*5ca02815Sjsg #define MP2_BASE__INST1_SEG5 0 1025*5ca02815Sjsg 1026*5ca02815Sjsg #define MP2_BASE__INST2_SEG0 0 1027*5ca02815Sjsg #define MP2_BASE__INST2_SEG1 0 1028*5ca02815Sjsg #define MP2_BASE__INST2_SEG2 0 1029*5ca02815Sjsg #define MP2_BASE__INST2_SEG3 0 1030*5ca02815Sjsg #define MP2_BASE__INST2_SEG4 0 1031*5ca02815Sjsg #define MP2_BASE__INST2_SEG5 0 1032*5ca02815Sjsg 1033*5ca02815Sjsg #define MP2_BASE__INST3_SEG0 0 1034*5ca02815Sjsg #define MP2_BASE__INST3_SEG1 0 1035*5ca02815Sjsg #define MP2_BASE__INST3_SEG2 0 1036*5ca02815Sjsg #define MP2_BASE__INST3_SEG3 0 1037*5ca02815Sjsg #define MP2_BASE__INST3_SEG4 0 1038*5ca02815Sjsg #define MP2_BASE__INST3_SEG5 0 1039*5ca02815Sjsg 1040*5ca02815Sjsg #define MP2_BASE__INST4_SEG0 0 1041*5ca02815Sjsg #define MP2_BASE__INST4_SEG1 0 1042*5ca02815Sjsg #define MP2_BASE__INST4_SEG2 0 1043*5ca02815Sjsg #define MP2_BASE__INST4_SEG3 0 1044*5ca02815Sjsg #define MP2_BASE__INST4_SEG4 0 1045*5ca02815Sjsg #define MP2_BASE__INST4_SEG5 0 1046*5ca02815Sjsg 1047*5ca02815Sjsg #define MP2_BASE__INST5_SEG0 0 1048*5ca02815Sjsg #define MP2_BASE__INST5_SEG1 0 1049*5ca02815Sjsg #define MP2_BASE__INST5_SEG2 0 1050*5ca02815Sjsg #define MP2_BASE__INST5_SEG3 0 1051*5ca02815Sjsg #define MP2_BASE__INST5_SEG4 0 1052*5ca02815Sjsg #define MP2_BASE__INST5_SEG5 0 1053*5ca02815Sjsg 1054*5ca02815Sjsg #define MP2_BASE__INST6_SEG0 0 1055*5ca02815Sjsg #define MP2_BASE__INST6_SEG1 0 1056*5ca02815Sjsg #define MP2_BASE__INST6_SEG2 0 1057*5ca02815Sjsg #define MP2_BASE__INST6_SEG3 0 1058*5ca02815Sjsg #define MP2_BASE__INST6_SEG4 0 1059*5ca02815Sjsg #define MP2_BASE__INST6_SEG5 0 1060*5ca02815Sjsg 1061*5ca02815Sjsg #define MP2_BASE__INST7_SEG0 0 1062*5ca02815Sjsg #define MP2_BASE__INST7_SEG1 0 1063*5ca02815Sjsg #define MP2_BASE__INST7_SEG2 0 1064*5ca02815Sjsg #define MP2_BASE__INST7_SEG3 0 1065*5ca02815Sjsg #define MP2_BASE__INST7_SEG4 0 1066*5ca02815Sjsg #define MP2_BASE__INST7_SEG5 0 1067*5ca02815Sjsg 1068*5ca02815Sjsg #define NBIO_BASE__INST0_SEG0 0x00000000 1069*5ca02815Sjsg #define NBIO_BASE__INST0_SEG1 0x00000014 1070*5ca02815Sjsg #define NBIO_BASE__INST0_SEG2 0x00000D20 1071*5ca02815Sjsg #define NBIO_BASE__INST0_SEG3 0x00010400 1072*5ca02815Sjsg #define NBIO_BASE__INST0_SEG4 0x0241B000 1073*5ca02815Sjsg #define NBIO_BASE__INST0_SEG5 0x04040000 1074*5ca02815Sjsg 1075*5ca02815Sjsg #define NBIO_BASE__INST1_SEG0 0 1076*5ca02815Sjsg #define NBIO_BASE__INST1_SEG1 0 1077*5ca02815Sjsg #define NBIO_BASE__INST1_SEG2 0 1078*5ca02815Sjsg #define NBIO_BASE__INST1_SEG3 0 1079*5ca02815Sjsg #define NBIO_BASE__INST1_SEG4 0 1080*5ca02815Sjsg #define NBIO_BASE__INST1_SEG5 0 1081*5ca02815Sjsg 1082*5ca02815Sjsg #define NBIO_BASE__INST2_SEG0 0 1083*5ca02815Sjsg #define NBIO_BASE__INST2_SEG1 0 1084*5ca02815Sjsg #define NBIO_BASE__INST2_SEG2 0 1085*5ca02815Sjsg #define NBIO_BASE__INST2_SEG3 0 1086*5ca02815Sjsg #define NBIO_BASE__INST2_SEG4 0 1087*5ca02815Sjsg #define NBIO_BASE__INST2_SEG5 0 1088*5ca02815Sjsg 1089*5ca02815Sjsg #define NBIO_BASE__INST3_SEG0 0 1090*5ca02815Sjsg #define NBIO_BASE__INST3_SEG1 0 1091*5ca02815Sjsg #define NBIO_BASE__INST3_SEG2 0 1092*5ca02815Sjsg #define NBIO_BASE__INST3_SEG3 0 1093*5ca02815Sjsg #define NBIO_BASE__INST3_SEG4 0 1094*5ca02815Sjsg #define NBIO_BASE__INST3_SEG5 0 1095*5ca02815Sjsg 1096*5ca02815Sjsg #define NBIO_BASE__INST4_SEG0 0 1097*5ca02815Sjsg #define NBIO_BASE__INST4_SEG1 0 1098*5ca02815Sjsg #define NBIO_BASE__INST4_SEG2 0 1099*5ca02815Sjsg #define NBIO_BASE__INST4_SEG3 0 1100*5ca02815Sjsg #define NBIO_BASE__INST4_SEG4 0 1101*5ca02815Sjsg #define NBIO_BASE__INST4_SEG5 0 1102*5ca02815Sjsg 1103*5ca02815Sjsg #define NBIO_BASE__INST5_SEG0 0 1104*5ca02815Sjsg #define NBIO_BASE__INST5_SEG1 0 1105*5ca02815Sjsg #define NBIO_BASE__INST5_SEG2 0 1106*5ca02815Sjsg #define NBIO_BASE__INST5_SEG3 0 1107*5ca02815Sjsg #define NBIO_BASE__INST5_SEG4 0 1108*5ca02815Sjsg #define NBIO_BASE__INST5_SEG5 0 1109*5ca02815Sjsg 1110*5ca02815Sjsg #define NBIO_BASE__INST6_SEG0 0 1111*5ca02815Sjsg #define NBIO_BASE__INST6_SEG1 0 1112*5ca02815Sjsg #define NBIO_BASE__INST6_SEG2 0 1113*5ca02815Sjsg #define NBIO_BASE__INST6_SEG3 0 1114*5ca02815Sjsg #define NBIO_BASE__INST6_SEG4 0 1115*5ca02815Sjsg #define NBIO_BASE__INST6_SEG5 0 1116*5ca02815Sjsg 1117*5ca02815Sjsg #define NBIO_BASE__INST7_SEG0 0 1118*5ca02815Sjsg #define NBIO_BASE__INST7_SEG1 0 1119*5ca02815Sjsg #define NBIO_BASE__INST7_SEG2 0 1120*5ca02815Sjsg #define NBIO_BASE__INST7_SEG3 0 1121*5ca02815Sjsg #define NBIO_BASE__INST7_SEG4 0 1122*5ca02815Sjsg #define NBIO_BASE__INST7_SEG5 0 1123*5ca02815Sjsg 1124*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG0 0x000010A0 1125*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG1 0x0240A000 1126*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG2 0 1127*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG3 0 1128*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG4 0 1129*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG5 0 1130*5ca02815Sjsg 1131*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG0 0 1132*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG1 0 1133*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG2 0 1134*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG3 0 1135*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG4 0 1136*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG5 0 1137*5ca02815Sjsg 1138*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG0 0 1139*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG1 0 1140*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG2 0 1141*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG3 0 1142*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG4 0 1143*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG5 0 1144*5ca02815Sjsg 1145*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG0 0 1146*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG1 0 1147*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG2 0 1148*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG3 0 1149*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG4 0 1150*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG5 0 1151*5ca02815Sjsg 1152*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG0 0 1153*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG1 0 1154*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG2 0 1155*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG3 0 1156*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG4 0 1157*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG5 0 1158*5ca02815Sjsg 1159*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG0 0 1160*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG1 0 1161*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG2 0 1162*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG3 0 1163*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG4 0 1164*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG5 0 1165*5ca02815Sjsg 1166*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG0 0 1167*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG1 0 1168*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG2 0 1169*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG3 0 1170*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG4 0 1171*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG5 0 1172*5ca02815Sjsg 1173*5ca02815Sjsg #define OSSSYS_BASE__INST7_SEG0 0 1174*5ca02815Sjsg #define OSSSYS_BASE__INST7_SEG1 0 1175*5ca02815Sjsg #define OSSSYS_BASE__INST7_SEG2 0 1176*5ca02815Sjsg #define OSSSYS_BASE__INST7_SEG3 0 1177*5ca02815Sjsg #define OSSSYS_BASE__INST7_SEG4 0 1178*5ca02815Sjsg #define OSSSYS_BASE__INST7_SEG5 0 1179*5ca02815Sjsg 1180*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG0 0x00000000 1181*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG1 0x00000014 1182*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG2 0x00000D20 1183*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG3 0x00010400 1184*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG4 0x0241B000 1185*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG5 0x04040000 1186*5ca02815Sjsg 1187*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG0 0 1188*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG1 0 1189*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG2 0 1190*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG3 0 1191*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG4 0 1192*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG5 0 1193*5ca02815Sjsg 1194*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG0 0 1195*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG1 0 1196*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG2 0 1197*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG3 0 1198*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG4 0 1199*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG5 0 1200*5ca02815Sjsg 1201*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG0 0 1202*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG1 0 1203*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG2 0 1204*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG3 0 1205*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG4 0 1206*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG5 0 1207*5ca02815Sjsg 1208*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG0 0 1209*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG1 0 1210*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG2 0 1211*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG3 0 1212*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG4 0 1213*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG5 0 1214*5ca02815Sjsg 1215*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG0 0 1216*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG1 0 1217*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG2 0 1218*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG3 0 1219*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG4 0 1220*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG5 0 1221*5ca02815Sjsg 1222*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG0 0 1223*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG1 0 1224*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG2 0 1225*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG3 0 1226*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG4 0 1227*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG5 0 1228*5ca02815Sjsg 1229*5ca02815Sjsg #define PCIE0_BASE__INST7_SEG0 0 1230*5ca02815Sjsg #define PCIE0_BASE__INST7_SEG1 0 1231*5ca02815Sjsg #define PCIE0_BASE__INST7_SEG2 0 1232*5ca02815Sjsg #define PCIE0_BASE__INST7_SEG3 0 1233*5ca02815Sjsg #define PCIE0_BASE__INST7_SEG4 0 1234*5ca02815Sjsg #define PCIE0_BASE__INST7_SEG5 0 1235*5ca02815Sjsg 1236*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG0 0x00016800 1237*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG1 0x00016A00 1238*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG2 0x02401000 1239*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG3 0x00440000 1240*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG4 0 1241*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG5 0 1242*5ca02815Sjsg 1243*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG0 0x0001BC00 1244*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG1 0x0242D400 1245*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG2 0 1246*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG3 0 1247*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG4 0 1248*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG5 0 1249*5ca02815Sjsg 1250*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG0 0 1251*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG1 0 1252*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG2 0 1253*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG3 0 1254*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG4 0 1255*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG5 0 1256*5ca02815Sjsg 1257*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG0 0 1258*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG1 0 1259*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG2 0 1260*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG3 0 1261*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG4 0 1262*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG5 0 1263*5ca02815Sjsg 1264*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG0 0 1265*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG1 0 1266*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG2 0 1267*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG3 0 1268*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG4 0 1269*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG5 0 1270*5ca02815Sjsg 1271*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG0 0 1272*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG1 0 1273*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG2 0 1274*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG3 0 1275*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG4 0 1276*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG5 0 1277*5ca02815Sjsg 1278*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG0 0 1279*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG1 0 1280*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG2 0 1281*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG3 0 1282*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG4 0 1283*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG5 0 1284*5ca02815Sjsg 1285*5ca02815Sjsg #define SMUIO_BASE__INST7_SEG0 0 1286*5ca02815Sjsg #define SMUIO_BASE__INST7_SEG1 0 1287*5ca02815Sjsg #define SMUIO_BASE__INST7_SEG2 0 1288*5ca02815Sjsg #define SMUIO_BASE__INST7_SEG3 0 1289*5ca02815Sjsg #define SMUIO_BASE__INST7_SEG4 0 1290*5ca02815Sjsg #define SMUIO_BASE__INST7_SEG5 0 1291*5ca02815Sjsg 1292*5ca02815Sjsg #define THM_BASE__INST0_SEG0 0x00016600 1293*5ca02815Sjsg #define THM_BASE__INST0_SEG1 0x02400C00 1294*5ca02815Sjsg #define THM_BASE__INST0_SEG2 0 1295*5ca02815Sjsg #define THM_BASE__INST0_SEG3 0 1296*5ca02815Sjsg #define THM_BASE__INST0_SEG4 0 1297*5ca02815Sjsg #define THM_BASE__INST0_SEG5 0 1298*5ca02815Sjsg 1299*5ca02815Sjsg #define THM_BASE__INST1_SEG0 0 1300*5ca02815Sjsg #define THM_BASE__INST1_SEG1 0 1301*5ca02815Sjsg #define THM_BASE__INST1_SEG2 0 1302*5ca02815Sjsg #define THM_BASE__INST1_SEG3 0 1303*5ca02815Sjsg #define THM_BASE__INST1_SEG4 0 1304*5ca02815Sjsg #define THM_BASE__INST1_SEG5 0 1305*5ca02815Sjsg 1306*5ca02815Sjsg #define THM_BASE__INST2_SEG0 0 1307*5ca02815Sjsg #define THM_BASE__INST2_SEG1 0 1308*5ca02815Sjsg #define THM_BASE__INST2_SEG2 0 1309*5ca02815Sjsg #define THM_BASE__INST2_SEG3 0 1310*5ca02815Sjsg #define THM_BASE__INST2_SEG4 0 1311*5ca02815Sjsg #define THM_BASE__INST2_SEG5 0 1312*5ca02815Sjsg 1313*5ca02815Sjsg #define THM_BASE__INST3_SEG0 0 1314*5ca02815Sjsg #define THM_BASE__INST3_SEG1 0 1315*5ca02815Sjsg #define THM_BASE__INST3_SEG2 0 1316*5ca02815Sjsg #define THM_BASE__INST3_SEG3 0 1317*5ca02815Sjsg #define THM_BASE__INST3_SEG4 0 1318*5ca02815Sjsg #define THM_BASE__INST3_SEG5 0 1319*5ca02815Sjsg 1320*5ca02815Sjsg #define THM_BASE__INST4_SEG0 0 1321*5ca02815Sjsg #define THM_BASE__INST4_SEG1 0 1322*5ca02815Sjsg #define THM_BASE__INST4_SEG2 0 1323*5ca02815Sjsg #define THM_BASE__INST4_SEG3 0 1324*5ca02815Sjsg #define THM_BASE__INST4_SEG4 0 1325*5ca02815Sjsg #define THM_BASE__INST4_SEG5 0 1326*5ca02815Sjsg 1327*5ca02815Sjsg #define THM_BASE__INST5_SEG0 0 1328*5ca02815Sjsg #define THM_BASE__INST5_SEG1 0 1329*5ca02815Sjsg #define THM_BASE__INST5_SEG2 0 1330*5ca02815Sjsg #define THM_BASE__INST5_SEG3 0 1331*5ca02815Sjsg #define THM_BASE__INST5_SEG4 0 1332*5ca02815Sjsg #define THM_BASE__INST5_SEG5 0 1333*5ca02815Sjsg 1334*5ca02815Sjsg #define THM_BASE__INST6_SEG0 0 1335*5ca02815Sjsg #define THM_BASE__INST6_SEG1 0 1336*5ca02815Sjsg #define THM_BASE__INST6_SEG2 0 1337*5ca02815Sjsg #define THM_BASE__INST6_SEG3 0 1338*5ca02815Sjsg #define THM_BASE__INST6_SEG4 0 1339*5ca02815Sjsg #define THM_BASE__INST6_SEG5 0 1340*5ca02815Sjsg 1341*5ca02815Sjsg #define THM_BASE__INST7_SEG0 0 1342*5ca02815Sjsg #define THM_BASE__INST7_SEG1 0 1343*5ca02815Sjsg #define THM_BASE__INST7_SEG2 0 1344*5ca02815Sjsg #define THM_BASE__INST7_SEG3 0 1345*5ca02815Sjsg #define THM_BASE__INST7_SEG4 0 1346*5ca02815Sjsg #define THM_BASE__INST7_SEG5 0 1347*5ca02815Sjsg 1348*5ca02815Sjsg #define UMC_BASE__INST0_SEG0 0x00014000 1349*5ca02815Sjsg #define UMC_BASE__INST0_SEG1 0x02425800 1350*5ca02815Sjsg #define UMC_BASE__INST0_SEG2 0 1351*5ca02815Sjsg #define UMC_BASE__INST0_SEG3 0 1352*5ca02815Sjsg #define UMC_BASE__INST0_SEG4 0 1353*5ca02815Sjsg #define UMC_BASE__INST0_SEG5 0 1354*5ca02815Sjsg 1355*5ca02815Sjsg #define UMC_BASE__INST1_SEG0 0x00054000 1356*5ca02815Sjsg #define UMC_BASE__INST1_SEG1 0x02425C00 1357*5ca02815Sjsg #define UMC_BASE__INST1_SEG2 0 1358*5ca02815Sjsg #define UMC_BASE__INST1_SEG3 0 1359*5ca02815Sjsg #define UMC_BASE__INST1_SEG4 0 1360*5ca02815Sjsg #define UMC_BASE__INST1_SEG5 0 1361*5ca02815Sjsg 1362*5ca02815Sjsg #define UMC_BASE__INST2_SEG0 0x00094000 1363*5ca02815Sjsg #define UMC_BASE__INST2_SEG1 0x02426000 1364*5ca02815Sjsg #define UMC_BASE__INST2_SEG2 0 1365*5ca02815Sjsg #define UMC_BASE__INST2_SEG3 0 1366*5ca02815Sjsg #define UMC_BASE__INST2_SEG4 0 1367*5ca02815Sjsg #define UMC_BASE__INST2_SEG5 0 1368*5ca02815Sjsg 1369*5ca02815Sjsg #define UMC_BASE__INST3_SEG0 0x000D4000 1370*5ca02815Sjsg #define UMC_BASE__INST3_SEG1 0x02426400 1371*5ca02815Sjsg #define UMC_BASE__INST3_SEG2 0 1372*5ca02815Sjsg #define UMC_BASE__INST3_SEG3 0 1373*5ca02815Sjsg #define UMC_BASE__INST3_SEG4 0 1374*5ca02815Sjsg #define UMC_BASE__INST3_SEG5 0 1375*5ca02815Sjsg 1376*5ca02815Sjsg #define UMC_BASE__INST4_SEG0 0 1377*5ca02815Sjsg #define UMC_BASE__INST4_SEG1 0 1378*5ca02815Sjsg #define UMC_BASE__INST4_SEG2 0 1379*5ca02815Sjsg #define UMC_BASE__INST4_SEG3 0 1380*5ca02815Sjsg #define UMC_BASE__INST4_SEG4 0 1381*5ca02815Sjsg #define UMC_BASE__INST4_SEG5 0 1382*5ca02815Sjsg 1383*5ca02815Sjsg #define UMC_BASE__INST5_SEG0 0 1384*5ca02815Sjsg #define UMC_BASE__INST5_SEG1 0 1385*5ca02815Sjsg #define UMC_BASE__INST5_SEG2 0 1386*5ca02815Sjsg #define UMC_BASE__INST5_SEG3 0 1387*5ca02815Sjsg #define UMC_BASE__INST5_SEG4 0 1388*5ca02815Sjsg #define UMC_BASE__INST5_SEG5 0 1389*5ca02815Sjsg 1390*5ca02815Sjsg #define UMC_BASE__INST6_SEG0 0 1391*5ca02815Sjsg #define UMC_BASE__INST6_SEG1 0 1392*5ca02815Sjsg #define UMC_BASE__INST6_SEG2 0 1393*5ca02815Sjsg #define UMC_BASE__INST6_SEG3 0 1394*5ca02815Sjsg #define UMC_BASE__INST6_SEG4 0 1395*5ca02815Sjsg #define UMC_BASE__INST6_SEG5 0 1396*5ca02815Sjsg 1397*5ca02815Sjsg #define UMC_BASE__INST7_SEG0 0 1398*5ca02815Sjsg #define UMC_BASE__INST7_SEG1 0 1399*5ca02815Sjsg #define UMC_BASE__INST7_SEG2 0 1400*5ca02815Sjsg #define UMC_BASE__INST7_SEG3 0 1401*5ca02815Sjsg #define UMC_BASE__INST7_SEG4 0 1402*5ca02815Sjsg #define UMC_BASE__INST7_SEG5 0 1403*5ca02815Sjsg 1404*5ca02815Sjsg #define USB_BASE__INST0_SEG0 0x0242A800 1405*5ca02815Sjsg #define USB_BASE__INST0_SEG1 0x05B00000 1406*5ca02815Sjsg #define USB_BASE__INST0_SEG2 0 1407*5ca02815Sjsg #define USB_BASE__INST0_SEG3 0 1408*5ca02815Sjsg #define USB_BASE__INST0_SEG4 0 1409*5ca02815Sjsg #define USB_BASE__INST0_SEG5 0 1410*5ca02815Sjsg 1411*5ca02815Sjsg #define USB_BASE__INST1_SEG0 0x0242AC00 1412*5ca02815Sjsg #define USB_BASE__INST1_SEG1 0x05B80000 1413*5ca02815Sjsg #define USB_BASE__INST1_SEG2 0 1414*5ca02815Sjsg #define USB_BASE__INST1_SEG3 0 1415*5ca02815Sjsg #define USB_BASE__INST1_SEG4 0 1416*5ca02815Sjsg #define USB_BASE__INST1_SEG5 0 1417*5ca02815Sjsg 1418*5ca02815Sjsg #define USB_BASE__INST2_SEG0 0x0242B000 1419*5ca02815Sjsg #define USB_BASE__INST2_SEG1 0x05C00000 1420*5ca02815Sjsg #define USB_BASE__INST2_SEG2 0 1421*5ca02815Sjsg #define USB_BASE__INST2_SEG3 0 1422*5ca02815Sjsg #define USB_BASE__INST2_SEG4 0 1423*5ca02815Sjsg #define USB_BASE__INST2_SEG5 0 1424*5ca02815Sjsg 1425*5ca02815Sjsg #define USB_BASE__INST3_SEG0 0 1426*5ca02815Sjsg #define USB_BASE__INST3_SEG1 0 1427*5ca02815Sjsg #define USB_BASE__INST3_SEG2 0 1428*5ca02815Sjsg #define USB_BASE__INST3_SEG3 0 1429*5ca02815Sjsg #define USB_BASE__INST3_SEG4 0 1430*5ca02815Sjsg #define USB_BASE__INST3_SEG5 0 1431*5ca02815Sjsg 1432*5ca02815Sjsg #define USB_BASE__INST4_SEG0 0 1433*5ca02815Sjsg #define USB_BASE__INST4_SEG1 0 1434*5ca02815Sjsg #define USB_BASE__INST4_SEG2 0 1435*5ca02815Sjsg #define USB_BASE__INST4_SEG3 0 1436*5ca02815Sjsg #define USB_BASE__INST4_SEG4 0 1437*5ca02815Sjsg #define USB_BASE__INST4_SEG5 0 1438*5ca02815Sjsg 1439*5ca02815Sjsg #define USB_BASE__INST5_SEG0 0 1440*5ca02815Sjsg #define USB_BASE__INST5_SEG1 0 1441*5ca02815Sjsg #define USB_BASE__INST5_SEG2 0 1442*5ca02815Sjsg #define USB_BASE__INST5_SEG3 0 1443*5ca02815Sjsg #define USB_BASE__INST5_SEG4 0 1444*5ca02815Sjsg #define USB_BASE__INST5_SEG5 0 1445*5ca02815Sjsg 1446*5ca02815Sjsg #define USB_BASE__INST6_SEG0 0 1447*5ca02815Sjsg #define USB_BASE__INST6_SEG1 0 1448*5ca02815Sjsg #define USB_BASE__INST6_SEG2 0 1449*5ca02815Sjsg #define USB_BASE__INST6_SEG3 0 1450*5ca02815Sjsg #define USB_BASE__INST6_SEG4 0 1451*5ca02815Sjsg #define USB_BASE__INST6_SEG5 0 1452*5ca02815Sjsg 1453*5ca02815Sjsg #define USB_BASE__INST7_SEG0 0 1454*5ca02815Sjsg #define USB_BASE__INST7_SEG1 0 1455*5ca02815Sjsg #define USB_BASE__INST7_SEG2 0 1456*5ca02815Sjsg #define USB_BASE__INST7_SEG3 0 1457*5ca02815Sjsg #define USB_BASE__INST7_SEG4 0 1458*5ca02815Sjsg #define USB_BASE__INST7_SEG5 0 1459*5ca02815Sjsg 1460*5ca02815Sjsg #define VCN_BASE__INST0_SEG0 0x00007800 1461*5ca02815Sjsg #define VCN_BASE__INST0_SEG1 0x00007E00 1462*5ca02815Sjsg #define VCN_BASE__INST0_SEG2 0x02403000 1463*5ca02815Sjsg #define VCN_BASE__INST0_SEG3 0 1464*5ca02815Sjsg #define VCN_BASE__INST0_SEG4 0 1465*5ca02815Sjsg #define VCN_BASE__INST0_SEG5 0 1466*5ca02815Sjsg 1467*5ca02815Sjsg #define VCN_BASE__INST1_SEG0 0 1468*5ca02815Sjsg #define VCN_BASE__INST1_SEG1 0 1469*5ca02815Sjsg #define VCN_BASE__INST1_SEG2 0 1470*5ca02815Sjsg #define VCN_BASE__INST1_SEG3 0 1471*5ca02815Sjsg #define VCN_BASE__INST1_SEG4 0 1472*5ca02815Sjsg #define VCN_BASE__INST1_SEG5 0 1473*5ca02815Sjsg 1474*5ca02815Sjsg #define VCN_BASE__INST2_SEG0 0 1475*5ca02815Sjsg #define VCN_BASE__INST2_SEG1 0 1476*5ca02815Sjsg #define VCN_BASE__INST2_SEG2 0 1477*5ca02815Sjsg #define VCN_BASE__INST2_SEG3 0 1478*5ca02815Sjsg #define VCN_BASE__INST2_SEG4 0 1479*5ca02815Sjsg #define VCN_BASE__INST2_SEG5 0 1480*5ca02815Sjsg 1481*5ca02815Sjsg #define VCN_BASE__INST3_SEG0 0 1482*5ca02815Sjsg #define VCN_BASE__INST3_SEG1 0 1483*5ca02815Sjsg #define VCN_BASE__INST3_SEG2 0 1484*5ca02815Sjsg #define VCN_BASE__INST3_SEG3 0 1485*5ca02815Sjsg #define VCN_BASE__INST3_SEG4 0 1486*5ca02815Sjsg #define VCN_BASE__INST3_SEG5 0 1487*5ca02815Sjsg 1488*5ca02815Sjsg #define VCN_BASE__INST4_SEG0 0 1489*5ca02815Sjsg #define VCN_BASE__INST4_SEG1 0 1490*5ca02815Sjsg #define VCN_BASE__INST4_SEG2 0 1491*5ca02815Sjsg #define VCN_BASE__INST4_SEG3 0 1492*5ca02815Sjsg #define VCN_BASE__INST4_SEG4 0 1493*5ca02815Sjsg #define VCN_BASE__INST4_SEG5 0 1494*5ca02815Sjsg 1495*5ca02815Sjsg #define VCN_BASE__INST5_SEG0 0 1496*5ca02815Sjsg #define VCN_BASE__INST5_SEG1 0 1497*5ca02815Sjsg #define VCN_BASE__INST5_SEG2 0 1498*5ca02815Sjsg #define VCN_BASE__INST5_SEG3 0 1499*5ca02815Sjsg #define VCN_BASE__INST5_SEG4 0 1500*5ca02815Sjsg #define VCN_BASE__INST5_SEG5 0 1501*5ca02815Sjsg 1502*5ca02815Sjsg #define VCN_BASE__INST6_SEG0 0 1503*5ca02815Sjsg #define VCN_BASE__INST6_SEG1 0 1504*5ca02815Sjsg #define VCN_BASE__INST6_SEG2 0 1505*5ca02815Sjsg #define VCN_BASE__INST6_SEG3 0 1506*5ca02815Sjsg #define VCN_BASE__INST6_SEG4 0 1507*5ca02815Sjsg #define VCN_BASE__INST6_SEG5 0 1508*5ca02815Sjsg 1509*5ca02815Sjsg #define VCN_BASE__INST7_SEG0 0 1510*5ca02815Sjsg #define VCN_BASE__INST7_SEG1 0 1511*5ca02815Sjsg #define VCN_BASE__INST7_SEG2 0 1512*5ca02815Sjsg #define VCN_BASE__INST7_SEG3 0 1513*5ca02815Sjsg #define VCN_BASE__INST7_SEG4 0 1514*5ca02815Sjsg #define VCN_BASE__INST7_SEG5 0 1515*5ca02815Sjsg 1516*5ca02815Sjsg #endif 1517