xref: /openbsd-src/sys/dev/pci/drm/amd/include/cyan_skillfish_ip_offset.h (revision 1bb76ff151c0aba8e3312a604e4cd2e5195cf4b7)
15ca02815Sjsg /*
25ca02815Sjsg  * Copyright (C) 2018  Advanced Micro Devices, Inc.
35ca02815Sjsg  *
45ca02815Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
55ca02815Sjsg  * copy of this software and associated documentation files (the "Software"),
65ca02815Sjsg  * to deal in the Software without restriction, including without limitation
75ca02815Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
85ca02815Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
95ca02815Sjsg  * Software is furnished to do so, subject to the following conditions:
105ca02815Sjsg  *
115ca02815Sjsg  * The above copyright notice and this permission notice shall be included
125ca02815Sjsg  * in all copies or substantial portions of the Software.
135ca02815Sjsg  *
145ca02815Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
155ca02815Sjsg  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
165ca02815Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
175ca02815Sjsg  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
185ca02815Sjsg  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
195ca02815Sjsg  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
205ca02815Sjsg  */
215ca02815Sjsg #ifndef _cyan_skillfish_ip_offset_HEADER
225ca02815Sjsg #define _cyan_skillfish_ip_offset_HEADER
235ca02815Sjsg 
245ca02815Sjsg #define MAX_INSTANCE                                       6
255ca02815Sjsg #define MAX_SEGMENT                                        5
265ca02815Sjsg 
275ca02815Sjsg 
285ca02815Sjsg struct IP_BASE_INSTANCE
295ca02815Sjsg {
305ca02815Sjsg     unsigned int segment[MAX_SEGMENT];
31*1bb76ff1Sjsg } __maybe_unused;
325ca02815Sjsg 
335ca02815Sjsg struct IP_BASE
345ca02815Sjsg {
355ca02815Sjsg     struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
36*1bb76ff1Sjsg } __maybe_unused;
375ca02815Sjsg 
385ca02815Sjsg 
395ca02815Sjsg static const struct IP_BASE ATHUB_BASE            ={ { { { 0x00000C00, 0, 0, 0, 0 } },
405ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
415ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
425ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
435ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
445ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } } } };
455ca02815Sjsg static const struct IP_BASE CLK_BASE            ={ { { { 0x00016C00, 0, 0, 0, 0 } },
465ca02815Sjsg                                         { { 0x00016E00, 0, 0, 0, 0 } },
475ca02815Sjsg                                         { { 0x00017000, 0, 0, 0, 0 } },
485ca02815Sjsg                                         { { 0x00017200, 0, 0, 0, 0 } },
495ca02815Sjsg                                         { { 0x00017E00, 0, 0, 0, 0 } },
505ca02815Sjsg                                         { { 0x0001B000, 0, 0, 0, 0 } } } };
515ca02815Sjsg static const struct IP_BASE DF_BASE            ={ { { { 0x00007000, 0, 0, 0, 0 } },
525ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
535ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
545ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
555ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
565ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
575ca02815Sjsg static const struct IP_BASE DMU_BASE            ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0 } },
585ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
595ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
605ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
615ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
625ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
635ca02815Sjsg static const struct IP_BASE FUSE_BASE            ={ { { { 0x00017400, 0, 0, 0, 0 } },
645ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
655ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
665ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
675ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
685ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
695ca02815Sjsg static const struct IP_BASE GC_BASE            ={ { { { 0x00001260, 0x0000A000, 0, 0, 0 } },
705ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
715ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
725ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
735ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
745ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
755ca02815Sjsg static const struct IP_BASE HDP_BASE            ={ { { { 0x00000F20, 0, 0, 0, 0 } },
765ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
775ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
785ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
795ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
805ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
815ca02815Sjsg static const struct IP_BASE MMHUB_BASE            ={ { { { 0x0001A000, 0, 0, 0, 0 } },
825ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
835ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
845ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
855ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
865ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
875ca02815Sjsg static const struct IP_BASE MP0_BASE            ={ { { { 0x00016000, 0, 0, 0, 0 } },
885ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
895ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
905ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
915ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
925ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
935ca02815Sjsg static const struct IP_BASE MP1_BASE            ={ { { { 0x00016000, 0, 0, 0, 0 } },
945ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
955ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
965ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
975ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
985ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
995ca02815Sjsg static const struct IP_BASE NBIO_BASE            ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0 } },
1005ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1015ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1025ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1035ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1045ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
1055ca02815Sjsg static const struct IP_BASE OSSSYS_BASE            ={ { { { 0x000010A0, 0, 0, 0, 0 } },
1065ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1075ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1085ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1095ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1105ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } } } };
1115ca02815Sjsg static const struct IP_BASE SMUIO_BASE            ={ { { { 0x00016800, 0x00016A00, 0, 0, 0 } },
1125ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1135ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1145ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1155ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1165ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } } } };
1175ca02815Sjsg static const struct IP_BASE THM_BASE            ={ { { { 0x00016600, 0, 0, 0, 0 } },
1185ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1195ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1205ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1215ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1225ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
1235ca02815Sjsg static const struct IP_BASE UMC0_BASE            ={ { { { 0x00014000, 0, 0, 0, 0 } },
1245ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1255ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1265ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1275ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1285ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } } } };
1295ca02815Sjsg static const struct IP_BASE UVD0_BASE            ={ { { { 0x00007800, 0x00007E00, 0, 0, 0 } },
1305ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1315ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1325ca02815Sjsg                                         { { 0, 0, 0, 0, 0 } },
1335ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } },
1345ca02815Sjsg 					{ { 0, 0, 0, 0, 0 } } } };
1355ca02815Sjsg 
1365ca02815Sjsg 
1375ca02815Sjsg #define ATHUB_BASE__INST0_SEG0                     0x00000C00
1385ca02815Sjsg #define ATHUB_BASE__INST0_SEG1                     0
1395ca02815Sjsg #define ATHUB_BASE__INST0_SEG2                     0
1405ca02815Sjsg #define ATHUB_BASE__INST0_SEG3                     0
1415ca02815Sjsg #define ATHUB_BASE__INST0_SEG4                     0
1425ca02815Sjsg 
1435ca02815Sjsg #define ATHUB_BASE__INST1_SEG0                     0
1445ca02815Sjsg #define ATHUB_BASE__INST1_SEG1                     0
1455ca02815Sjsg #define ATHUB_BASE__INST1_SEG2                     0
1465ca02815Sjsg #define ATHUB_BASE__INST1_SEG3                     0
1475ca02815Sjsg #define ATHUB_BASE__INST1_SEG4                     0
1485ca02815Sjsg 
1495ca02815Sjsg #define ATHUB_BASE__INST2_SEG0                     0
1505ca02815Sjsg #define ATHUB_BASE__INST2_SEG1                     0
1515ca02815Sjsg #define ATHUB_BASE__INST2_SEG2                     0
1525ca02815Sjsg #define ATHUB_BASE__INST2_SEG3                     0
1535ca02815Sjsg #define ATHUB_BASE__INST2_SEG4                     0
1545ca02815Sjsg 
1555ca02815Sjsg #define ATHUB_BASE__INST3_SEG0                     0
1565ca02815Sjsg #define ATHUB_BASE__INST3_SEG1                     0
1575ca02815Sjsg #define ATHUB_BASE__INST3_SEG2                     0
1585ca02815Sjsg #define ATHUB_BASE__INST3_SEG3                     0
1595ca02815Sjsg #define ATHUB_BASE__INST3_SEG4                     0
1605ca02815Sjsg 
1615ca02815Sjsg #define ATHUB_BASE__INST4_SEG0                     0
1625ca02815Sjsg #define ATHUB_BASE__INST4_SEG1                     0
1635ca02815Sjsg #define ATHUB_BASE__INST4_SEG2                     0
1645ca02815Sjsg #define ATHUB_BASE__INST4_SEG3                     0
1655ca02815Sjsg #define ATHUB_BASE__INST4_SEG4                     0
1665ca02815Sjsg 
1675ca02815Sjsg #define ATHUB_BASE__INST5_SEG0                     0
1685ca02815Sjsg #define ATHUB_BASE__INST5_SEG1                     0
1695ca02815Sjsg #define ATHUB_BASE__INST5_SEG2                     0
1705ca02815Sjsg #define ATHUB_BASE__INST5_SEG3                     0
1715ca02815Sjsg #define ATHUB_BASE__INST5_SEG4                     0
1725ca02815Sjsg 
1735ca02815Sjsg #define CLK_BASE__INST0_SEG0                       0x00016C00
1745ca02815Sjsg #define CLK_BASE__INST0_SEG1                       0
1755ca02815Sjsg #define CLK_BASE__INST0_SEG2                       0
1765ca02815Sjsg #define CLK_BASE__INST0_SEG3                       0
1775ca02815Sjsg #define CLK_BASE__INST0_SEG4                       0
1785ca02815Sjsg 
1795ca02815Sjsg #define CLK_BASE__INST1_SEG0                       0x00016E00
1805ca02815Sjsg #define CLK_BASE__INST1_SEG1                       0
1815ca02815Sjsg #define CLK_BASE__INST1_SEG2                       0
1825ca02815Sjsg #define CLK_BASE__INST1_SEG3                       0
1835ca02815Sjsg #define CLK_BASE__INST1_SEG4                       0
1845ca02815Sjsg 
1855ca02815Sjsg #define CLK_BASE__INST2_SEG0                       0x00017000
1865ca02815Sjsg #define CLK_BASE__INST2_SEG1                       0
1875ca02815Sjsg #define CLK_BASE__INST2_SEG2                       0
1885ca02815Sjsg #define CLK_BASE__INST2_SEG3                       0
1895ca02815Sjsg #define CLK_BASE__INST2_SEG4                       0
1905ca02815Sjsg 
1915ca02815Sjsg #define CLK_BASE__INST3_SEG0                       0x00017200
1925ca02815Sjsg #define CLK_BASE__INST3_SEG1                       0
1935ca02815Sjsg #define CLK_BASE__INST3_SEG2                       0
1945ca02815Sjsg #define CLK_BASE__INST3_SEG3                       0
1955ca02815Sjsg #define CLK_BASE__INST3_SEG4                       0
1965ca02815Sjsg 
1975ca02815Sjsg #define CLK_BASE__INST4_SEG0                       0x00017E00
1985ca02815Sjsg #define CLK_BASE__INST4_SEG1                       0
1995ca02815Sjsg #define CLK_BASE__INST4_SEG2                       0
2005ca02815Sjsg #define CLK_BASE__INST4_SEG3                       0
2015ca02815Sjsg #define CLK_BASE__INST4_SEG4                       0
2025ca02815Sjsg 
2035ca02815Sjsg #define CLK_BASE__INST5_SEG0                       0x0001B000
2045ca02815Sjsg #define CLK_BASE__INST5_SEG1                       0
2055ca02815Sjsg #define CLK_BASE__INST5_SEG2                       0
2065ca02815Sjsg #define CLK_BASE__INST5_SEG3                       0
2075ca02815Sjsg #define CLK_BASE__INST5_SEG4                       0
2085ca02815Sjsg 
2095ca02815Sjsg #define DF_BASE__INST0_SEG0                        0x00007000
2105ca02815Sjsg #define DF_BASE__INST0_SEG1                        0
2115ca02815Sjsg #define DF_BASE__INST0_SEG2                        0
2125ca02815Sjsg #define DF_BASE__INST0_SEG3                        0
2135ca02815Sjsg #define DF_BASE__INST0_SEG4                        0
2145ca02815Sjsg 
2155ca02815Sjsg #define DF_BASE__INST1_SEG0                        0
2165ca02815Sjsg #define DF_BASE__INST1_SEG1                        0
2175ca02815Sjsg #define DF_BASE__INST1_SEG2                        0
2185ca02815Sjsg #define DF_BASE__INST1_SEG3                        0
2195ca02815Sjsg #define DF_BASE__INST1_SEG4                        0
2205ca02815Sjsg 
2215ca02815Sjsg #define DF_BASE__INST2_SEG0                        0
2225ca02815Sjsg #define DF_BASE__INST2_SEG1                        0
2235ca02815Sjsg #define DF_BASE__INST2_SEG2                        0
2245ca02815Sjsg #define DF_BASE__INST2_SEG3                        0
2255ca02815Sjsg #define DF_BASE__INST2_SEG4                        0
2265ca02815Sjsg 
2275ca02815Sjsg #define DF_BASE__INST3_SEG0                        0
2285ca02815Sjsg #define DF_BASE__INST3_SEG1                        0
2295ca02815Sjsg #define DF_BASE__INST3_SEG2                        0
2305ca02815Sjsg #define DF_BASE__INST3_SEG3                        0
2315ca02815Sjsg #define DF_BASE__INST3_SEG4                        0
2325ca02815Sjsg 
2335ca02815Sjsg #define DF_BASE__INST4_SEG0                        0
2345ca02815Sjsg #define DF_BASE__INST4_SEG1                        0
2355ca02815Sjsg #define DF_BASE__INST4_SEG2                        0
2365ca02815Sjsg #define DF_BASE__INST4_SEG3                        0
2375ca02815Sjsg #define DF_BASE__INST4_SEG4                        0
2385ca02815Sjsg 
2395ca02815Sjsg #define DF_BASE__INST5_SEG0                        0
2405ca02815Sjsg #define DF_BASE__INST5_SEG1                        0
2415ca02815Sjsg #define DF_BASE__INST5_SEG2                        0
2425ca02815Sjsg #define DF_BASE__INST5_SEG3                        0
2435ca02815Sjsg #define DF_BASE__INST5_SEG4                        0
2445ca02815Sjsg 
2455ca02815Sjsg #define DMU_BASE__INST0_SEG0                       0x00000012
2465ca02815Sjsg #define DMU_BASE__INST0_SEG1                       0x000000C0
2475ca02815Sjsg #define DMU_BASE__INST0_SEG2                       0x000034C0
2485ca02815Sjsg #define DMU_BASE__INST0_SEG3                       0x00009000
2495ca02815Sjsg #define DMU_BASE__INST0_SEG4                       0
2505ca02815Sjsg 
2515ca02815Sjsg #define DMU_BASE__INST1_SEG0                       0
2525ca02815Sjsg #define DMU_BASE__INST1_SEG1                       0
2535ca02815Sjsg #define DMU_BASE__INST1_SEG2                       0
2545ca02815Sjsg #define DMU_BASE__INST1_SEG3                       0
2555ca02815Sjsg #define DMU_BASE__INST1_SEG4                       0
2565ca02815Sjsg 
2575ca02815Sjsg #define DMU_BASE__INST2_SEG0                       0
2585ca02815Sjsg #define DMU_BASE__INST2_SEG1                       0
2595ca02815Sjsg #define DMU_BASE__INST2_SEG2                       0
2605ca02815Sjsg #define DMU_BASE__INST2_SEG3                       0
2615ca02815Sjsg #define DMU_BASE__INST2_SEG4                       0
2625ca02815Sjsg 
2635ca02815Sjsg #define DMU_BASE__INST3_SEG0                       0
2645ca02815Sjsg #define DMU_BASE__INST3_SEG1                       0
2655ca02815Sjsg #define DMU_BASE__INST3_SEG2                       0
2665ca02815Sjsg #define DMU_BASE__INST3_SEG3                       0
2675ca02815Sjsg #define DMU_BASE__INST3_SEG4                       0
2685ca02815Sjsg 
2695ca02815Sjsg #define DMU_BASE__INST4_SEG0                       0
2705ca02815Sjsg #define DMU_BASE__INST4_SEG1                       0
2715ca02815Sjsg #define DMU_BASE__INST4_SEG2                       0
2725ca02815Sjsg #define DMU_BASE__INST4_SEG3                       0
2735ca02815Sjsg #define DMU_BASE__INST4_SEG4                       0
2745ca02815Sjsg 
2755ca02815Sjsg #define DMU_BASE__INST5_SEG0                       0
2765ca02815Sjsg #define DMU_BASE__INST5_SEG1                       0
2775ca02815Sjsg #define DMU_BASE__INST5_SEG2                       0
2785ca02815Sjsg #define DMU_BASE__INST5_SEG3                       0
2795ca02815Sjsg #define DMU_BASE__INST5_SEG4                       0
2805ca02815Sjsg 
2815ca02815Sjsg #define FUSE_BASE__INST0_SEG0                      0x00017400
2825ca02815Sjsg #define FUSE_BASE__INST0_SEG1                      0
2835ca02815Sjsg #define FUSE_BASE__INST0_SEG2                      0
2845ca02815Sjsg #define FUSE_BASE__INST0_SEG3                      0
2855ca02815Sjsg #define FUSE_BASE__INST0_SEG4                      0
2865ca02815Sjsg 
2875ca02815Sjsg #define FUSE_BASE__INST1_SEG0                      0
2885ca02815Sjsg #define FUSE_BASE__INST1_SEG1                      0
2895ca02815Sjsg #define FUSE_BASE__INST1_SEG2                      0
2905ca02815Sjsg #define FUSE_BASE__INST1_SEG3                      0
2915ca02815Sjsg #define FUSE_BASE__INST1_SEG4                      0
2925ca02815Sjsg 
2935ca02815Sjsg #define FUSE_BASE__INST2_SEG0                      0
2945ca02815Sjsg #define FUSE_BASE__INST2_SEG1                      0
2955ca02815Sjsg #define FUSE_BASE__INST2_SEG2                      0
2965ca02815Sjsg #define FUSE_BASE__INST2_SEG3                      0
2975ca02815Sjsg #define FUSE_BASE__INST2_SEG4                      0
2985ca02815Sjsg 
2995ca02815Sjsg #define FUSE_BASE__INST3_SEG0                      0
3005ca02815Sjsg #define FUSE_BASE__INST3_SEG1                      0
3015ca02815Sjsg #define FUSE_BASE__INST3_SEG2                      0
3025ca02815Sjsg #define FUSE_BASE__INST3_SEG3                      0
3035ca02815Sjsg #define FUSE_BASE__INST3_SEG4                      0
3045ca02815Sjsg 
3055ca02815Sjsg #define FUSE_BASE__INST4_SEG0                      0
3065ca02815Sjsg #define FUSE_BASE__INST4_SEG1                      0
3075ca02815Sjsg #define FUSE_BASE__INST4_SEG2                      0
3085ca02815Sjsg #define FUSE_BASE__INST4_SEG3                      0
3095ca02815Sjsg #define FUSE_BASE__INST4_SEG4                      0
3105ca02815Sjsg 
3115ca02815Sjsg #define FUSE_BASE__INST5_SEG0                      0
3125ca02815Sjsg #define FUSE_BASE__INST5_SEG1                      0
3135ca02815Sjsg #define FUSE_BASE__INST5_SEG2                      0
3145ca02815Sjsg #define FUSE_BASE__INST5_SEG3                      0
3155ca02815Sjsg #define FUSE_BASE__INST5_SEG4                      0
3165ca02815Sjsg 
3175ca02815Sjsg #define GC_BASE__INST0_SEG0                        0x00001260
3185ca02815Sjsg #define GC_BASE__INST0_SEG1                        0x0000A000
3195ca02815Sjsg #define GC_BASE__INST0_SEG2                        0
3205ca02815Sjsg #define GC_BASE__INST0_SEG3                        0
3215ca02815Sjsg #define GC_BASE__INST0_SEG4                        0
3225ca02815Sjsg 
3235ca02815Sjsg #define GC_BASE__INST1_SEG0                        0
3245ca02815Sjsg #define GC_BASE__INST1_SEG1                        0
3255ca02815Sjsg #define GC_BASE__INST1_SEG2                        0
3265ca02815Sjsg #define GC_BASE__INST1_SEG3                        0
3275ca02815Sjsg #define GC_BASE__INST1_SEG4                        0
3285ca02815Sjsg 
3295ca02815Sjsg #define GC_BASE__INST2_SEG0                        0
3305ca02815Sjsg #define GC_BASE__INST2_SEG1                        0
3315ca02815Sjsg #define GC_BASE__INST2_SEG2                        0
3325ca02815Sjsg #define GC_BASE__INST2_SEG3                        0
3335ca02815Sjsg #define GC_BASE__INST2_SEG4                        0
3345ca02815Sjsg 
3355ca02815Sjsg #define GC_BASE__INST3_SEG0                        0
3365ca02815Sjsg #define GC_BASE__INST3_SEG1                        0
3375ca02815Sjsg #define GC_BASE__INST3_SEG2                        0
3385ca02815Sjsg #define GC_BASE__INST3_SEG3                        0
3395ca02815Sjsg #define GC_BASE__INST3_SEG4                        0
3405ca02815Sjsg 
3415ca02815Sjsg #define GC_BASE__INST4_SEG0                        0
3425ca02815Sjsg #define GC_BASE__INST4_SEG1                        0
3435ca02815Sjsg #define GC_BASE__INST4_SEG2                        0
3445ca02815Sjsg #define GC_BASE__INST4_SEG3                        0
3455ca02815Sjsg #define GC_BASE__INST4_SEG4                        0
3465ca02815Sjsg 
3475ca02815Sjsg #define GC_BASE__INST5_SEG0                        0
3485ca02815Sjsg #define GC_BASE__INST5_SEG1                        0
3495ca02815Sjsg #define GC_BASE__INST5_SEG2                        0
3505ca02815Sjsg #define GC_BASE__INST5_SEG3                        0
3515ca02815Sjsg #define GC_BASE__INST5_SEG4                        0
3525ca02815Sjsg 
3535ca02815Sjsg #define HDP_BASE__INST0_SEG0                       0x00000F20
3545ca02815Sjsg #define HDP_BASE__INST0_SEG1                       0
3555ca02815Sjsg #define HDP_BASE__INST0_SEG2                       0
3565ca02815Sjsg #define HDP_BASE__INST0_SEG3                       0
3575ca02815Sjsg #define HDP_BASE__INST0_SEG4                       0
3585ca02815Sjsg 
3595ca02815Sjsg #define HDP_BASE__INST1_SEG0                       0
3605ca02815Sjsg #define HDP_BASE__INST1_SEG1                       0
3615ca02815Sjsg #define HDP_BASE__INST1_SEG2                       0
3625ca02815Sjsg #define HDP_BASE__INST1_SEG3                       0
3635ca02815Sjsg #define HDP_BASE__INST1_SEG4                       0
3645ca02815Sjsg 
3655ca02815Sjsg #define HDP_BASE__INST2_SEG0                       0
3665ca02815Sjsg #define HDP_BASE__INST2_SEG1                       0
3675ca02815Sjsg #define HDP_BASE__INST2_SEG2                       0
3685ca02815Sjsg #define HDP_BASE__INST2_SEG3                       0
3695ca02815Sjsg #define HDP_BASE__INST2_SEG4                       0
3705ca02815Sjsg 
3715ca02815Sjsg #define HDP_BASE__INST3_SEG0                       0
3725ca02815Sjsg #define HDP_BASE__INST3_SEG1                       0
3735ca02815Sjsg #define HDP_BASE__INST3_SEG2                       0
3745ca02815Sjsg #define HDP_BASE__INST3_SEG3                       0
3755ca02815Sjsg #define HDP_BASE__INST3_SEG4                       0
3765ca02815Sjsg 
3775ca02815Sjsg #define HDP_BASE__INST4_SEG0                       0
3785ca02815Sjsg #define HDP_BASE__INST4_SEG1                       0
3795ca02815Sjsg #define HDP_BASE__INST4_SEG2                       0
3805ca02815Sjsg #define HDP_BASE__INST4_SEG3                       0
3815ca02815Sjsg #define HDP_BASE__INST4_SEG4                       0
3825ca02815Sjsg 
3835ca02815Sjsg #define HDP_BASE__INST5_SEG0                       0
3845ca02815Sjsg #define HDP_BASE__INST5_SEG1                       0
3855ca02815Sjsg #define HDP_BASE__INST5_SEG2                       0
3865ca02815Sjsg #define HDP_BASE__INST5_SEG3                       0
3875ca02815Sjsg #define HDP_BASE__INST5_SEG4                       0
3885ca02815Sjsg 
3895ca02815Sjsg #define MMHUB_BASE__INST0_SEG0                     0x0001A000
3905ca02815Sjsg #define MMHUB_BASE__INST0_SEG1                     0
3915ca02815Sjsg #define MMHUB_BASE__INST0_SEG2                     0
3925ca02815Sjsg #define MMHUB_BASE__INST0_SEG3                     0
3935ca02815Sjsg #define MMHUB_BASE__INST0_SEG4                     0
3945ca02815Sjsg 
3955ca02815Sjsg #define MMHUB_BASE__INST1_SEG0                     0
3965ca02815Sjsg #define MMHUB_BASE__INST1_SEG1                     0
3975ca02815Sjsg #define MMHUB_BASE__INST1_SEG2                     0
3985ca02815Sjsg #define MMHUB_BASE__INST1_SEG3                     0
3995ca02815Sjsg #define MMHUB_BASE__INST1_SEG4                     0
4005ca02815Sjsg 
4015ca02815Sjsg #define MMHUB_BASE__INST2_SEG0                     0
4025ca02815Sjsg #define MMHUB_BASE__INST2_SEG1                     0
4035ca02815Sjsg #define MMHUB_BASE__INST2_SEG2                     0
4045ca02815Sjsg #define MMHUB_BASE__INST2_SEG3                     0
4055ca02815Sjsg #define MMHUB_BASE__INST2_SEG4                     0
4065ca02815Sjsg 
4075ca02815Sjsg #define MMHUB_BASE__INST3_SEG0                     0
4085ca02815Sjsg #define MMHUB_BASE__INST3_SEG1                     0
4095ca02815Sjsg #define MMHUB_BASE__INST3_SEG2                     0
4105ca02815Sjsg #define MMHUB_BASE__INST3_SEG3                     0
4115ca02815Sjsg #define MMHUB_BASE__INST3_SEG4                     0
4125ca02815Sjsg 
4135ca02815Sjsg #define MMHUB_BASE__INST4_SEG0                     0
4145ca02815Sjsg #define MMHUB_BASE__INST4_SEG1                     0
4155ca02815Sjsg #define MMHUB_BASE__INST4_SEG2                     0
4165ca02815Sjsg #define MMHUB_BASE__INST4_SEG3                     0
4175ca02815Sjsg #define MMHUB_BASE__INST4_SEG4                     0
4185ca02815Sjsg 
4195ca02815Sjsg #define MMHUB_BASE__INST5_SEG0                     0
4205ca02815Sjsg #define MMHUB_BASE__INST5_SEG1                     0
4215ca02815Sjsg #define MMHUB_BASE__INST5_SEG2                     0
4225ca02815Sjsg #define MMHUB_BASE__INST5_SEG3                     0
4235ca02815Sjsg #define MMHUB_BASE__INST5_SEG4                     0
4245ca02815Sjsg 
4255ca02815Sjsg #define MP0_BASE__INST0_SEG0                       0x00016000
4265ca02815Sjsg #define MP0_BASE__INST0_SEG1                       0
4275ca02815Sjsg #define MP0_BASE__INST0_SEG2                       0
4285ca02815Sjsg #define MP0_BASE__INST0_SEG3                       0
4295ca02815Sjsg #define MP0_BASE__INST0_SEG4                       0
4305ca02815Sjsg 
4315ca02815Sjsg #define MP0_BASE__INST1_SEG0                       0
4325ca02815Sjsg #define MP0_BASE__INST1_SEG1                       0
4335ca02815Sjsg #define MP0_BASE__INST1_SEG2                       0
4345ca02815Sjsg #define MP0_BASE__INST1_SEG3                       0
4355ca02815Sjsg #define MP0_BASE__INST1_SEG4                       0
4365ca02815Sjsg 
4375ca02815Sjsg #define MP0_BASE__INST2_SEG0                       0
4385ca02815Sjsg #define MP0_BASE__INST2_SEG1                       0
4395ca02815Sjsg #define MP0_BASE__INST2_SEG2                       0
4405ca02815Sjsg #define MP0_BASE__INST2_SEG3                       0
4415ca02815Sjsg #define MP0_BASE__INST2_SEG4                       0
4425ca02815Sjsg 
4435ca02815Sjsg #define MP0_BASE__INST3_SEG0                       0
4445ca02815Sjsg #define MP0_BASE__INST3_SEG1                       0
4455ca02815Sjsg #define MP0_BASE__INST3_SEG2                       0
4465ca02815Sjsg #define MP0_BASE__INST3_SEG3                       0
4475ca02815Sjsg #define MP0_BASE__INST3_SEG4                       0
4485ca02815Sjsg 
4495ca02815Sjsg #define MP0_BASE__INST4_SEG0                       0
4505ca02815Sjsg #define MP0_BASE__INST4_SEG1                       0
4515ca02815Sjsg #define MP0_BASE__INST4_SEG2                       0
4525ca02815Sjsg #define MP0_BASE__INST4_SEG3                       0
4535ca02815Sjsg #define MP0_BASE__INST4_SEG4                       0
4545ca02815Sjsg 
4555ca02815Sjsg #define MP0_BASE__INST5_SEG0                       0
4565ca02815Sjsg #define MP0_BASE__INST5_SEG1                       0
4575ca02815Sjsg #define MP0_BASE__INST5_SEG2                       0
4585ca02815Sjsg #define MP0_BASE__INST5_SEG3                       0
4595ca02815Sjsg #define MP0_BASE__INST5_SEG4                       0
4605ca02815Sjsg 
4615ca02815Sjsg #define MP1_BASE__INST0_SEG0                       0x00016000
4625ca02815Sjsg #define MP1_BASE__INST0_SEG1                       0
4635ca02815Sjsg #define MP1_BASE__INST0_SEG2                       0
4645ca02815Sjsg #define MP1_BASE__INST0_SEG3                       0
4655ca02815Sjsg #define MP1_BASE__INST0_SEG4                       0
4665ca02815Sjsg 
4675ca02815Sjsg #define MP1_BASE__INST1_SEG0                       0
4685ca02815Sjsg #define MP1_BASE__INST1_SEG1                       0
4695ca02815Sjsg #define MP1_BASE__INST1_SEG2                       0
4705ca02815Sjsg #define MP1_BASE__INST1_SEG3                       0
4715ca02815Sjsg #define MP1_BASE__INST1_SEG4                       0
4725ca02815Sjsg 
4735ca02815Sjsg #define MP1_BASE__INST2_SEG0                       0
4745ca02815Sjsg #define MP1_BASE__INST2_SEG1                       0
4755ca02815Sjsg #define MP1_BASE__INST2_SEG2                       0
4765ca02815Sjsg #define MP1_BASE__INST2_SEG3                       0
4775ca02815Sjsg #define MP1_BASE__INST2_SEG4                       0
4785ca02815Sjsg 
4795ca02815Sjsg #define MP1_BASE__INST3_SEG0                       0
4805ca02815Sjsg #define MP1_BASE__INST3_SEG1                       0
4815ca02815Sjsg #define MP1_BASE__INST3_SEG2                       0
4825ca02815Sjsg #define MP1_BASE__INST3_SEG3                       0
4835ca02815Sjsg #define MP1_BASE__INST3_SEG4                       0
4845ca02815Sjsg 
4855ca02815Sjsg #define MP1_BASE__INST4_SEG0                       0
4865ca02815Sjsg #define MP1_BASE__INST4_SEG1                       0
4875ca02815Sjsg #define MP1_BASE__INST4_SEG2                       0
4885ca02815Sjsg #define MP1_BASE__INST4_SEG3                       0
4895ca02815Sjsg #define MP1_BASE__INST4_SEG4                       0
4905ca02815Sjsg 
4915ca02815Sjsg #define MP1_BASE__INST5_SEG0                       0
4925ca02815Sjsg #define MP1_BASE__INST5_SEG1                       0
4935ca02815Sjsg #define MP1_BASE__INST5_SEG2                       0
4945ca02815Sjsg #define MP1_BASE__INST5_SEG3                       0
4955ca02815Sjsg #define MP1_BASE__INST5_SEG4                       0
4965ca02815Sjsg 
4975ca02815Sjsg #define NBIO_BASE__INST0_SEG0                     0x00000000
4985ca02815Sjsg #define NBIO_BASE__INST0_SEG1                     0x00000014
4995ca02815Sjsg #define NBIO_BASE__INST0_SEG2                     0x00000D20
5005ca02815Sjsg #define NBIO_BASE__INST0_SEG3                     0x00010400
5015ca02815Sjsg #define NBIO_BASE__INST0_SEG4                     0
5025ca02815Sjsg 
5035ca02815Sjsg #define NBIO_BASE__INST1_SEG0                     0
5045ca02815Sjsg #define NBIO_BASE__INST1_SEG1                     0
5055ca02815Sjsg #define NBIO_BASE__INST1_SEG2                     0
5065ca02815Sjsg #define NBIO_BASE__INST1_SEG3                     0
5075ca02815Sjsg #define NBIO_BASE__INST1_SEG4                     0
5085ca02815Sjsg 
5095ca02815Sjsg #define NBIO_BASE__INST2_SEG0                     0
5105ca02815Sjsg #define NBIO_BASE__INST2_SEG1                     0
5115ca02815Sjsg #define NBIO_BASE__INST2_SEG2                     0
5125ca02815Sjsg #define NBIO_BASE__INST2_SEG3                     0
5135ca02815Sjsg #define NBIO_BASE__INST2_SEG4                     0
5145ca02815Sjsg 
5155ca02815Sjsg #define NBIO_BASE__INST3_SEG0                     0
5165ca02815Sjsg #define NBIO_BASE__INST3_SEG1                     0
5175ca02815Sjsg #define NBIO_BASE__INST3_SEG2                     0
5185ca02815Sjsg #define NBIO_BASE__INST3_SEG3                     0
5195ca02815Sjsg #define NBIO_BASE__INST3_SEG4                     0
5205ca02815Sjsg 
5215ca02815Sjsg #define NBIO_BASE__INST4_SEG0                     0
5225ca02815Sjsg #define NBIO_BASE__INST4_SEG1                     0
5235ca02815Sjsg #define NBIO_BASE__INST4_SEG2                     0
5245ca02815Sjsg #define NBIO_BASE__INST4_SEG3                     0
5255ca02815Sjsg #define NBIO_BASE__INST4_SEG4                     0
5265ca02815Sjsg 
5275ca02815Sjsg #define NBIO_BASE__INST5_SEG0                     0
5285ca02815Sjsg #define NBIO_BASE__INST5_SEG1                     0
5295ca02815Sjsg #define NBIO_BASE__INST5_SEG2                     0
5305ca02815Sjsg #define NBIO_BASE__INST5_SEG3                     0
5315ca02815Sjsg #define NBIO_BASE__INST5_SEG4                     0
5325ca02815Sjsg 
5335ca02815Sjsg #define OSSSYS_BASE__INST0_SEG0                    0x000010A0
5345ca02815Sjsg #define OSSSYS_BASE__INST0_SEG1                    0
5355ca02815Sjsg #define OSSSYS_BASE__INST0_SEG2                    0
5365ca02815Sjsg #define OSSSYS_BASE__INST0_SEG3                    0
5375ca02815Sjsg #define OSSSYS_BASE__INST0_SEG4                    0
5385ca02815Sjsg 
5395ca02815Sjsg #define OSSSYS_BASE__INST1_SEG0                    0
5405ca02815Sjsg #define OSSSYS_BASE__INST1_SEG1                    0
5415ca02815Sjsg #define OSSSYS_BASE__INST1_SEG2                    0
5425ca02815Sjsg #define OSSSYS_BASE__INST1_SEG3                    0
5435ca02815Sjsg #define OSSSYS_BASE__INST1_SEG4                    0
5445ca02815Sjsg 
5455ca02815Sjsg #define OSSSYS_BASE__INST2_SEG0                    0
5465ca02815Sjsg #define OSSSYS_BASE__INST2_SEG1                    0
5475ca02815Sjsg #define OSSSYS_BASE__INST2_SEG2                    0
5485ca02815Sjsg #define OSSSYS_BASE__INST2_SEG3                    0
5495ca02815Sjsg #define OSSSYS_BASE__INST2_SEG4                    0
5505ca02815Sjsg 
5515ca02815Sjsg #define OSSSYS_BASE__INST3_SEG0                    0
5525ca02815Sjsg #define OSSSYS_BASE__INST3_SEG1                    0
5535ca02815Sjsg #define OSSSYS_BASE__INST3_SEG2                    0
5545ca02815Sjsg #define OSSSYS_BASE__INST3_SEG3                    0
5555ca02815Sjsg #define OSSSYS_BASE__INST3_SEG4                    0
5565ca02815Sjsg 
5575ca02815Sjsg #define OSSSYS_BASE__INST4_SEG0                    0
5585ca02815Sjsg #define OSSSYS_BASE__INST4_SEG1                    0
5595ca02815Sjsg #define OSSSYS_BASE__INST4_SEG2                    0
5605ca02815Sjsg #define OSSSYS_BASE__INST4_SEG3                    0
5615ca02815Sjsg #define OSSSYS_BASE__INST4_SEG4                    0
5625ca02815Sjsg 
5635ca02815Sjsg #define OSSSYS_BASE__INST5_SEG0                    0
5645ca02815Sjsg #define OSSSYS_BASE__INST5_SEG1                    0
5655ca02815Sjsg #define OSSSYS_BASE__INST5_SEG2                    0
5665ca02815Sjsg #define OSSSYS_BASE__INST5_SEG3                    0
5675ca02815Sjsg #define OSSSYS_BASE__INST5_SEG4                    0
5685ca02815Sjsg 
5695ca02815Sjsg #define SMUIO_BASE__INST0_SEG0                     0x00016800
5705ca02815Sjsg #define SMUIO_BASE__INST0_SEG1                     0x00016A00
5715ca02815Sjsg #define SMUIO_BASE__INST0_SEG2                     0
5725ca02815Sjsg #define SMUIO_BASE__INST0_SEG3                     0
5735ca02815Sjsg #define SMUIO_BASE__INST0_SEG4                     0
5745ca02815Sjsg 
5755ca02815Sjsg #define SMUIO_BASE__INST1_SEG0                     0
5765ca02815Sjsg #define SMUIO_BASE__INST1_SEG1                     0
5775ca02815Sjsg #define SMUIO_BASE__INST1_SEG2                     0
5785ca02815Sjsg #define SMUIO_BASE__INST1_SEG3                     0
5795ca02815Sjsg #define SMUIO_BASE__INST1_SEG4                     0
5805ca02815Sjsg 
5815ca02815Sjsg #define SMUIO_BASE__INST2_SEG0                     0
5825ca02815Sjsg #define SMUIO_BASE__INST2_SEG1                     0
5835ca02815Sjsg #define SMUIO_BASE__INST2_SEG2                     0
5845ca02815Sjsg #define SMUIO_BASE__INST2_SEG3                     0
5855ca02815Sjsg #define SMUIO_BASE__INST2_SEG4                     0
5865ca02815Sjsg 
5875ca02815Sjsg #define SMUIO_BASE__INST3_SEG0                     0
5885ca02815Sjsg #define SMUIO_BASE__INST3_SEG1                     0
5895ca02815Sjsg #define SMUIO_BASE__INST3_SEG2                     0
5905ca02815Sjsg #define SMUIO_BASE__INST3_SEG3                     0
5915ca02815Sjsg #define SMUIO_BASE__INST3_SEG4                     0
5925ca02815Sjsg 
5935ca02815Sjsg #define SMUIO_BASE__INST4_SEG0                     0
5945ca02815Sjsg #define SMUIO_BASE__INST4_SEG1                     0
5955ca02815Sjsg #define SMUIO_BASE__INST4_SEG2                     0
5965ca02815Sjsg #define SMUIO_BASE__INST4_SEG3                     0
5975ca02815Sjsg #define SMUIO_BASE__INST4_SEG4                     0
5985ca02815Sjsg 
5995ca02815Sjsg #define SMUIO_BASE__INST5_SEG0                     0
6005ca02815Sjsg #define SMUIO_BASE__INST5_SEG1                     0
6015ca02815Sjsg #define SMUIO_BASE__INST5_SEG2                     0
6025ca02815Sjsg #define SMUIO_BASE__INST5_SEG3                     0
6035ca02815Sjsg #define SMUIO_BASE__INST5_SEG4                     0
6045ca02815Sjsg 
6055ca02815Sjsg #define THM_BASE__INST0_SEG0                       0x00016600
6065ca02815Sjsg #define THM_BASE__INST0_SEG1                       0
6075ca02815Sjsg #define THM_BASE__INST0_SEG2                       0
6085ca02815Sjsg #define THM_BASE__INST0_SEG3                       0
6095ca02815Sjsg #define THM_BASE__INST0_SEG4                       0
6105ca02815Sjsg 
6115ca02815Sjsg #define THM_BASE__INST1_SEG0                       0
6125ca02815Sjsg #define THM_BASE__INST1_SEG1                       0
6135ca02815Sjsg #define THM_BASE__INST1_SEG2                       0
6145ca02815Sjsg #define THM_BASE__INST1_SEG3                       0
6155ca02815Sjsg #define THM_BASE__INST1_SEG4                       0
6165ca02815Sjsg 
6175ca02815Sjsg #define THM_BASE__INST2_SEG0                       0
6185ca02815Sjsg #define THM_BASE__INST2_SEG1                       0
6195ca02815Sjsg #define THM_BASE__INST2_SEG2                       0
6205ca02815Sjsg #define THM_BASE__INST2_SEG3                       0
6215ca02815Sjsg #define THM_BASE__INST2_SEG4                       0
6225ca02815Sjsg 
6235ca02815Sjsg #define THM_BASE__INST3_SEG0                       0
6245ca02815Sjsg #define THM_BASE__INST3_SEG1                       0
6255ca02815Sjsg #define THM_BASE__INST3_SEG2                       0
6265ca02815Sjsg #define THM_BASE__INST3_SEG3                       0
6275ca02815Sjsg #define THM_BASE__INST3_SEG4                       0
6285ca02815Sjsg 
6295ca02815Sjsg #define THM_BASE__INST4_SEG0                       0
6305ca02815Sjsg #define THM_BASE__INST4_SEG1                       0
6315ca02815Sjsg #define THM_BASE__INST4_SEG2                       0
6325ca02815Sjsg #define THM_BASE__INST4_SEG3                       0
6335ca02815Sjsg #define THM_BASE__INST4_SEG4                       0
6345ca02815Sjsg 
6355ca02815Sjsg #define THM_BASE__INST5_SEG0                       0
6365ca02815Sjsg #define THM_BASE__INST5_SEG1                       0
6375ca02815Sjsg #define THM_BASE__INST5_SEG2                       0
6385ca02815Sjsg #define THM_BASE__INST5_SEG3                       0
6395ca02815Sjsg #define THM_BASE__INST5_SEG4                       0
6405ca02815Sjsg 
6415ca02815Sjsg #define UMC0_BASE__INST0_SEG0                      0x00014000
6425ca02815Sjsg #define UMC0_BASE__INST0_SEG1                      0
6435ca02815Sjsg #define UMC0_BASE__INST0_SEG2                      0
6445ca02815Sjsg #define UMC0_BASE__INST0_SEG3                      0
6455ca02815Sjsg #define UMC0_BASE__INST0_SEG4                      0
6465ca02815Sjsg 
6475ca02815Sjsg #define UMC0_BASE__INST1_SEG0                      0
6485ca02815Sjsg #define UMC0_BASE__INST1_SEG1                      0
6495ca02815Sjsg #define UMC0_BASE__INST1_SEG2                      0
6505ca02815Sjsg #define UMC0_BASE__INST1_SEG3                      0
6515ca02815Sjsg #define UMC0_BASE__INST1_SEG4                      0
6525ca02815Sjsg 
6535ca02815Sjsg #define UMC0_BASE__INST2_SEG0                      0
6545ca02815Sjsg #define UMC0_BASE__INST2_SEG1                      0
6555ca02815Sjsg #define UMC0_BASE__INST2_SEG2                      0
6565ca02815Sjsg #define UMC0_BASE__INST2_SEG3                      0
6575ca02815Sjsg #define UMC0_BASE__INST2_SEG4                      0
6585ca02815Sjsg 
6595ca02815Sjsg #define UMC0_BASE__INST3_SEG0                      0
6605ca02815Sjsg #define UMC0_BASE__INST3_SEG1                      0
6615ca02815Sjsg #define UMC0_BASE__INST3_SEG2                      0
6625ca02815Sjsg #define UMC0_BASE__INST3_SEG3                      0
6635ca02815Sjsg #define UMC0_BASE__INST3_SEG4                      0
6645ca02815Sjsg 
6655ca02815Sjsg #define UMC0_BASE__INST4_SEG0                      0
6665ca02815Sjsg #define UMC0_BASE__INST4_SEG1                      0
6675ca02815Sjsg #define UMC0_BASE__INST4_SEG2                      0
6685ca02815Sjsg #define UMC0_BASE__INST4_SEG3                      0
6695ca02815Sjsg #define UMC0_BASE__INST4_SEG4                      0
6705ca02815Sjsg 
6715ca02815Sjsg #define UMC0_BASE__INST5_SEG0                      0
6725ca02815Sjsg #define UMC0_BASE__INST5_SEG1                      0
6735ca02815Sjsg #define UMC0_BASE__INST5_SEG2                      0
6745ca02815Sjsg #define UMC0_BASE__INST5_SEG3                      0
6755ca02815Sjsg #define UMC0_BASE__INST5_SEG4                      0
6765ca02815Sjsg 
6775ca02815Sjsg #define UVD0_BASE__INST0_SEG0                      0x00007800
6785ca02815Sjsg #define UVD0_BASE__INST0_SEG1                      0x00007E00
6795ca02815Sjsg #define UVD0_BASE__INST0_SEG2                      0
6805ca02815Sjsg #define UVD0_BASE__INST0_SEG3                      0
6815ca02815Sjsg #define UVD0_BASE__INST0_SEG4                      0
6825ca02815Sjsg 
6835ca02815Sjsg #define UVD0_BASE__INST1_SEG0                      0
6845ca02815Sjsg #define UVD0_BASE__INST1_SEG1                      0
6855ca02815Sjsg #define UVD0_BASE__INST1_SEG2                      0
6865ca02815Sjsg #define UVD0_BASE__INST1_SEG3                      0
6875ca02815Sjsg #define UVD0_BASE__INST1_SEG4                      0
6885ca02815Sjsg 
6895ca02815Sjsg #define UVD0_BASE__INST2_SEG0                      0
6905ca02815Sjsg #define UVD0_BASE__INST2_SEG1                      0
6915ca02815Sjsg #define UVD0_BASE__INST2_SEG2                      0
6925ca02815Sjsg #define UVD0_BASE__INST2_SEG3                      0
6935ca02815Sjsg #define UVD0_BASE__INST2_SEG4                      0
6945ca02815Sjsg 
6955ca02815Sjsg #define UVD0_BASE__INST3_SEG0                      0
6965ca02815Sjsg #define UVD0_BASE__INST3_SEG1                      0
6975ca02815Sjsg #define UVD0_BASE__INST3_SEG2                      0
6985ca02815Sjsg #define UVD0_BASE__INST3_SEG3                      0
6995ca02815Sjsg #define UVD0_BASE__INST3_SEG4                      0
7005ca02815Sjsg 
7015ca02815Sjsg #define UVD0_BASE__INST4_SEG0                      0
7025ca02815Sjsg #define UVD0_BASE__INST4_SEG1                      0
7035ca02815Sjsg #define UVD0_BASE__INST4_SEG2                      0
7045ca02815Sjsg #define UVD0_BASE__INST4_SEG3                      0
7055ca02815Sjsg #define UVD0_BASE__INST4_SEG4                      0
7065ca02815Sjsg 
7075ca02815Sjsg #define UVD0_BASE__INST5_SEG0                      0
7085ca02815Sjsg #define UVD0_BASE__INST5_SEG1                      0
7095ca02815Sjsg #define UVD0_BASE__INST5_SEG2                      0
7105ca02815Sjsg #define UVD0_BASE__INST5_SEG3                      0
7115ca02815Sjsg #define UVD0_BASE__INST5_SEG4                      0
7125ca02815Sjsg 
7135ca02815Sjsg #endif
7145ca02815Sjsg 
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