xref: /openbsd-src/sys/dev/pci/drm/amd/include/arct_ip_offset.h (revision 5ca02815211fc20fa71222bf4e6148b043e505b3)
1c349dbc7Sjsg /*
2c349dbc7Sjsg  * Copyright (C) 2018  Advanced Micro Devices, Inc.
3c349dbc7Sjsg  *
4c349dbc7Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
5c349dbc7Sjsg  * copy of this software and associated documentation files (the "Software"),
6c349dbc7Sjsg  * to deal in the Software without restriction, including without limitation
7c349dbc7Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c349dbc7Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
9c349dbc7Sjsg  * Software is furnished to do so, subject to the following conditions:
10c349dbc7Sjsg  *
11c349dbc7Sjsg  * The above copyright notice and this permission notice shall be included
12c349dbc7Sjsg  * in all copies or substantial portions of the Software.
13c349dbc7Sjsg  *
14c349dbc7Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15c349dbc7Sjsg  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16c349dbc7Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17c349dbc7Sjsg  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18c349dbc7Sjsg  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19c349dbc7Sjsg  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20c349dbc7Sjsg  */
21c349dbc7Sjsg #ifndef _arct_ip_offset_HEADER
22c349dbc7Sjsg #define _arct_ip_offset_HEADER
23c349dbc7Sjsg 
24c349dbc7Sjsg #define MAX_INSTANCE                                       8
25c349dbc7Sjsg #define MAX_SEGMENT                                         6
26c349dbc7Sjsg 
27c349dbc7Sjsg 
28c349dbc7Sjsg struct IP_BASE_INSTANCE
29c349dbc7Sjsg {
30c349dbc7Sjsg     unsigned int segment[MAX_SEGMENT];
31*5ca02815Sjsg } __maybe_unused;
32c349dbc7Sjsg 
33c349dbc7Sjsg struct IP_BASE
34c349dbc7Sjsg {
35c349dbc7Sjsg     struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
36*5ca02815Sjsg } __maybe_unused;
37c349dbc7Sjsg 
38c349dbc7Sjsg 
39c349dbc7Sjsg static const struct IP_BASE ATHUB_BASE            ={ { { { 0x00000C20, 0x00012460, 0x00408C00, 0, 0, 0 } },
40c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
41c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
42c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
43c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
44c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
45c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
46c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
47c349dbc7Sjsg static const struct IP_BASE CLK_BASE            ={ { { { 0x000120C0, 0x00016C00, 0x00401800, 0, 0, 0 } },
48c349dbc7Sjsg                                         { { 0x000120E0, 0x00016E00, 0x00401C00, 0, 0, 0 } },
49c349dbc7Sjsg                                         { { 0x00012100, 0x00017000, 0x00402000, 0, 0, 0 } },
50c349dbc7Sjsg                                         { { 0x00012120, 0x00017200, 0x00402400, 0, 0, 0 } },
51c349dbc7Sjsg                                         { { 0x000136C0, 0x0001B000, 0x0042D800, 0, 0, 0 } },
52c349dbc7Sjsg                                         { { 0x00013720, 0x0001B200, 0x0042E400, 0, 0, 0 } },
53c349dbc7Sjsg                                         { { 0x000125E0, 0x00017E00, 0x0040BC00, 0, 0, 0 } },
54c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
55c349dbc7Sjsg static const struct IP_BASE DF_BASE            ={ { { { 0x00007000, 0x000125C0, 0x0040B800, 0, 0, 0 } },
56c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
57c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
58c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
59c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
60c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
61c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
62c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
63c349dbc7Sjsg static const struct IP_BASE FUSE_BASE            ={ { { { 0x000120A0, 0x00017400, 0x00401400, 0, 0, 0 } },
64c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
65c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
66c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
67c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
68c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
69c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
70c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
71c349dbc7Sjsg static const struct IP_BASE GC_BASE            ={ { { { 0x00002000, 0x0000A000, 0x00012160, 0x00402C00, 0, 0 } },
72c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
73c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
74c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
75c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
76c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
77c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
78c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
79c349dbc7Sjsg static const struct IP_BASE HDP_BASE            ={ { { { 0x00000F20, 0x00012520, 0x0040A400, 0, 0, 0 } },
80c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
81c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
82c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
83c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
84c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
85c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
86c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
87c349dbc7Sjsg static const struct IP_BASE MMHUB_BASE            ={ { { { 0x00012440, 0x0001A000, 0x00408800, 0, 0, 0 } },
88c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
89c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
90c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
91c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
92c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
93c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
94c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
95c349dbc7Sjsg static const struct IP_BASE MP0_BASE            ={ { { { 0x00016000, 0, 0, 0, 0, 0 } },
96c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
97c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
98c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
99c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
100c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
101c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
102c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
103c349dbc7Sjsg static const struct IP_BASE MP1_BASE            ={ { { { 0x00016000, 0, 0, 0, 0, 0 } },
104c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
105c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
106c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
107c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
108c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
109c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
110c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
111c349dbc7Sjsg static const struct IP_BASE NBIF0_BASE            ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x00012D80, 0x0041B000 } },
112c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
113c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
114c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
115c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
116c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
117c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
118c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
119c349dbc7Sjsg static const struct IP_BASE OSSSYS_BASE            ={ { { { 0x000010A0, 0x00012500, 0x0040A000, 0, 0, 0 } },
120c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
121c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
122c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
123c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
124c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
125c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
126c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
127c349dbc7Sjsg static const struct IP_BASE PCIE0_BASE            ={ { { { 0x000128C0, 0x00411800, 0x04440000, 0, 0, 0 } },
128c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
129c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
130c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
131c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
132c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
133c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
134c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
135c349dbc7Sjsg static const struct IP_BASE SDMA0_BASE            ={ { { { 0x00001260, 0x00012540, 0x0040A800, 0, 0, 0 } },
136c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
137c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
138c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
139c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
140c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
141c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
142c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
143c349dbc7Sjsg static const struct IP_BASE SDMA1_BASE            ={ { { { 0x00001860, 0x00012560, 0x0040AC00, 0, 0, 0 } },
144c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
145c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
146c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
147c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
148c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
149c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
150c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
151c349dbc7Sjsg static const struct IP_BASE SDMA2_BASE            ={ { { { 0x00013760, 0x0001E000, 0x0042EC00, 0, 0, 0 } },
152c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
153c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
154c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
155c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
156c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
157c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
158c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
159c349dbc7Sjsg static const struct IP_BASE SDMA3_BASE            ={ { { { 0x00013780, 0x0001E400, 0x0042F000, 0, 0, 0 } },
160c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
161c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
162c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
163c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
164c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
165c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
166c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
167c349dbc7Sjsg static const struct IP_BASE SDMA4_BASE            ={ { { { 0x000137A0, 0x0001E800, 0x0042F400, 0, 0, 0 } },
168c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
169c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
170c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
171c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
172c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
173c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
174c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
175c349dbc7Sjsg static const struct IP_BASE SDMA5_BASE            ={ { { { 0x000137C0, 0x0001EC00, 0x0042F800, 0, 0, 0 } },
176c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
177c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
178c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
179c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
180c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
181c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
182c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
183c349dbc7Sjsg static const struct IP_BASE SDMA6_BASE            ={ { { { 0x000137E0, 0x0001F000, 0x0042FC00, 0, 0, 0 } },
184c349dbc7Sjsg                                        { { 0, 0, 0, 0, 0, 0 } },
185c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
186c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
187c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
188c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
189c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
190c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
191c349dbc7Sjsg static const struct IP_BASE SDMA7_BASE            ={ { { { 0x00013800, 0x0001F400, 0x00430000, 0, 0, 0 } },
192c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
193c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
194c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
195c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
196c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
197c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
198c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
199c349dbc7Sjsg static const struct IP_BASE SMUIO_BASE            ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } },
200c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
201c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
202c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
203c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
204c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
205c349dbc7Sjsg static const struct IP_BASE THM_BASE            ={ { { { 0x00016600, 0, 0, 0, 0, 0 } },
206c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
207c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
208c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
209c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
210c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
211c349dbc7Sjsg static const struct IP_BASE UMC_BASE            ={ { { { 0x000132C0, 0x00014000, 0x00425800, 0, 0, 0 } },
212c349dbc7Sjsg                                         { { 0x000132E0, 0x00054000, 0x00425C00, 0, 0, 0 } },
213c349dbc7Sjsg                                         { { 0x00013300, 0x00094000, 0x00426000, 0, 0, 0 } },
214c349dbc7Sjsg                                         { { 0x00013320, 0x000D4000, 0x00426400, 0, 0, 0 } },
215c349dbc7Sjsg                                         { { 0x00013340, 0x00114000, 0x00426800, 0, 0, 0 } },
216c349dbc7Sjsg                                         { { 0x00013360, 0x00154000, 0x00426C00, 0, 0, 0 } },
217c349dbc7Sjsg                                         { { 0x00013380, 0x00194000, 0x00427000, 0, 0, 0 } },
218c349dbc7Sjsg                                         { { 0x000133A0, 0x001D4000, 0x00427400, 0, 0, 0 } } } };
219c349dbc7Sjsg static const struct IP_BASE UVD_BASE            ={ { { { 0x00007800, 0x00007E00, 0x00012180, 0x00403000, 0, 0 } },
220c349dbc7Sjsg                                         { { 0x00007A00, 0x00009000, 0x000136E0, 0x0042DC00, 0, 0 } },
221c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
222c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
223c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
224c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
225c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
226c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
227c349dbc7Sjsg static const struct IP_BASE DBGU_IO_BASE            ={ { { { 0x000001E0, 0x000125A0, 0x0040B400, 0, 0, 0 } },
228c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
229c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
230c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
231c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
232c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
233c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
234c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
235c349dbc7Sjsg static const struct IP_BASE RSMU_BASE            ={ { { { 0x00012000, 0, 0, 0, 0, 0 } },
236c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
237c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
238c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
239c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
240c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
241c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } },
242c349dbc7Sjsg                                         { { 0, 0, 0, 0, 0, 0 } } } };
243c349dbc7Sjsg 
244c349dbc7Sjsg 
245c349dbc7Sjsg 
246c349dbc7Sjsg #define ATHUB_BASE__INST0_SEG0                     0x00000C20
247c349dbc7Sjsg #define ATHUB_BASE__INST0_SEG1                     0x00012460
248c349dbc7Sjsg #define ATHUB_BASE__INST0_SEG2                     0x00408C00
249c349dbc7Sjsg #define ATHUB_BASE__INST0_SEG3                     0
250c349dbc7Sjsg #define ATHUB_BASE__INST0_SEG4                     0
251c349dbc7Sjsg #define ATHUB_BASE__INST0_SEG5                     0
252c349dbc7Sjsg 
253c349dbc7Sjsg #define ATHUB_BASE__INST1_SEG0                     0
254c349dbc7Sjsg #define ATHUB_BASE__INST1_SEG1                     0
255c349dbc7Sjsg #define ATHUB_BASE__INST1_SEG2                     0
256c349dbc7Sjsg #define ATHUB_BASE__INST1_SEG3                     0
257c349dbc7Sjsg #define ATHUB_BASE__INST1_SEG4                     0
258c349dbc7Sjsg #define ATHUB_BASE__INST1_SEG5                     0
259c349dbc7Sjsg 
260c349dbc7Sjsg #define ATHUB_BASE__INST2_SEG0                     0
261c349dbc7Sjsg #define ATHUB_BASE__INST2_SEG1                     0
262c349dbc7Sjsg #define ATHUB_BASE__INST2_SEG2                     0
263c349dbc7Sjsg #define ATHUB_BASE__INST2_SEG3                     0
264c349dbc7Sjsg #define ATHUB_BASE__INST2_SEG4                     0
265c349dbc7Sjsg #define ATHUB_BASE__INST2_SEG5                     0
266c349dbc7Sjsg 
267c349dbc7Sjsg #define ATHUB_BASE__INST3_SEG0                     0
268c349dbc7Sjsg #define ATHUB_BASE__INST3_SEG1                     0
269c349dbc7Sjsg #define ATHUB_BASE__INST3_SEG2                     0
270c349dbc7Sjsg #define ATHUB_BASE__INST3_SEG3                     0
271c349dbc7Sjsg #define ATHUB_BASE__INST3_SEG4                     0
272c349dbc7Sjsg #define ATHUB_BASE__INST3_SEG5                     0
273c349dbc7Sjsg 
274c349dbc7Sjsg #define ATHUB_BASE__INST4_SEG0                     0
275c349dbc7Sjsg #define ATHUB_BASE__INST4_SEG1                     0
276c349dbc7Sjsg #define ATHUB_BASE__INST4_SEG2                     0
277c349dbc7Sjsg #define ATHUB_BASE__INST4_SEG3                     0
278c349dbc7Sjsg #define ATHUB_BASE__INST4_SEG4                     0
279c349dbc7Sjsg #define ATHUB_BASE__INST4_SEG5                     0
280c349dbc7Sjsg 
281c349dbc7Sjsg #define ATHUB_BASE__INST5_SEG0                     0
282c349dbc7Sjsg #define ATHUB_BASE__INST5_SEG1                     0
283c349dbc7Sjsg #define ATHUB_BASE__INST5_SEG2                     0
284c349dbc7Sjsg #define ATHUB_BASE__INST5_SEG3                     0
285c349dbc7Sjsg #define ATHUB_BASE__INST5_SEG4                     0
286c349dbc7Sjsg #define ATHUB_BASE__INST5_SEG5                     0
287c349dbc7Sjsg 
288c349dbc7Sjsg #define ATHUB_BASE__INST6_SEG0                     0
289c349dbc7Sjsg #define ATHUB_BASE__INST6_SEG1                     0
290c349dbc7Sjsg #define ATHUB_BASE__INST6_SEG2                     0
291c349dbc7Sjsg #define ATHUB_BASE__INST6_SEG3                     0
292c349dbc7Sjsg #define ATHUB_BASE__INST6_SEG4                     0
293c349dbc7Sjsg #define ATHUB_BASE__INST6_SEG5                     0
294c349dbc7Sjsg 
295c349dbc7Sjsg #define ATHUB_BASE__INST7_SEG0                     0
296c349dbc7Sjsg #define ATHUB_BASE__INST7_SEG1                     0
297c349dbc7Sjsg #define ATHUB_BASE__INST7_SEG2                     0
298c349dbc7Sjsg #define ATHUB_BASE__INST7_SEG3                     0
299c349dbc7Sjsg #define ATHUB_BASE__INST7_SEG4                     0
300c349dbc7Sjsg #define ATHUB_BASE__INST7_SEG5                     0
301c349dbc7Sjsg 
302c349dbc7Sjsg #define CLK_BASE__INST0_SEG0                       0x000120C0
303c349dbc7Sjsg #define CLK_BASE__INST0_SEG1                       0x00016C00
304c349dbc7Sjsg #define CLK_BASE__INST0_SEG2                       0x00401800
305c349dbc7Sjsg #define CLK_BASE__INST0_SEG3                       0
306c349dbc7Sjsg #define CLK_BASE__INST0_SEG4                       0
307c349dbc7Sjsg #define CLK_BASE__INST0_SEG5                       0
308c349dbc7Sjsg 
309c349dbc7Sjsg #define CLK_BASE__INST1_SEG0                       0x000120E0
310c349dbc7Sjsg #define CLK_BASE__INST1_SEG1                       0x00016E00
311c349dbc7Sjsg #define CLK_BASE__INST1_SEG2                       0x00401C00
312c349dbc7Sjsg #define CLK_BASE__INST1_SEG3                       0
313c349dbc7Sjsg #define CLK_BASE__INST1_SEG4                       0
314c349dbc7Sjsg #define CLK_BASE__INST1_SEG5                       0
315c349dbc7Sjsg 
316c349dbc7Sjsg #define CLK_BASE__INST2_SEG0                       0x00012100
317c349dbc7Sjsg #define CLK_BASE__INST2_SEG1                       0x00017000
318c349dbc7Sjsg #define CLK_BASE__INST2_SEG2                       0x00402000
319c349dbc7Sjsg #define CLK_BASE__INST2_SEG3                       0
320c349dbc7Sjsg #define CLK_BASE__INST2_SEG4                       0
321c349dbc7Sjsg #define CLK_BASE__INST2_SEG5                       0
322c349dbc7Sjsg 
323c349dbc7Sjsg #define CLK_BASE__INST3_SEG0                       0x00012120
324c349dbc7Sjsg #define CLK_BASE__INST3_SEG1                       0x00017200
325c349dbc7Sjsg #define CLK_BASE__INST3_SEG2                       0x00402400
326c349dbc7Sjsg #define CLK_BASE__INST3_SEG3                       0
327c349dbc7Sjsg #define CLK_BASE__INST3_SEG4                       0
328c349dbc7Sjsg #define CLK_BASE__INST3_SEG5                       0
329c349dbc7Sjsg 
330c349dbc7Sjsg #define CLK_BASE__INST4_SEG0                       0x000136C0
331c349dbc7Sjsg #define CLK_BASE__INST4_SEG1                       0x0001B000
332c349dbc7Sjsg #define CLK_BASE__INST4_SEG2                       0x0042D800
333c349dbc7Sjsg #define CLK_BASE__INST4_SEG3                       0
334c349dbc7Sjsg #define CLK_BASE__INST4_SEG4                       0
335c349dbc7Sjsg #define CLK_BASE__INST4_SEG5                       0
336c349dbc7Sjsg 
337c349dbc7Sjsg #define CLK_BASE__INST5_SEG0                       0x00013720
338c349dbc7Sjsg #define CLK_BASE__INST5_SEG1                       0x0001B200
339c349dbc7Sjsg #define CLK_BASE__INST5_SEG2                       0x0042E400
340c349dbc7Sjsg #define CLK_BASE__INST5_SEG3                       0
341c349dbc7Sjsg #define CLK_BASE__INST5_SEG4                       0
342c349dbc7Sjsg #define CLK_BASE__INST5_SEG5                       0
343c349dbc7Sjsg 
344c349dbc7Sjsg #define CLK_BASE__INST6_SEG0                       0x000125E0
345c349dbc7Sjsg #define CLK_BASE__INST6_SEG1                       0x00017E00
346c349dbc7Sjsg #define CLK_BASE__INST6_SEG2                       0x0040BC00
347c349dbc7Sjsg #define CLK_BASE__INST6_SEG3                       0
348c349dbc7Sjsg #define CLK_BASE__INST6_SEG4                       0
349c349dbc7Sjsg #define CLK_BASE__INST6_SEG5                       0
350c349dbc7Sjsg 
351c349dbc7Sjsg #define CLK_BASE__INST7_SEG0                       0
352c349dbc7Sjsg #define CLK_BASE__INST7_SEG1                       0
353c349dbc7Sjsg #define CLK_BASE__INST7_SEG2                       0
354c349dbc7Sjsg #define CLK_BASE__INST7_SEG3                       0
355c349dbc7Sjsg #define CLK_BASE__INST7_SEG4                       0
356c349dbc7Sjsg #define CLK_BASE__INST7_SEG5                       0
357c349dbc7Sjsg 
358c349dbc7Sjsg #define DF_BASE__INST0_SEG0                        0x00007000
359c349dbc7Sjsg #define DF_BASE__INST0_SEG1                        0x000125C0
360c349dbc7Sjsg #define DF_BASE__INST0_SEG2                        0x0040B800
361c349dbc7Sjsg #define DF_BASE__INST0_SEG3                        0
362c349dbc7Sjsg #define DF_BASE__INST0_SEG4                        0
363c349dbc7Sjsg #define DF_BASE__INST0_SEG5                        0
364c349dbc7Sjsg 
365c349dbc7Sjsg #define DF_BASE__INST1_SEG0                        0
366c349dbc7Sjsg #define DF_BASE__INST1_SEG1                        0
367c349dbc7Sjsg #define DF_BASE__INST1_SEG2                        0
368c349dbc7Sjsg #define DF_BASE__INST1_SEG3                        0
369c349dbc7Sjsg #define DF_BASE__INST1_SEG4                        0
370c349dbc7Sjsg #define DF_BASE__INST1_SEG5                        0
371c349dbc7Sjsg 
372c349dbc7Sjsg #define DF_BASE__INST2_SEG0                        0
373c349dbc7Sjsg #define DF_BASE__INST2_SEG1                        0
374c349dbc7Sjsg #define DF_BASE__INST2_SEG2                        0
375c349dbc7Sjsg #define DF_BASE__INST2_SEG3                        0
376c349dbc7Sjsg #define DF_BASE__INST2_SEG4                        0
377c349dbc7Sjsg #define DF_BASE__INST2_SEG5                        0
378c349dbc7Sjsg 
379c349dbc7Sjsg #define DF_BASE__INST3_SEG0                        0
380c349dbc7Sjsg #define DF_BASE__INST3_SEG1                        0
381c349dbc7Sjsg #define DF_BASE__INST3_SEG2                        0
382c349dbc7Sjsg #define DF_BASE__INST3_SEG3                        0
383c349dbc7Sjsg #define DF_BASE__INST3_SEG4                        0
384c349dbc7Sjsg #define DF_BASE__INST3_SEG5                        0
385c349dbc7Sjsg 
386c349dbc7Sjsg #define DF_BASE__INST4_SEG0                        0
387c349dbc7Sjsg #define DF_BASE__INST4_SEG1                        0
388c349dbc7Sjsg #define DF_BASE__INST4_SEG2                        0
389c349dbc7Sjsg #define DF_BASE__INST4_SEG3                        0
390c349dbc7Sjsg #define DF_BASE__INST4_SEG4                        0
391c349dbc7Sjsg #define DF_BASE__INST4_SEG5                        0
392c349dbc7Sjsg 
393c349dbc7Sjsg #define DF_BASE__INST5_SEG0                        0
394c349dbc7Sjsg #define DF_BASE__INST5_SEG1                        0
395c349dbc7Sjsg #define DF_BASE__INST5_SEG2                        0
396c349dbc7Sjsg #define DF_BASE__INST5_SEG3                        0
397c349dbc7Sjsg #define DF_BASE__INST5_SEG4                        0
398c349dbc7Sjsg #define DF_BASE__INST5_SEG5                        0
399c349dbc7Sjsg 
400c349dbc7Sjsg #define DF_BASE__INST6_SEG0                        0
401c349dbc7Sjsg #define DF_BASE__INST6_SEG1                        0
402c349dbc7Sjsg #define DF_BASE__INST6_SEG2                        0
403c349dbc7Sjsg #define DF_BASE__INST6_SEG3                        0
404c349dbc7Sjsg #define DF_BASE__INST6_SEG4                        0
405c349dbc7Sjsg #define DF_BASE__INST6_SEG5                        0
406c349dbc7Sjsg 
407c349dbc7Sjsg #define DF_BASE__INST7_SEG0                        0
408c349dbc7Sjsg #define DF_BASE__INST7_SEG1                        0
409c349dbc7Sjsg #define DF_BASE__INST7_SEG2                        0
410c349dbc7Sjsg #define DF_BASE__INST7_SEG3                        0
411c349dbc7Sjsg #define DF_BASE__INST7_SEG4                        0
412c349dbc7Sjsg #define DF_BASE__INST7_SEG5                        0
413c349dbc7Sjsg 
414c349dbc7Sjsg #define FUSE_BASE__INST0_SEG0                      0x000120A0
415c349dbc7Sjsg #define FUSE_BASE__INST0_SEG1                      0x00017400
416c349dbc7Sjsg #define FUSE_BASE__INST0_SEG2                      0x00401400
417c349dbc7Sjsg #define FUSE_BASE__INST0_SEG3                      0
418c349dbc7Sjsg #define FUSE_BASE__INST0_SEG4                      0
419c349dbc7Sjsg #define FUSE_BASE__INST0_SEG5                      0
420c349dbc7Sjsg 
421c349dbc7Sjsg #define FUSE_BASE__INST1_SEG0                      0
422c349dbc7Sjsg #define FUSE_BASE__INST1_SEG1                      0
423c349dbc7Sjsg #define FUSE_BASE__INST1_SEG2                      0
424c349dbc7Sjsg #define FUSE_BASE__INST1_SEG3                      0
425c349dbc7Sjsg #define FUSE_BASE__INST1_SEG4                      0
426c349dbc7Sjsg #define FUSE_BASE__INST1_SEG5                      0
427c349dbc7Sjsg 
428c349dbc7Sjsg #define FUSE_BASE__INST2_SEG0                      0
429c349dbc7Sjsg #define FUSE_BASE__INST2_SEG1                      0
430c349dbc7Sjsg #define FUSE_BASE__INST2_SEG2                      0
431c349dbc7Sjsg #define FUSE_BASE__INST2_SEG3                      0
432c349dbc7Sjsg #define FUSE_BASE__INST2_SEG4                      0
433c349dbc7Sjsg #define FUSE_BASE__INST2_SEG5                      0
434c349dbc7Sjsg 
435c349dbc7Sjsg #define FUSE_BASE__INST3_SEG0                      0
436c349dbc7Sjsg #define FUSE_BASE__INST3_SEG1                      0
437c349dbc7Sjsg #define FUSE_BASE__INST3_SEG2                      0
438c349dbc7Sjsg #define FUSE_BASE__INST3_SEG3                      0
439c349dbc7Sjsg #define FUSE_BASE__INST3_SEG4                      0
440c349dbc7Sjsg #define FUSE_BASE__INST3_SEG5                      0
441c349dbc7Sjsg 
442c349dbc7Sjsg #define FUSE_BASE__INST4_SEG0                      0
443c349dbc7Sjsg #define FUSE_BASE__INST4_SEG1                      0
444c349dbc7Sjsg #define FUSE_BASE__INST4_SEG2                      0
445c349dbc7Sjsg #define FUSE_BASE__INST4_SEG3                      0
446c349dbc7Sjsg #define FUSE_BASE__INST4_SEG4                      0
447c349dbc7Sjsg #define FUSE_BASE__INST4_SEG5                      0
448c349dbc7Sjsg 
449c349dbc7Sjsg #define FUSE_BASE__INST5_SEG0                      0
450c349dbc7Sjsg #define FUSE_BASE__INST5_SEG1                      0
451c349dbc7Sjsg #define FUSE_BASE__INST5_SEG2                      0
452c349dbc7Sjsg #define FUSE_BASE__INST5_SEG3                      0
453c349dbc7Sjsg #define FUSE_BASE__INST5_SEG4                      0
454c349dbc7Sjsg #define FUSE_BASE__INST5_SEG5                      0
455c349dbc7Sjsg 
456c349dbc7Sjsg #define FUSE_BASE__INST6_SEG0                      0
457c349dbc7Sjsg #define FUSE_BASE__INST6_SEG1                      0
458c349dbc7Sjsg #define FUSE_BASE__INST6_SEG2                      0
459c349dbc7Sjsg #define FUSE_BASE__INST6_SEG3                      0
460c349dbc7Sjsg #define FUSE_BASE__INST6_SEG4                      0
461c349dbc7Sjsg #define FUSE_BASE__INST6_SEG5                      0
462c349dbc7Sjsg 
463c349dbc7Sjsg #define FUSE_BASE__INST7_SEG0                      0
464c349dbc7Sjsg #define FUSE_BASE__INST7_SEG1                      0
465c349dbc7Sjsg #define FUSE_BASE__INST7_SEG2                      0
466c349dbc7Sjsg #define FUSE_BASE__INST7_SEG3                      0
467c349dbc7Sjsg #define FUSE_BASE__INST7_SEG4                      0
468c349dbc7Sjsg #define FUSE_BASE__INST7_SEG5                      0
469c349dbc7Sjsg 
470c349dbc7Sjsg #define GC_BASE__INST0_SEG0                        0x00002000
471c349dbc7Sjsg #define GC_BASE__INST0_SEG1                        0x0000A000
472c349dbc7Sjsg #define GC_BASE__INST0_SEG2                        0x00012160
473c349dbc7Sjsg #define GC_BASE__INST0_SEG3                        0x00402C00
474c349dbc7Sjsg #define GC_BASE__INST0_SEG4                        0
475c349dbc7Sjsg #define GC_BASE__INST0_SEG5                        0
476c349dbc7Sjsg 
477c349dbc7Sjsg #define GC_BASE__INST1_SEG0                        0
478c349dbc7Sjsg #define GC_BASE__INST1_SEG1                        0
479c349dbc7Sjsg #define GC_BASE__INST1_SEG2                        0
480c349dbc7Sjsg #define GC_BASE__INST1_SEG3                        0
481c349dbc7Sjsg #define GC_BASE__INST1_SEG4                        0
482c349dbc7Sjsg #define GC_BASE__INST1_SEG5                        0
483c349dbc7Sjsg 
484c349dbc7Sjsg #define GC_BASE__INST2_SEG0                        0
485c349dbc7Sjsg #define GC_BASE__INST2_SEG1                        0
486c349dbc7Sjsg #define GC_BASE__INST2_SEG2                        0
487c349dbc7Sjsg #define GC_BASE__INST2_SEG3                        0
488c349dbc7Sjsg #define GC_BASE__INST2_SEG4                        0
489c349dbc7Sjsg #define GC_BASE__INST2_SEG5                        0
490c349dbc7Sjsg 
491c349dbc7Sjsg #define GC_BASE__INST3_SEG0                        0
492c349dbc7Sjsg #define GC_BASE__INST3_SEG1                        0
493c349dbc7Sjsg #define GC_BASE__INST3_SEG2                        0
494c349dbc7Sjsg #define GC_BASE__INST3_SEG3                        0
495c349dbc7Sjsg #define GC_BASE__INST3_SEG4                        0
496c349dbc7Sjsg #define GC_BASE__INST3_SEG5                        0
497c349dbc7Sjsg 
498c349dbc7Sjsg #define GC_BASE__INST4_SEG0                        0
499c349dbc7Sjsg #define GC_BASE__INST4_SEG1                        0
500c349dbc7Sjsg #define GC_BASE__INST4_SEG2                        0
501c349dbc7Sjsg #define GC_BASE__INST4_SEG3                        0
502c349dbc7Sjsg #define GC_BASE__INST4_SEG4                        0
503c349dbc7Sjsg #define GC_BASE__INST4_SEG5                        0
504c349dbc7Sjsg 
505c349dbc7Sjsg #define GC_BASE__INST5_SEG0                        0
506c349dbc7Sjsg #define GC_BASE__INST5_SEG1                        0
507c349dbc7Sjsg #define GC_BASE__INST5_SEG2                        0
508c349dbc7Sjsg #define GC_BASE__INST5_SEG3                        0
509c349dbc7Sjsg #define GC_BASE__INST5_SEG4                        0
510c349dbc7Sjsg #define GC_BASE__INST5_SEG5                        0
511c349dbc7Sjsg 
512c349dbc7Sjsg #define GC_BASE__INST6_SEG0                        0
513c349dbc7Sjsg #define GC_BASE__INST6_SEG1                        0
514c349dbc7Sjsg #define GC_BASE__INST6_SEG2                        0
515c349dbc7Sjsg #define GC_BASE__INST6_SEG3                        0
516c349dbc7Sjsg #define GC_BASE__INST6_SEG4                        0
517c349dbc7Sjsg #define GC_BASE__INST6_SEG5                        0
518c349dbc7Sjsg 
519c349dbc7Sjsg #define GC_BASE__INST7_SEG0                        0
520c349dbc7Sjsg #define GC_BASE__INST7_SEG1                        0
521c349dbc7Sjsg #define GC_BASE__INST7_SEG2                        0
522c349dbc7Sjsg #define GC_BASE__INST7_SEG3                        0
523c349dbc7Sjsg #define GC_BASE__INST7_SEG4                        0
524c349dbc7Sjsg #define GC_BASE__INST7_SEG5                        0
525c349dbc7Sjsg 
526c349dbc7Sjsg #define HDP_BASE__INST0_SEG0                       0x00000F20
527c349dbc7Sjsg #define HDP_BASE__INST0_SEG1                       0x00012520
528c349dbc7Sjsg #define HDP_BASE__INST0_SEG2                       0x0040A400
529c349dbc7Sjsg #define HDP_BASE__INST0_SEG3                       0
530c349dbc7Sjsg #define HDP_BASE__INST0_SEG4                       0
531c349dbc7Sjsg #define HDP_BASE__INST0_SEG5                       0
532c349dbc7Sjsg 
533c349dbc7Sjsg #define HDP_BASE__INST1_SEG0                       0
534c349dbc7Sjsg #define HDP_BASE__INST1_SEG1                       0
535c349dbc7Sjsg #define HDP_BASE__INST1_SEG2                       0
536c349dbc7Sjsg #define HDP_BASE__INST1_SEG3                       0
537c349dbc7Sjsg #define HDP_BASE__INST1_SEG4                       0
538c349dbc7Sjsg #define HDP_BASE__INST1_SEG5                       0
539c349dbc7Sjsg 
540c349dbc7Sjsg #define HDP_BASE__INST2_SEG0                       0
541c349dbc7Sjsg #define HDP_BASE__INST2_SEG1                       0
542c349dbc7Sjsg #define HDP_BASE__INST2_SEG2                       0
543c349dbc7Sjsg #define HDP_BASE__INST2_SEG3                       0
544c349dbc7Sjsg #define HDP_BASE__INST2_SEG4                       0
545c349dbc7Sjsg #define HDP_BASE__INST2_SEG5                       0
546c349dbc7Sjsg 
547c349dbc7Sjsg #define HDP_BASE__INST3_SEG0                       0
548c349dbc7Sjsg #define HDP_BASE__INST3_SEG1                       0
549c349dbc7Sjsg #define HDP_BASE__INST3_SEG2                       0
550c349dbc7Sjsg #define HDP_BASE__INST3_SEG3                       0
551c349dbc7Sjsg #define HDP_BASE__INST3_SEG4                       0
552c349dbc7Sjsg #define HDP_BASE__INST3_SEG5                       0
553c349dbc7Sjsg 
554c349dbc7Sjsg #define HDP_BASE__INST4_SEG0                       0
555c349dbc7Sjsg #define HDP_BASE__INST4_SEG1                       0
556c349dbc7Sjsg #define HDP_BASE__INST4_SEG2                       0
557c349dbc7Sjsg #define HDP_BASE__INST4_SEG3                       0
558c349dbc7Sjsg #define HDP_BASE__INST4_SEG4                       0
559c349dbc7Sjsg #define HDP_BASE__INST4_SEG5                       0
560c349dbc7Sjsg 
561c349dbc7Sjsg #define HDP_BASE__INST5_SEG0                       0
562c349dbc7Sjsg #define HDP_BASE__INST5_SEG1                       0
563c349dbc7Sjsg #define HDP_BASE__INST5_SEG2                       0
564c349dbc7Sjsg #define HDP_BASE__INST5_SEG3                       0
565c349dbc7Sjsg #define HDP_BASE__INST5_SEG4                       0
566c349dbc7Sjsg #define HDP_BASE__INST5_SEG5                       0
567c349dbc7Sjsg 
568c349dbc7Sjsg #define HDP_BASE__INST6_SEG0                       0
569c349dbc7Sjsg #define HDP_BASE__INST6_SEG1                       0
570c349dbc7Sjsg #define HDP_BASE__INST6_SEG2                       0
571c349dbc7Sjsg #define HDP_BASE__INST6_SEG3                       0
572c349dbc7Sjsg #define HDP_BASE__INST6_SEG4                       0
573c349dbc7Sjsg #define HDP_BASE__INST6_SEG5                       0
574c349dbc7Sjsg 
575c349dbc7Sjsg #define HDP_BASE__INST7_SEG0                       0
576c349dbc7Sjsg #define HDP_BASE__INST7_SEG1                       0
577c349dbc7Sjsg #define HDP_BASE__INST7_SEG2                       0
578c349dbc7Sjsg #define HDP_BASE__INST7_SEG3                       0
579c349dbc7Sjsg #define HDP_BASE__INST7_SEG4                       0
580c349dbc7Sjsg #define HDP_BASE__INST7_SEG5                       0
581c349dbc7Sjsg 
582c349dbc7Sjsg #define MMHUB_BASE__INST0_SEG0                     0x00012440
583c349dbc7Sjsg #define MMHUB_BASE__INST0_SEG1                     0x0001A000
584c349dbc7Sjsg #define MMHUB_BASE__INST0_SEG2                     0x00408800
585c349dbc7Sjsg #define MMHUB_BASE__INST0_SEG3                     0
586c349dbc7Sjsg #define MMHUB_BASE__INST0_SEG4                     0
587c349dbc7Sjsg #define MMHUB_BASE__INST0_SEG5                     0
588c349dbc7Sjsg 
589c349dbc7Sjsg #define MMHUB_BASE__INST1_SEG0                     0
590c349dbc7Sjsg #define MMHUB_BASE__INST1_SEG1                     0
591c349dbc7Sjsg #define MMHUB_BASE__INST1_SEG2                     0
592c349dbc7Sjsg #define MMHUB_BASE__INST1_SEG3                     0
593c349dbc7Sjsg #define MMHUB_BASE__INST1_SEG4                     0
594c349dbc7Sjsg #define MMHUB_BASE__INST1_SEG5                     0
595c349dbc7Sjsg 
596c349dbc7Sjsg #define MMHUB_BASE__INST2_SEG0                     0
597c349dbc7Sjsg #define MMHUB_BASE__INST2_SEG1                     0
598c349dbc7Sjsg #define MMHUB_BASE__INST2_SEG2                     0
599c349dbc7Sjsg #define MMHUB_BASE__INST2_SEG3                     0
600c349dbc7Sjsg #define MMHUB_BASE__INST2_SEG4                     0
601c349dbc7Sjsg #define MMHUB_BASE__INST2_SEG5                     0
602c349dbc7Sjsg 
603c349dbc7Sjsg #define MMHUB_BASE__INST3_SEG0                     0
604c349dbc7Sjsg #define MMHUB_BASE__INST3_SEG1                     0
605c349dbc7Sjsg #define MMHUB_BASE__INST3_SEG2                     0
606c349dbc7Sjsg #define MMHUB_BASE__INST3_SEG3                     0
607c349dbc7Sjsg #define MMHUB_BASE__INST3_SEG4                     0
608c349dbc7Sjsg #define MMHUB_BASE__INST3_SEG5                     0
609c349dbc7Sjsg 
610c349dbc7Sjsg #define MMHUB_BASE__INST4_SEG0                     0
611c349dbc7Sjsg #define MMHUB_BASE__INST4_SEG1                     0
612c349dbc7Sjsg #define MMHUB_BASE__INST4_SEG2                     0
613c349dbc7Sjsg #define MMHUB_BASE__INST4_SEG3                     0
614c349dbc7Sjsg #define MMHUB_BASE__INST4_SEG4                     0
615c349dbc7Sjsg #define MMHUB_BASE__INST4_SEG5                     0
616c349dbc7Sjsg 
617c349dbc7Sjsg #define MMHUB_BASE__INST5_SEG0                     0
618c349dbc7Sjsg #define MMHUB_BASE__INST5_SEG1                     0
619c349dbc7Sjsg #define MMHUB_BASE__INST5_SEG2                     0
620c349dbc7Sjsg #define MMHUB_BASE__INST5_SEG3                     0
621c349dbc7Sjsg #define MMHUB_BASE__INST5_SEG4                     0
622c349dbc7Sjsg #define MMHUB_BASE__INST5_SEG5                     0
623c349dbc7Sjsg 
624c349dbc7Sjsg #define MMHUB_BASE__INST6_SEG0                     0
625c349dbc7Sjsg #define MMHUB_BASE__INST6_SEG1                     0
626c349dbc7Sjsg #define MMHUB_BASE__INST6_SEG2                     0
627c349dbc7Sjsg #define MMHUB_BASE__INST6_SEG3                     0
628c349dbc7Sjsg #define MMHUB_BASE__INST6_SEG4                     0
629c349dbc7Sjsg #define MMHUB_BASE__INST6_SEG5                     0
630c349dbc7Sjsg 
631c349dbc7Sjsg #define MMHUB_BASE__INST7_SEG0                     0
632c349dbc7Sjsg #define MMHUB_BASE__INST7_SEG1                     0
633c349dbc7Sjsg #define MMHUB_BASE__INST7_SEG2                     0
634c349dbc7Sjsg #define MMHUB_BASE__INST7_SEG3                     0
635c349dbc7Sjsg #define MMHUB_BASE__INST7_SEG4                     0
636c349dbc7Sjsg #define MMHUB_BASE__INST7_SEG5                     0
637c349dbc7Sjsg 
638c349dbc7Sjsg #define MP0_BASE__INST0_SEG0                       0x00013FE0
639c349dbc7Sjsg #define MP0_BASE__INST0_SEG1                       0x00016000
640c349dbc7Sjsg #define MP0_BASE__INST0_SEG2                       0x0043FC00
641c349dbc7Sjsg #define MP0_BASE__INST0_SEG3                       0x00DC0000
642c349dbc7Sjsg #define MP0_BASE__INST0_SEG4                       0x00E00000
643c349dbc7Sjsg #define MP0_BASE__INST0_SEG5                       0x00E40000
644c349dbc7Sjsg 
645c349dbc7Sjsg #define MP0_BASE__INST1_SEG0                       0
646c349dbc7Sjsg #define MP0_BASE__INST1_SEG1                       0
647c349dbc7Sjsg #define MP0_BASE__INST1_SEG2                       0
648c349dbc7Sjsg #define MP0_BASE__INST1_SEG3                       0
649c349dbc7Sjsg #define MP0_BASE__INST1_SEG4                       0
650c349dbc7Sjsg #define MP0_BASE__INST1_SEG5                       0
651c349dbc7Sjsg 
652c349dbc7Sjsg #define MP0_BASE__INST2_SEG0                       0
653c349dbc7Sjsg #define MP0_BASE__INST2_SEG1                       0
654c349dbc7Sjsg #define MP0_BASE__INST2_SEG2                       0
655c349dbc7Sjsg #define MP0_BASE__INST2_SEG3                       0
656c349dbc7Sjsg #define MP0_BASE__INST2_SEG4                       0
657c349dbc7Sjsg #define MP0_BASE__INST2_SEG5                       0
658c349dbc7Sjsg 
659c349dbc7Sjsg #define MP0_BASE__INST3_SEG0                       0
660c349dbc7Sjsg #define MP0_BASE__INST3_SEG1                       0
661c349dbc7Sjsg #define MP0_BASE__INST3_SEG2                       0
662c349dbc7Sjsg #define MP0_BASE__INST3_SEG3                       0
663c349dbc7Sjsg #define MP0_BASE__INST3_SEG4                       0
664c349dbc7Sjsg #define MP0_BASE__INST3_SEG5                       0
665c349dbc7Sjsg 
666c349dbc7Sjsg #define MP0_BASE__INST4_SEG0                       0
667c349dbc7Sjsg #define MP0_BASE__INST4_SEG1                       0
668c349dbc7Sjsg #define MP0_BASE__INST4_SEG2                       0
669c349dbc7Sjsg #define MP0_BASE__INST4_SEG3                       0
670c349dbc7Sjsg #define MP0_BASE__INST4_SEG4                       0
671c349dbc7Sjsg #define MP0_BASE__INST4_SEG5                       0
672c349dbc7Sjsg 
673c349dbc7Sjsg #define MP0_BASE__INST5_SEG0                       0
674c349dbc7Sjsg #define MP0_BASE__INST5_SEG1                       0
675c349dbc7Sjsg #define MP0_BASE__INST5_SEG2                       0
676c349dbc7Sjsg #define MP0_BASE__INST5_SEG3                       0
677c349dbc7Sjsg #define MP0_BASE__INST5_SEG4                       0
678c349dbc7Sjsg #define MP0_BASE__INST5_SEG5                       0
679c349dbc7Sjsg 
680c349dbc7Sjsg #define MP0_BASE__INST6_SEG0                       0
681c349dbc7Sjsg #define MP0_BASE__INST6_SEG1                       0
682c349dbc7Sjsg #define MP0_BASE__INST6_SEG2                       0
683c349dbc7Sjsg #define MP0_BASE__INST6_SEG3                       0
684c349dbc7Sjsg #define MP0_BASE__INST6_SEG4                       0
685c349dbc7Sjsg #define MP0_BASE__INST6_SEG5                       0
686c349dbc7Sjsg 
687c349dbc7Sjsg #define MP0_BASE__INST7_SEG0                       0
688c349dbc7Sjsg #define MP0_BASE__INST7_SEG1                       0
689c349dbc7Sjsg #define MP0_BASE__INST7_SEG2                       0
690c349dbc7Sjsg #define MP0_BASE__INST7_SEG3                       0
691c349dbc7Sjsg #define MP0_BASE__INST7_SEG4                       0
692c349dbc7Sjsg #define MP0_BASE__INST7_SEG5                       0
693c349dbc7Sjsg 
694c349dbc7Sjsg #define MP1_BASE__INST0_SEG0                       0x00012020
695c349dbc7Sjsg #define MP1_BASE__INST0_SEG1                       0x00016200
696c349dbc7Sjsg #define MP1_BASE__INST0_SEG2                       0x00400400
697c349dbc7Sjsg #define MP1_BASE__INST0_SEG3                       0x00E80000
698c349dbc7Sjsg #define MP1_BASE__INST0_SEG4                       0x00EC0000
699c349dbc7Sjsg #define MP1_BASE__INST0_SEG5                       0x00F00000
700c349dbc7Sjsg 
701c349dbc7Sjsg #define MP1_BASE__INST1_SEG0                       0
702c349dbc7Sjsg #define MP1_BASE__INST1_SEG1                       0
703c349dbc7Sjsg #define MP1_BASE__INST1_SEG2                       0
704c349dbc7Sjsg #define MP1_BASE__INST1_SEG3                       0
705c349dbc7Sjsg #define MP1_BASE__INST1_SEG4                       0
706c349dbc7Sjsg #define MP1_BASE__INST1_SEG5                       0
707c349dbc7Sjsg 
708c349dbc7Sjsg #define MP1_BASE__INST2_SEG0                       0
709c349dbc7Sjsg #define MP1_BASE__INST2_SEG1                       0
710c349dbc7Sjsg #define MP1_BASE__INST2_SEG2                       0
711c349dbc7Sjsg #define MP1_BASE__INST2_SEG3                       0
712c349dbc7Sjsg #define MP1_BASE__INST2_SEG4                       0
713c349dbc7Sjsg #define MP1_BASE__INST2_SEG5                       0
714c349dbc7Sjsg 
715c349dbc7Sjsg #define MP1_BASE__INST3_SEG0                       0
716c349dbc7Sjsg #define MP1_BASE__INST3_SEG1                       0
717c349dbc7Sjsg #define MP1_BASE__INST3_SEG2                       0
718c349dbc7Sjsg #define MP1_BASE__INST3_SEG3                       0
719c349dbc7Sjsg #define MP1_BASE__INST3_SEG4                       0
720c349dbc7Sjsg #define MP1_BASE__INST3_SEG5                       0
721c349dbc7Sjsg 
722c349dbc7Sjsg #define MP1_BASE__INST4_SEG0                       0
723c349dbc7Sjsg #define MP1_BASE__INST4_SEG1                       0
724c349dbc7Sjsg #define MP1_BASE__INST4_SEG2                       0
725c349dbc7Sjsg #define MP1_BASE__INST4_SEG3                       0
726c349dbc7Sjsg #define MP1_BASE__INST4_SEG4                       0
727c349dbc7Sjsg #define MP1_BASE__INST4_SEG5                       0
728c349dbc7Sjsg 
729c349dbc7Sjsg #define MP1_BASE__INST5_SEG0                       0
730c349dbc7Sjsg #define MP1_BASE__INST5_SEG1                       0
731c349dbc7Sjsg #define MP1_BASE__INST5_SEG2                       0
732c349dbc7Sjsg #define MP1_BASE__INST5_SEG3                       0
733c349dbc7Sjsg #define MP1_BASE__INST5_SEG4                       0
734c349dbc7Sjsg #define MP1_BASE__INST5_SEG5                       0
735c349dbc7Sjsg 
736c349dbc7Sjsg #define MP1_BASE__INST6_SEG0                       0
737c349dbc7Sjsg #define MP1_BASE__INST6_SEG1                       0
738c349dbc7Sjsg #define MP1_BASE__INST6_SEG2                       0
739c349dbc7Sjsg #define MP1_BASE__INST6_SEG3                       0
740c349dbc7Sjsg #define MP1_BASE__INST6_SEG4                       0
741c349dbc7Sjsg #define MP1_BASE__INST6_SEG5                       0
742c349dbc7Sjsg 
743c349dbc7Sjsg #define MP1_BASE__INST7_SEG0                       0
744c349dbc7Sjsg #define MP1_BASE__INST7_SEG1                       0
745c349dbc7Sjsg #define MP1_BASE__INST7_SEG2                       0
746c349dbc7Sjsg #define MP1_BASE__INST7_SEG3                       0
747c349dbc7Sjsg #define MP1_BASE__INST7_SEG4                       0
748c349dbc7Sjsg #define MP1_BASE__INST7_SEG5                       0
749c349dbc7Sjsg 
750c349dbc7Sjsg #define NBIF0_BASE__INST0_SEG0                     0x00000000
751c349dbc7Sjsg #define NBIF0_BASE__INST0_SEG1                     0x00000014
752c349dbc7Sjsg #define NBIF0_BASE__INST0_SEG2                     0x00000D20
753c349dbc7Sjsg #define NBIF0_BASE__INST0_SEG3                     0x00010400
754c349dbc7Sjsg #define NBIF0_BASE__INST0_SEG4                     0x00012D80
755c349dbc7Sjsg #define NBIF0_BASE__INST0_SEG5                     0x0041B000
756c349dbc7Sjsg 
757c349dbc7Sjsg #define NBIF0_BASE__INST1_SEG0                     0
758c349dbc7Sjsg #define NBIF0_BASE__INST1_SEG1                     0
759c349dbc7Sjsg #define NBIF0_BASE__INST1_SEG2                     0
760c349dbc7Sjsg #define NBIF0_BASE__INST1_SEG3                     0
761c349dbc7Sjsg #define NBIF0_BASE__INST1_SEG4                     0
762c349dbc7Sjsg #define NBIF0_BASE__INST1_SEG5                     0
763c349dbc7Sjsg 
764c349dbc7Sjsg #define NBIF0_BASE__INST2_SEG0                     0
765c349dbc7Sjsg #define NBIF0_BASE__INST2_SEG1                     0
766c349dbc7Sjsg #define NBIF0_BASE__INST2_SEG2                     0
767c349dbc7Sjsg #define NBIF0_BASE__INST2_SEG3                     0
768c349dbc7Sjsg #define NBIF0_BASE__INST2_SEG4                     0
769c349dbc7Sjsg #define NBIF0_BASE__INST2_SEG5                     0
770c349dbc7Sjsg 
771c349dbc7Sjsg #define NBIF0_BASE__INST3_SEG0                     0
772c349dbc7Sjsg #define NBIF0_BASE__INST3_SEG1                     0
773c349dbc7Sjsg #define NBIF0_BASE__INST3_SEG2                     0
774c349dbc7Sjsg #define NBIF0_BASE__INST3_SEG3                     0
775c349dbc7Sjsg #define NBIF0_BASE__INST3_SEG4                     0
776c349dbc7Sjsg #define NBIF0_BASE__INST3_SEG5                     0
777c349dbc7Sjsg 
778c349dbc7Sjsg #define NBIF0_BASE__INST4_SEG0                     0
779c349dbc7Sjsg #define NBIF0_BASE__INST4_SEG1                     0
780c349dbc7Sjsg #define NBIF0_BASE__INST4_SEG2                     0
781c349dbc7Sjsg #define NBIF0_BASE__INST4_SEG3                     0
782c349dbc7Sjsg #define NBIF0_BASE__INST4_SEG4                     0
783c349dbc7Sjsg #define NBIF0_BASE__INST4_SEG5                     0
784c349dbc7Sjsg 
785c349dbc7Sjsg #define NBIF0_BASE__INST5_SEG0                     0
786c349dbc7Sjsg #define NBIF0_BASE__INST5_SEG1                     0
787c349dbc7Sjsg #define NBIF0_BASE__INST5_SEG2                     0
788c349dbc7Sjsg #define NBIF0_BASE__INST5_SEG3                     0
789c349dbc7Sjsg #define NBIF0_BASE__INST5_SEG4                     0
790c349dbc7Sjsg #define NBIF0_BASE__INST5_SEG5                     0
791c349dbc7Sjsg 
792c349dbc7Sjsg #define NBIF0_BASE__INST6_SEG0                     0
793c349dbc7Sjsg #define NBIF0_BASE__INST6_SEG1                     0
794c349dbc7Sjsg #define NBIF0_BASE__INST6_SEG2                     0
795c349dbc7Sjsg #define NBIF0_BASE__INST6_SEG3                     0
796c349dbc7Sjsg #define NBIF0_BASE__INST6_SEG4                     0
797c349dbc7Sjsg #define NBIF0_BASE__INST6_SEG5                     0
798c349dbc7Sjsg 
799c349dbc7Sjsg #define NBIF0_BASE__INST7_SEG0                     0
800c349dbc7Sjsg #define NBIF0_BASE__INST7_SEG1                     0
801c349dbc7Sjsg #define NBIF0_BASE__INST7_SEG2                     0
802c349dbc7Sjsg #define NBIF0_BASE__INST7_SEG3                     0
803c349dbc7Sjsg #define NBIF0_BASE__INST7_SEG4                     0
804c349dbc7Sjsg #define NBIF0_BASE__INST7_SEG5                     0
805c349dbc7Sjsg 
806c349dbc7Sjsg #define OSSSYS_BASE__INST0_SEG0                    0x000010A0
807c349dbc7Sjsg #define OSSSYS_BASE__INST0_SEG1                    0x00012500
808c349dbc7Sjsg #define OSSSYS_BASE__INST0_SEG2                    0x0040A000
809c349dbc7Sjsg #define OSSSYS_BASE__INST0_SEG3                    0
810c349dbc7Sjsg #define OSSSYS_BASE__INST0_SEG4                    0
811c349dbc7Sjsg #define OSSSYS_BASE__INST0_SEG5                    0
812c349dbc7Sjsg 
813c349dbc7Sjsg #define OSSSYS_BASE__INST1_SEG0                    0
814c349dbc7Sjsg #define OSSSYS_BASE__INST1_SEG1                    0
815c349dbc7Sjsg #define OSSSYS_BASE__INST1_SEG2                    0
816c349dbc7Sjsg #define OSSSYS_BASE__INST1_SEG3                    0
817c349dbc7Sjsg #define OSSSYS_BASE__INST1_SEG4                    0
818c349dbc7Sjsg #define OSSSYS_BASE__INST1_SEG5                    0
819c349dbc7Sjsg 
820c349dbc7Sjsg #define OSSSYS_BASE__INST2_SEG0                    0
821c349dbc7Sjsg #define OSSSYS_BASE__INST2_SEG1                    0
822c349dbc7Sjsg #define OSSSYS_BASE__INST2_SEG2                    0
823c349dbc7Sjsg #define OSSSYS_BASE__INST2_SEG3                    0
824c349dbc7Sjsg #define OSSSYS_BASE__INST2_SEG4                    0
825c349dbc7Sjsg #define OSSSYS_BASE__INST2_SEG5                    0
826c349dbc7Sjsg 
827c349dbc7Sjsg #define OSSSYS_BASE__INST3_SEG0                    0
828c349dbc7Sjsg #define OSSSYS_BASE__INST3_SEG1                    0
829c349dbc7Sjsg #define OSSSYS_BASE__INST3_SEG2                    0
830c349dbc7Sjsg #define OSSSYS_BASE__INST3_SEG3                    0
831c349dbc7Sjsg #define OSSSYS_BASE__INST3_SEG4                    0
832c349dbc7Sjsg #define OSSSYS_BASE__INST3_SEG5                    0
833c349dbc7Sjsg 
834c349dbc7Sjsg #define OSSSYS_BASE__INST4_SEG0                    0
835c349dbc7Sjsg #define OSSSYS_BASE__INST4_SEG1                    0
836c349dbc7Sjsg #define OSSSYS_BASE__INST4_SEG2                    0
837c349dbc7Sjsg #define OSSSYS_BASE__INST4_SEG3                    0
838c349dbc7Sjsg #define OSSSYS_BASE__INST4_SEG4                    0
839c349dbc7Sjsg #define OSSSYS_BASE__INST4_SEG5                    0
840c349dbc7Sjsg 
841c349dbc7Sjsg #define OSSSYS_BASE__INST5_SEG0                    0
842c349dbc7Sjsg #define OSSSYS_BASE__INST5_SEG1                    0
843c349dbc7Sjsg #define OSSSYS_BASE__INST5_SEG2                    0
844c349dbc7Sjsg #define OSSSYS_BASE__INST5_SEG3                    0
845c349dbc7Sjsg #define OSSSYS_BASE__INST5_SEG4                    0
846c349dbc7Sjsg #define OSSSYS_BASE__INST5_SEG5                    0
847c349dbc7Sjsg 
848c349dbc7Sjsg #define OSSSYS_BASE__INST6_SEG0                    0
849c349dbc7Sjsg #define OSSSYS_BASE__INST6_SEG1                    0
850c349dbc7Sjsg #define OSSSYS_BASE__INST6_SEG2                    0
851c349dbc7Sjsg #define OSSSYS_BASE__INST6_SEG3                    0
852c349dbc7Sjsg #define OSSSYS_BASE__INST6_SEG4                    0
853c349dbc7Sjsg #define OSSSYS_BASE__INST6_SEG5                    0
854c349dbc7Sjsg 
855c349dbc7Sjsg #define OSSSYS_BASE__INST7_SEG0                    0
856c349dbc7Sjsg #define OSSSYS_BASE__INST7_SEG1                    0
857c349dbc7Sjsg #define OSSSYS_BASE__INST7_SEG2                    0
858c349dbc7Sjsg #define OSSSYS_BASE__INST7_SEG3                    0
859c349dbc7Sjsg #define OSSSYS_BASE__INST7_SEG4                    0
860c349dbc7Sjsg #define OSSSYS_BASE__INST7_SEG5                    0
861c349dbc7Sjsg 
862c349dbc7Sjsg #define PCIE0_BASE__INST0_SEG0                     0x000128C0
863c349dbc7Sjsg #define PCIE0_BASE__INST0_SEG1                     0x00411800
864c349dbc7Sjsg #define PCIE0_BASE__INST0_SEG2                     0x04440000
865c349dbc7Sjsg #define PCIE0_BASE__INST0_SEG3                     0
866c349dbc7Sjsg #define PCIE0_BASE__INST0_SEG4                     0
867c349dbc7Sjsg #define PCIE0_BASE__INST0_SEG5                     0
868c349dbc7Sjsg 
869c349dbc7Sjsg #define PCIE0_BASE__INST1_SEG0                     0
870c349dbc7Sjsg #define PCIE0_BASE__INST1_SEG1                     0
871c349dbc7Sjsg #define PCIE0_BASE__INST1_SEG2                     0
872c349dbc7Sjsg #define PCIE0_BASE__INST1_SEG3                     0
873c349dbc7Sjsg #define PCIE0_BASE__INST1_SEG4                     0
874c349dbc7Sjsg #define PCIE0_BASE__INST1_SEG5                     0
875c349dbc7Sjsg 
876c349dbc7Sjsg #define PCIE0_BASE__INST2_SEG0                     0
877c349dbc7Sjsg #define PCIE0_BASE__INST2_SEG1                     0
878c349dbc7Sjsg #define PCIE0_BASE__INST2_SEG2                     0
879c349dbc7Sjsg #define PCIE0_BASE__INST2_SEG3                     0
880c349dbc7Sjsg #define PCIE0_BASE__INST2_SEG4                     0
881c349dbc7Sjsg #define PCIE0_BASE__INST2_SEG5                     0
882c349dbc7Sjsg 
883c349dbc7Sjsg #define PCIE0_BASE__INST3_SEG0                     0
884c349dbc7Sjsg #define PCIE0_BASE__INST3_SEG1                     0
885c349dbc7Sjsg #define PCIE0_BASE__INST3_SEG2                     0
886c349dbc7Sjsg #define PCIE0_BASE__INST3_SEG3                     0
887c349dbc7Sjsg #define PCIE0_BASE__INST3_SEG4                     0
888c349dbc7Sjsg #define PCIE0_BASE__INST3_SEG5                     0
889c349dbc7Sjsg 
890c349dbc7Sjsg #define PCIE0_BASE__INST4_SEG0                     0
891c349dbc7Sjsg #define PCIE0_BASE__INST4_SEG1                     0
892c349dbc7Sjsg #define PCIE0_BASE__INST4_SEG2                     0
893c349dbc7Sjsg #define PCIE0_BASE__INST4_SEG3                     0
894c349dbc7Sjsg #define PCIE0_BASE__INST4_SEG4                     0
895c349dbc7Sjsg #define PCIE0_BASE__INST4_SEG5                     0
896c349dbc7Sjsg 
897c349dbc7Sjsg #define PCIE0_BASE__INST5_SEG0                     0
898c349dbc7Sjsg #define PCIE0_BASE__INST5_SEG1                     0
899c349dbc7Sjsg #define PCIE0_BASE__INST5_SEG2                     0
900c349dbc7Sjsg #define PCIE0_BASE__INST5_SEG3                     0
901c349dbc7Sjsg #define PCIE0_BASE__INST5_SEG4                     0
902c349dbc7Sjsg #define PCIE0_BASE__INST5_SEG5                     0
903c349dbc7Sjsg 
904c349dbc7Sjsg #define PCIE0_BASE__INST6_SEG0                     0
905c349dbc7Sjsg #define PCIE0_BASE__INST6_SEG1                     0
906c349dbc7Sjsg #define PCIE0_BASE__INST6_SEG2                     0
907c349dbc7Sjsg #define PCIE0_BASE__INST6_SEG3                     0
908c349dbc7Sjsg #define PCIE0_BASE__INST6_SEG4                     0
909c349dbc7Sjsg #define PCIE0_BASE__INST6_SEG5                     0
910c349dbc7Sjsg 
911c349dbc7Sjsg #define PCIE0_BASE__INST7_SEG0                     0
912c349dbc7Sjsg #define PCIE0_BASE__INST7_SEG1                     0
913c349dbc7Sjsg #define PCIE0_BASE__INST7_SEG2                     0
914c349dbc7Sjsg #define PCIE0_BASE__INST7_SEG3                     0
915c349dbc7Sjsg #define PCIE0_BASE__INST7_SEG4                     0
916c349dbc7Sjsg #define PCIE0_BASE__INST7_SEG5                     0
917c349dbc7Sjsg 
918c349dbc7Sjsg #define SDMA0_BASE__INST0_SEG0                     0x00001260
919c349dbc7Sjsg #define SDMA0_BASE__INST0_SEG1                     0x00012540
920c349dbc7Sjsg #define SDMA0_BASE__INST0_SEG2                     0x0040A800
921c349dbc7Sjsg #define SDMA0_BASE__INST0_SEG3                     0
922c349dbc7Sjsg #define SDMA0_BASE__INST0_SEG4                     0
923c349dbc7Sjsg #define SDMA0_BASE__INST0_SEG5                     0
924c349dbc7Sjsg 
925c349dbc7Sjsg #define SDMA0_BASE__INST1_SEG0                     0
926c349dbc7Sjsg #define SDMA0_BASE__INST1_SEG1                     0
927c349dbc7Sjsg #define SDMA0_BASE__INST1_SEG2                     0
928c349dbc7Sjsg #define SDMA0_BASE__INST1_SEG3                     0
929c349dbc7Sjsg #define SDMA0_BASE__INST1_SEG4                     0
930c349dbc7Sjsg #define SDMA0_BASE__INST1_SEG5                     0
931c349dbc7Sjsg 
932c349dbc7Sjsg #define SDMA0_BASE__INST2_SEG0                     0
933c349dbc7Sjsg #define SDMA0_BASE__INST2_SEG1                     0
934c349dbc7Sjsg #define SDMA0_BASE__INST2_SEG2                     0
935c349dbc7Sjsg #define SDMA0_BASE__INST2_SEG3                     0
936c349dbc7Sjsg #define SDMA0_BASE__INST2_SEG4                     0
937c349dbc7Sjsg #define SDMA0_BASE__INST2_SEG5                     0
938c349dbc7Sjsg 
939c349dbc7Sjsg #define SDMA0_BASE__INST3_SEG0                     0
940c349dbc7Sjsg #define SDMA0_BASE__INST3_SEG1                     0
941c349dbc7Sjsg #define SDMA0_BASE__INST3_SEG2                     0
942c349dbc7Sjsg #define SDMA0_BASE__INST3_SEG3                     0
943c349dbc7Sjsg #define SDMA0_BASE__INST3_SEG4                     0
944c349dbc7Sjsg #define SDMA0_BASE__INST3_SEG5                     0
945c349dbc7Sjsg 
946c349dbc7Sjsg #define SDMA0_BASE__INST4_SEG0                     0
947c349dbc7Sjsg #define SDMA0_BASE__INST4_SEG1                     0
948c349dbc7Sjsg #define SDMA0_BASE__INST4_SEG2                     0
949c349dbc7Sjsg #define SDMA0_BASE__INST4_SEG3                     0
950c349dbc7Sjsg #define SDMA0_BASE__INST4_SEG4                     0
951c349dbc7Sjsg #define SDMA0_BASE__INST4_SEG5                     0
952c349dbc7Sjsg 
953c349dbc7Sjsg #define SDMA0_BASE__INST5_SEG0                     0
954c349dbc7Sjsg #define SDMA0_BASE__INST5_SEG1                     0
955c349dbc7Sjsg #define SDMA0_BASE__INST5_SEG2                     0
956c349dbc7Sjsg #define SDMA0_BASE__INST5_SEG3                     0
957c349dbc7Sjsg #define SDMA0_BASE__INST5_SEG4                     0
958c349dbc7Sjsg #define SDMA0_BASE__INST5_SEG5                     0
959c349dbc7Sjsg 
960c349dbc7Sjsg #define SDMA0_BASE__INST6_SEG0                     0
961c349dbc7Sjsg #define SDMA0_BASE__INST6_SEG1                     0
962c349dbc7Sjsg #define SDMA0_BASE__INST6_SEG2                     0
963c349dbc7Sjsg #define SDMA0_BASE__INST6_SEG3                     0
964c349dbc7Sjsg #define SDMA0_BASE__INST6_SEG4                     0
965c349dbc7Sjsg #define SDMA0_BASE__INST6_SEG5                     0
966c349dbc7Sjsg 
967c349dbc7Sjsg #define SDMA1_BASE__INST0_SEG0                     0x00001860
968c349dbc7Sjsg #define SDMA1_BASE__INST0_SEG1                     0x00012560
969c349dbc7Sjsg #define SDMA1_BASE__INST0_SEG2                     0x0040AC00
970c349dbc7Sjsg #define SDMA1_BASE__INST0_SEG3                     0
971c349dbc7Sjsg #define SDMA1_BASE__INST0_SEG4                     0
972c349dbc7Sjsg #define SDMA1_BASE__INST0_SEG5                     0
973c349dbc7Sjsg 
974c349dbc7Sjsg #define SDMA1_BASE__INST1_SEG0                     0
975c349dbc7Sjsg #define SDMA1_BASE__INST1_SEG1                     0
976c349dbc7Sjsg #define SDMA1_BASE__INST1_SEG2                     0
977c349dbc7Sjsg #define SDMA1_BASE__INST1_SEG3                     0
978c349dbc7Sjsg #define SDMA1_BASE__INST1_SEG4                     0
979c349dbc7Sjsg #define SDMA1_BASE__INST1_SEG5                     0
980c349dbc7Sjsg 
981c349dbc7Sjsg #define SDMA1_BASE__INST2_SEG0                     0
982c349dbc7Sjsg #define SDMA1_BASE__INST2_SEG1                     0
983c349dbc7Sjsg #define SDMA1_BASE__INST2_SEG2                     0
984c349dbc7Sjsg #define SDMA1_BASE__INST2_SEG3                     0
985c349dbc7Sjsg #define SDMA1_BASE__INST2_SEG4                     0
986c349dbc7Sjsg #define SDMA1_BASE__INST2_SEG5                     0
987c349dbc7Sjsg 
988c349dbc7Sjsg #define SDMA1_BASE__INST3_SEG0                     0
989c349dbc7Sjsg #define SDMA1_BASE__INST3_SEG1                     0
990c349dbc7Sjsg #define SDMA1_BASE__INST3_SEG2                     0
991c349dbc7Sjsg #define SDMA1_BASE__INST3_SEG3                     0
992c349dbc7Sjsg #define SDMA1_BASE__INST3_SEG4                     0
993c349dbc7Sjsg #define SDMA1_BASE__INST3_SEG5                     0
994c349dbc7Sjsg 
995c349dbc7Sjsg #define SDMA1_BASE__INST4_SEG0                     0
996c349dbc7Sjsg #define SDMA1_BASE__INST4_SEG1                     0
997c349dbc7Sjsg #define SDMA1_BASE__INST4_SEG2                     0
998c349dbc7Sjsg #define SDMA1_BASE__INST4_SEG3                     0
999c349dbc7Sjsg #define SDMA1_BASE__INST4_SEG4                     0
1000c349dbc7Sjsg #define SDMA1_BASE__INST4_SEG5                     0
1001c349dbc7Sjsg 
1002c349dbc7Sjsg #define SDMA1_BASE__INST5_SEG0                     0
1003c349dbc7Sjsg #define SDMA1_BASE__INST5_SEG1                     0
1004c349dbc7Sjsg #define SDMA1_BASE__INST5_SEG2                     0
1005c349dbc7Sjsg #define SDMA1_BASE__INST5_SEG3                     0
1006c349dbc7Sjsg #define SDMA1_BASE__INST5_SEG4                     0
1007c349dbc7Sjsg #define SDMA1_BASE__INST5_SEG5                     0
1008c349dbc7Sjsg 
1009c349dbc7Sjsg 
1010c349dbc7Sjsg #define SDMA1_BASE__INST6_SEG0                     0
1011c349dbc7Sjsg #define SDMA1_BASE__INST6_SEG1                     0
1012c349dbc7Sjsg #define SDMA1_BASE__INST6_SEG2                     0
1013c349dbc7Sjsg #define SDMA1_BASE__INST6_SEG3                     0
1014c349dbc7Sjsg #define SDMA1_BASE__INST6_SEG4                     0
1015c349dbc7Sjsg #define SDMA1_BASE__INST6_SEG5                     0
1016c349dbc7Sjsg 
1017c349dbc7Sjsg 
1018c349dbc7Sjsg #define SDMA2_BASE__INST0_SEG0                     0x00013760
1019c349dbc7Sjsg #define SDMA2_BASE__INST0_SEG1                     0x0001E000
1020c349dbc7Sjsg #define SDMA2_BASE__INST0_SEG2                     0x0042EC00
1021c349dbc7Sjsg #define SDMA2_BASE__INST0_SEG3                     0
1022c349dbc7Sjsg #define SDMA2_BASE__INST0_SEG4                     0
1023c349dbc7Sjsg #define SDMA2_BASE__INST0_SEG5                     0
1024c349dbc7Sjsg 
1025c349dbc7Sjsg 
1026c349dbc7Sjsg #define SDMA2_BASE__INST1_SEG0                     0
1027c349dbc7Sjsg #define SDMA2_BASE__INST1_SEG1                     0
1028c349dbc7Sjsg #define SDMA2_BASE__INST1_SEG2                     0
1029c349dbc7Sjsg #define SDMA2_BASE__INST1_SEG3                     0
1030c349dbc7Sjsg #define SDMA2_BASE__INST1_SEG4                     0
1031c349dbc7Sjsg #define SDMA2_BASE__INST1_SEG5                     0
1032c349dbc7Sjsg 
1033c349dbc7Sjsg #define SDMA2_BASE__INST2_SEG0                     0
1034c349dbc7Sjsg #define SDMA2_BASE__INST2_SEG1                     0
1035c349dbc7Sjsg #define SDMA2_BASE__INST2_SEG2                     0
1036c349dbc7Sjsg #define SDMA2_BASE__INST2_SEG3                     0
1037c349dbc7Sjsg #define SDMA2_BASE__INST2_SEG4                     0
1038c349dbc7Sjsg #define SDMA2_BASE__INST2_SEG5                     0
1039c349dbc7Sjsg 
1040c349dbc7Sjsg #define SDMA2_BASE__INST3_SEG0                     0
1041c349dbc7Sjsg #define SDMA2_BASE__INST3_SEG1                     0
1042c349dbc7Sjsg #define SDMA2_BASE__INST3_SEG2                     0
1043c349dbc7Sjsg #define SDMA2_BASE__INST3_SEG3                     0
1044c349dbc7Sjsg #define SDMA2_BASE__INST3_SEG4                     0
1045c349dbc7Sjsg #define SDMA2_BASE__INST3_SEG5                     0
1046c349dbc7Sjsg 
1047c349dbc7Sjsg #define SDMA2_BASE__INST4_SEG0                     0
1048c349dbc7Sjsg #define SDMA2_BASE__INST4_SEG1                     0
1049c349dbc7Sjsg #define SDMA2_BASE__INST4_SEG2                     0
1050c349dbc7Sjsg #define SDMA2_BASE__INST4_SEG3                     0
1051c349dbc7Sjsg #define SDMA2_BASE__INST4_SEG4                     0
1052c349dbc7Sjsg #define SDMA2_BASE__INST4_SEG5                     0
1053c349dbc7Sjsg 
1054c349dbc7Sjsg #define SDMA2_BASE__INST5_SEG0                     0
1055c349dbc7Sjsg #define SDMA2_BASE__INST5_SEG1                     0
1056c349dbc7Sjsg #define SDMA2_BASE__INST5_SEG2                     0
1057c349dbc7Sjsg #define SDMA2_BASE__INST5_SEG3                     0
1058c349dbc7Sjsg #define SDMA2_BASE__INST5_SEG4                     0
1059c349dbc7Sjsg #define SDMA2_BASE__INST5_SEG5                     0
1060c349dbc7Sjsg 
1061c349dbc7Sjsg #define SDMA2_BASE__INST6_SEG0                     0
1062c349dbc7Sjsg #define SDMA2_BASE__INST6_SEG1                     0
1063c349dbc7Sjsg #define SDMA2_BASE__INST6_SEG2                     0
1064c349dbc7Sjsg #define SDMA2_BASE__INST6_SEG3                     0
1065c349dbc7Sjsg #define SDMA2_BASE__INST6_SEG4                     0
1066c349dbc7Sjsg #define SDMA2_BASE__INST6_SEG5                     0
1067c349dbc7Sjsg 
1068c349dbc7Sjsg #define SDMA3_BASE__INST0_SEG0                     0x00013780
1069c349dbc7Sjsg #define SDMA3_BASE__INST0_SEG1                     0x0001E400
1070c349dbc7Sjsg #define SDMA3_BASE__INST0_SEG2                     0x0042F000
1071c349dbc7Sjsg #define SDMA3_BASE__INST0_SEG3                     0
1072c349dbc7Sjsg #define SDMA3_BASE__INST0_SEG4                     0
1073c349dbc7Sjsg #define SDMA3_BASE__INST0_SEG5                     0
1074c349dbc7Sjsg 
1075c349dbc7Sjsg #define SDMA3_BASE__INST1_SEG0                     0
1076c349dbc7Sjsg #define SDMA3_BASE__INST1_SEG1                     0
1077c349dbc7Sjsg #define SDMA3_BASE__INST1_SEG2                     0
1078c349dbc7Sjsg #define SDMA3_BASE__INST1_SEG3                     0
1079c349dbc7Sjsg #define SDMA3_BASE__INST1_SEG4                     0
1080c349dbc7Sjsg #define SDMA3_BASE__INST1_SEG5                     0
1081c349dbc7Sjsg 
1082c349dbc7Sjsg #define SDMA3_BASE__INST2_SEG0                     0
1083c349dbc7Sjsg #define SDMA3_BASE__INST2_SEG1                     0
1084c349dbc7Sjsg #define SDMA3_BASE__INST2_SEG2                     0
1085c349dbc7Sjsg #define SDMA3_BASE__INST2_SEG3                     0
1086c349dbc7Sjsg #define SDMA3_BASE__INST2_SEG4                     0
1087c349dbc7Sjsg #define SDMA3_BASE__INST2_SEG5                     0
1088c349dbc7Sjsg 
1089c349dbc7Sjsg #define SDMA3_BASE__INST3_SEG0                     0
1090c349dbc7Sjsg #define SDMA3_BASE__INST3_SEG1                     0
1091c349dbc7Sjsg #define SDMA3_BASE__INST3_SEG2                     0
1092c349dbc7Sjsg #define SDMA3_BASE__INST3_SEG3                     0
1093c349dbc7Sjsg #define SDMA3_BASE__INST3_SEG4                     0
1094c349dbc7Sjsg #define SDMA3_BASE__INST3_SEG5                     0
1095c349dbc7Sjsg 
1096c349dbc7Sjsg #define SDMA3_BASE__INST4_SEG0                     0
1097c349dbc7Sjsg #define SDMA3_BASE__INST4_SEG1                     0
1098c349dbc7Sjsg #define SDMA3_BASE__INST4_SEG2                     0
1099c349dbc7Sjsg #define SDMA3_BASE__INST4_SEG3                     0
1100c349dbc7Sjsg #define SDMA3_BASE__INST4_SEG4                     0
1101c349dbc7Sjsg #define SDMA3_BASE__INST4_SEG5                     0
1102c349dbc7Sjsg 
1103c349dbc7Sjsg #define SDMA3_BASE__INST5_SEG0                     0
1104c349dbc7Sjsg #define SDMA3_BASE__INST5_SEG1                     0
1105c349dbc7Sjsg #define SDMA3_BASE__INST5_SEG2                     0
1106c349dbc7Sjsg #define SDMA3_BASE__INST5_SEG3                     0
1107c349dbc7Sjsg #define SDMA3_BASE__INST5_SEG4                     0
1108c349dbc7Sjsg #define SDMA3_BASE__INST5_SEG5                     0
1109c349dbc7Sjsg 
1110c349dbc7Sjsg #define SDMA3_BASE__INST6_SEG0                     0
1111c349dbc7Sjsg #define SDMA3_BASE__INST6_SEG1                     0
1112c349dbc7Sjsg #define SDMA3_BASE__INST6_SEG2                     0
1113c349dbc7Sjsg #define SDMA3_BASE__INST6_SEG3                     0
1114c349dbc7Sjsg #define SDMA3_BASE__INST6_SEG4                     0
1115c349dbc7Sjsg #define SDMA3_BASE__INST6_SEG5                     0
1116c349dbc7Sjsg 
1117c349dbc7Sjsg #define SDMA4_BASE__INST0_SEG0                     0x000137A0
1118c349dbc7Sjsg #define SDMA4_BASE__INST0_SEG1                     0x0001E800
1119c349dbc7Sjsg #define SDMA4_BASE__INST0_SEG2                     0x0042F400
1120c349dbc7Sjsg #define SDMA4_BASE__INST0_SEG3                     0
1121c349dbc7Sjsg #define SDMA4_BASE__INST0_SEG4                     0
1122c349dbc7Sjsg #define SDMA4_BASE__INST0_SEG5                     0
1123c349dbc7Sjsg 
1124c349dbc7Sjsg #define SDMA4_BASE__INST1_SEG0                     0
1125c349dbc7Sjsg #define SDMA4_BASE__INST1_SEG1                     0
1126c349dbc7Sjsg #define SDMA4_BASE__INST1_SEG2                     0
1127c349dbc7Sjsg #define SDMA4_BASE__INST1_SEG3                     0
1128c349dbc7Sjsg #define SDMA4_BASE__INST1_SEG4                     0
1129c349dbc7Sjsg #define SDMA4_BASE__INST1_SEG5                     0
1130c349dbc7Sjsg 
1131c349dbc7Sjsg #define SDMA4_BASE__INST2_SEG0                     0
1132c349dbc7Sjsg #define SDMA4_BASE__INST2_SEG1                     0
1133c349dbc7Sjsg #define SDMA4_BASE__INST2_SEG2                     0
1134c349dbc7Sjsg #define SDMA4_BASE__INST2_SEG3                     0
1135c349dbc7Sjsg #define SDMA4_BASE__INST2_SEG4                     0
1136c349dbc7Sjsg #define SDMA4_BASE__INST2_SEG5                     0
1137c349dbc7Sjsg 
1138c349dbc7Sjsg #define SDMA4_BASE__INST3_SEG0                     0
1139c349dbc7Sjsg #define SDMA4_BASE__INST3_SEG1                     0
1140c349dbc7Sjsg #define SDMA4_BASE__INST3_SEG2                     0
1141c349dbc7Sjsg #define SDMA4_BASE__INST3_SEG3                     0
1142c349dbc7Sjsg #define SDMA4_BASE__INST3_SEG4                     0
1143c349dbc7Sjsg #define SDMA4_BASE__INST3_SEG5                     0
1144c349dbc7Sjsg 
1145c349dbc7Sjsg #define SDMA4_BASE__INST4_SEG0                     0
1146c349dbc7Sjsg #define SDMA4_BASE__INST4_SEG1                     0
1147c349dbc7Sjsg #define SDMA4_BASE__INST4_SEG2                     0
1148c349dbc7Sjsg #define SDMA4_BASE__INST4_SEG3                     0
1149c349dbc7Sjsg #define SDMA4_BASE__INST4_SEG4                     0
1150c349dbc7Sjsg #define SDMA4_BASE__INST4_SEG5                     0
1151c349dbc7Sjsg 
1152c349dbc7Sjsg #define SDMA4_BASE__INST5_SEG0                     0
1153c349dbc7Sjsg #define SDMA4_BASE__INST5_SEG1                     0
1154c349dbc7Sjsg #define SDMA4_BASE__INST5_SEG2                     0
1155c349dbc7Sjsg #define SDMA4_BASE__INST5_SEG3                     0
1156c349dbc7Sjsg #define SDMA4_BASE__INST5_SEG4                     0
1157c349dbc7Sjsg #define SDMA4_BASE__INST5_SEG5                     0
1158c349dbc7Sjsg 
1159c349dbc7Sjsg #define SDMA4_BASE__INST6_SEG0                     0
1160c349dbc7Sjsg #define SDMA4_BASE__INST6_SEG1                     0
1161c349dbc7Sjsg #define SDMA4_BASE__INST6_SEG2                     0
1162c349dbc7Sjsg #define SDMA4_BASE__INST6_SEG3                     0
1163c349dbc7Sjsg #define SDMA4_BASE__INST6_SEG4                     0
1164c349dbc7Sjsg #define SDMA4_BASE__INST6_SEG5                     0
1165c349dbc7Sjsg 
1166c349dbc7Sjsg #define SDMA5_BASE__INST0_SEG0                     0x000137C0
1167c349dbc7Sjsg #define SDMA5_BASE__INST0_SEG1                     0x0001EC00
1168c349dbc7Sjsg #define SDMA5_BASE__INST0_SEG2                     0x0042F800
1169c349dbc7Sjsg #define SDMA5_BASE__INST0_SEG3                     0
1170c349dbc7Sjsg #define SDMA5_BASE__INST0_SEG4                     0
1171c349dbc7Sjsg #define SDMA5_BASE__INST0_SEG5                     0
1172c349dbc7Sjsg 
1173c349dbc7Sjsg #define SDMA5_BASE__INST1_SEG0                     0
1174c349dbc7Sjsg #define SDMA5_BASE__INST1_SEG1                     0
1175c349dbc7Sjsg #define SDMA5_BASE__INST1_SEG2                     0
1176c349dbc7Sjsg #define SDMA5_BASE__INST1_SEG3                     0
1177c349dbc7Sjsg #define SDMA5_BASE__INST1_SEG4                     0
1178c349dbc7Sjsg #define SDMA5_BASE__INST1_SEG5                     0
1179c349dbc7Sjsg 
1180c349dbc7Sjsg #define SDMA5_BASE__INST2_SEG0                     0
1181c349dbc7Sjsg #define SDMA5_BASE__INST2_SEG1                     0
1182c349dbc7Sjsg #define SDMA5_BASE__INST2_SEG2                     0
1183c349dbc7Sjsg #define SDMA5_BASE__INST2_SEG3                     0
1184c349dbc7Sjsg #define SDMA5_BASE__INST2_SEG4                     0
1185c349dbc7Sjsg #define SDMA5_BASE__INST2_SEG5                     0
1186c349dbc7Sjsg 
1187c349dbc7Sjsg #define SDMA5_BASE__INST3_SEG0                     0
1188c349dbc7Sjsg #define SDMA5_BASE__INST3_SEG1                     0
1189c349dbc7Sjsg #define SDMA5_BASE__INST3_SEG2                     0
1190c349dbc7Sjsg #define SDMA5_BASE__INST3_SEG3                     0
1191c349dbc7Sjsg #define SDMA5_BASE__INST3_SEG4                     0
1192c349dbc7Sjsg #define SDMA5_BASE__INST3_SEG5                     0
1193c349dbc7Sjsg 
1194c349dbc7Sjsg #define SDMA5_BASE__INST4_SEG0                     0
1195c349dbc7Sjsg #define SDMA5_BASE__INST4_SEG1                     0
1196c349dbc7Sjsg #define SDMA5_BASE__INST4_SEG2                     0
1197c349dbc7Sjsg #define SDMA5_BASE__INST4_SEG3                     0
1198c349dbc7Sjsg #define SDMA5_BASE__INST4_SEG4                     0
1199c349dbc7Sjsg #define SDMA5_BASE__INST4_SEG5                     0
1200c349dbc7Sjsg 
1201c349dbc7Sjsg #define SDMA5_BASE__INST5_SEG0                     0
1202c349dbc7Sjsg #define SDMA5_BASE__INST5_SEG1                     0
1203c349dbc7Sjsg #define SDMA5_BASE__INST5_SEG2                     0
1204c349dbc7Sjsg #define SDMA5_BASE__INST5_SEG3                     0
1205c349dbc7Sjsg #define SDMA5_BASE__INST5_SEG4                     0
1206c349dbc7Sjsg #define SDMA5_BASE__INST5_SEG5                     0
1207c349dbc7Sjsg 
1208c349dbc7Sjsg #define SDMA5_BASE__INST6_SEG0                     0
1209c349dbc7Sjsg #define SDMA5_BASE__INST6_SEG1                     0
1210c349dbc7Sjsg #define SDMA5_BASE__INST6_SEG2                     0
1211c349dbc7Sjsg #define SDMA5_BASE__INST6_SEG3                     0
1212c349dbc7Sjsg #define SDMA5_BASE__INST6_SEG4                     0
1213c349dbc7Sjsg #define SDMA5_BASE__INST6_SEG5                     0
1214c349dbc7Sjsg 
1215c349dbc7Sjsg #define SDMA6_BASE__INST0_SEG0                     0x000137E0
1216c349dbc7Sjsg #define SDMA6_BASE__INST0_SEG1                     0x0001F000
1217c349dbc7Sjsg #define SDMA6_BASE__INST0_SEG2                     0x0042FC00
1218c349dbc7Sjsg #define SDMA6_BASE__INST0_SEG3                     0
1219c349dbc7Sjsg #define SDMA6_BASE__INST0_SEG4                     0
1220c349dbc7Sjsg #define SDMA6_BASE__INST0_SEG5                     0
1221c349dbc7Sjsg 
1222c349dbc7Sjsg #define SDMA6_BASE__INST1_SEG0                     0
1223c349dbc7Sjsg #define SDMA6_BASE__INST1_SEG1                     0
1224c349dbc7Sjsg #define SDMA6_BASE__INST1_SEG2                     0
1225c349dbc7Sjsg #define SDMA6_BASE__INST1_SEG3                     0
1226c349dbc7Sjsg #define SDMA6_BASE__INST1_SEG4                     0
1227c349dbc7Sjsg #define SDMA6_BASE__INST1_SEG5                     0
1228c349dbc7Sjsg 
1229c349dbc7Sjsg #define SDMA6_BASE__INST2_SEG0                     0
1230c349dbc7Sjsg #define SDMA6_BASE__INST2_SEG1                     0
1231c349dbc7Sjsg #define SDMA6_BASE__INST2_SEG2                     0
1232c349dbc7Sjsg #define SDMA6_BASE__INST2_SEG3                     0
1233c349dbc7Sjsg #define SDMA6_BASE__INST2_SEG4                     0
1234c349dbc7Sjsg #define SDMA6_BASE__INST2_SEG5                     0
1235c349dbc7Sjsg 
1236c349dbc7Sjsg #define SDMA6_BASE__INST3_SEG0                     0
1237c349dbc7Sjsg #define SDMA6_BASE__INST3_SEG1                     0
1238c349dbc7Sjsg #define SDMA6_BASE__INST3_SEG2                     0
1239c349dbc7Sjsg #define SDMA6_BASE__INST3_SEG3                     0
1240c349dbc7Sjsg #define SDMA6_BASE__INST3_SEG4                     0
1241c349dbc7Sjsg #define SDMA6_BASE__INST3_SEG5                     0
1242c349dbc7Sjsg 
1243c349dbc7Sjsg #define SDMA6_BASE__INST4_SEG0                     0
1244c349dbc7Sjsg #define SDMA6_BASE__INST4_SEG1                     0
1245c349dbc7Sjsg #define SDMA6_BASE__INST4_SEG2                     0
1246c349dbc7Sjsg #define SDMA6_BASE__INST4_SEG3                     0
1247c349dbc7Sjsg #define SDMA6_BASE__INST4_SEG4                     0
1248c349dbc7Sjsg #define SDMA6_BASE__INST4_SEG5                     0
1249c349dbc7Sjsg 
1250c349dbc7Sjsg #define SDMA6_BASE__INST5_SEG0                     0
1251c349dbc7Sjsg #define SDMA6_BASE__INST5_SEG1                     0
1252c349dbc7Sjsg #define SDMA6_BASE__INST5_SEG2                     0
1253c349dbc7Sjsg #define SDMA6_BASE__INST5_SEG3                     0
1254c349dbc7Sjsg #define SDMA6_BASE__INST5_SEG4                     0
1255c349dbc7Sjsg #define SDMA6_BASE__INST5_SEG5                     0
1256c349dbc7Sjsg 
1257c349dbc7Sjsg #define SDMA6_BASE__INST6_SEG0                     0
1258c349dbc7Sjsg #define SDMA6_BASE__INST6_SEG1                     0
1259c349dbc7Sjsg #define SDMA6_BASE__INST6_SEG2                     0
1260c349dbc7Sjsg #define SDMA6_BASE__INST6_SEG3                     0
1261c349dbc7Sjsg #define SDMA6_BASE__INST6_SEG4                     0
1262c349dbc7Sjsg #define SDMA6_BASE__INST6_SEG5                     0
1263c349dbc7Sjsg 
1264c349dbc7Sjsg #define SDMA7_BASE__INST0_SEG0                     0x00013800
1265c349dbc7Sjsg #define SDMA7_BASE__INST0_SEG1                     0x0001F400
1266c349dbc7Sjsg #define SDMA7_BASE__INST0_SEG2                     0x00430000
1267c349dbc7Sjsg #define SDMA7_BASE__INST0_SEG3                     0
1268c349dbc7Sjsg #define SDMA7_BASE__INST0_SEG4                     0
1269c349dbc7Sjsg #define SDMA7_BASE__INST0_SEG5                     0
1270c349dbc7Sjsg 
1271c349dbc7Sjsg #define SDMA7_BASE__INST1_SEG0                     0
1272c349dbc7Sjsg #define SDMA7_BASE__INST1_SEG1                     0
1273c349dbc7Sjsg #define SDMA7_BASE__INST1_SEG2                     0
1274c349dbc7Sjsg #define SDMA7_BASE__INST1_SEG3                     0
1275c349dbc7Sjsg #define SDMA7_BASE__INST1_SEG4                     0
1276c349dbc7Sjsg #define SDMA7_BASE__INST1_SEG5                     0
1277c349dbc7Sjsg 
1278c349dbc7Sjsg #define SDMA7_BASE__INST2_SEG0                     0
1279c349dbc7Sjsg #define SDMA7_BASE__INST2_SEG1                     0
1280c349dbc7Sjsg #define SDMA7_BASE__INST2_SEG2                     0
1281c349dbc7Sjsg #define SDMA7_BASE__INST2_SEG3                     0
1282c349dbc7Sjsg #define SDMA7_BASE__INST2_SEG4                     0
1283c349dbc7Sjsg #define SDMA7_BASE__INST2_SEG5                     0
1284c349dbc7Sjsg 
1285c349dbc7Sjsg #define SDMA7_BASE__INST3_SEG0                     0
1286c349dbc7Sjsg #define SDMA7_BASE__INST3_SEG1                     0
1287c349dbc7Sjsg #define SDMA7_BASE__INST3_SEG2                     0
1288c349dbc7Sjsg #define SDMA7_BASE__INST3_SEG3                     0
1289c349dbc7Sjsg #define SDMA7_BASE__INST3_SEG4                     0
1290c349dbc7Sjsg #define SDMA7_BASE__INST3_SEG5                     0
1291c349dbc7Sjsg 
1292c349dbc7Sjsg #define SDMA7_BASE__INST4_SEG0                     0
1293c349dbc7Sjsg #define SDMA7_BASE__INST4_SEG1                     0
1294c349dbc7Sjsg #define SDMA7_BASE__INST4_SEG2                     0
1295c349dbc7Sjsg #define SDMA7_BASE__INST4_SEG3                     0
1296c349dbc7Sjsg #define SDMA7_BASE__INST4_SEG4                     0
1297c349dbc7Sjsg #define SDMA7_BASE__INST4_SEG5                     0
1298c349dbc7Sjsg 
1299c349dbc7Sjsg #define SDMA7_BASE__INST5_SEG0                     0
1300c349dbc7Sjsg #define SDMA7_BASE__INST5_SEG1                     0
1301c349dbc7Sjsg #define SDMA7_BASE__INST5_SEG2                     0
1302c349dbc7Sjsg #define SDMA7_BASE__INST5_SEG3                     0
1303c349dbc7Sjsg #define SDMA7_BASE__INST5_SEG4                     0
1304c349dbc7Sjsg #define SDMA7_BASE__INST5_SEG5                     0
1305c349dbc7Sjsg 
1306c349dbc7Sjsg #define SDMA7_BASE__INST6_SEG0                     0
1307c349dbc7Sjsg #define SDMA7_BASE__INST6_SEG1                     0
1308c349dbc7Sjsg #define SDMA7_BASE__INST6_SEG2                     0
1309c349dbc7Sjsg #define SDMA7_BASE__INST6_SEG3                     0
1310c349dbc7Sjsg #define SDMA7_BASE__INST6_SEG4                     0
1311c349dbc7Sjsg #define SDMA7_BASE__INST6_SEG5                     0
1312c349dbc7Sjsg 
1313c349dbc7Sjsg #define SMUIO_BASE__INST0_SEG0                     0x00012080
1314c349dbc7Sjsg #define SMUIO_BASE__INST0_SEG1                     0x00016800
1315c349dbc7Sjsg #define SMUIO_BASE__INST0_SEG2                     0x00016A00
1316c349dbc7Sjsg #define SMUIO_BASE__INST0_SEG3                     0x00401000
1317c349dbc7Sjsg #define SMUIO_BASE__INST0_SEG4                     0x00440000
1318c349dbc7Sjsg #define SMUIO_BASE__INST0_SEG5                     0
1319c349dbc7Sjsg 
1320c349dbc7Sjsg #define SMUIO_BASE__INST1_SEG0                     0
1321c349dbc7Sjsg #define SMUIO_BASE__INST1_SEG1                     0
1322c349dbc7Sjsg #define SMUIO_BASE__INST1_SEG2                     0
1323c349dbc7Sjsg #define SMUIO_BASE__INST1_SEG3                     0
1324c349dbc7Sjsg #define SMUIO_BASE__INST1_SEG4                     0
1325c349dbc7Sjsg #define SMUIO_BASE__INST1_SEG5                     0
1326c349dbc7Sjsg 
1327c349dbc7Sjsg #define SMUIO_BASE__INST2_SEG0                     0
1328c349dbc7Sjsg #define SMUIO_BASE__INST2_SEG1                     0
1329c349dbc7Sjsg #define SMUIO_BASE__INST2_SEG2                     0
1330c349dbc7Sjsg #define SMUIO_BASE__INST2_SEG3                     0
1331c349dbc7Sjsg #define SMUIO_BASE__INST2_SEG4                     0
1332c349dbc7Sjsg #define SMUIO_BASE__INST2_SEG5                     0
1333c349dbc7Sjsg 
1334c349dbc7Sjsg #define SMUIO_BASE__INST3_SEG0                     0
1335c349dbc7Sjsg #define SMUIO_BASE__INST3_SEG1                     0
1336c349dbc7Sjsg #define SMUIO_BASE__INST3_SEG2                     0
1337c349dbc7Sjsg #define SMUIO_BASE__INST3_SEG3                     0
1338c349dbc7Sjsg #define SMUIO_BASE__INST3_SEG4                     0
1339c349dbc7Sjsg #define SMUIO_BASE__INST3_SEG5                     0
1340c349dbc7Sjsg 
1341c349dbc7Sjsg #define SMUIO_BASE__INST4_SEG0                     0
1342c349dbc7Sjsg #define SMUIO_BASE__INST4_SEG1                     0
1343c349dbc7Sjsg #define SMUIO_BASE__INST4_SEG2                     0
1344c349dbc7Sjsg #define SMUIO_BASE__INST4_SEG3                     0
1345c349dbc7Sjsg #define SMUIO_BASE__INST4_SEG4                     0
1346c349dbc7Sjsg #define SMUIO_BASE__INST4_SEG5                     0
1347c349dbc7Sjsg 
1348c349dbc7Sjsg #define SMUIO_BASE__INST5_SEG0                     0
1349c349dbc7Sjsg #define SMUIO_BASE__INST5_SEG1                     0
1350c349dbc7Sjsg #define SMUIO_BASE__INST5_SEG2                     0
1351c349dbc7Sjsg #define SMUIO_BASE__INST5_SEG3                     0
1352c349dbc7Sjsg #define SMUIO_BASE__INST5_SEG4                     0
1353c349dbc7Sjsg #define SMUIO_BASE__INST5_SEG5                     0
1354c349dbc7Sjsg 
1355c349dbc7Sjsg #define SMUIO_BASE__INST6_SEG0                     0
1356c349dbc7Sjsg #define SMUIO_BASE__INST6_SEG1                     0
1357c349dbc7Sjsg #define SMUIO_BASE__INST6_SEG2                     0
1358c349dbc7Sjsg #define SMUIO_BASE__INST6_SEG3                     0
1359c349dbc7Sjsg #define SMUIO_BASE__INST6_SEG4                     0
1360c349dbc7Sjsg #define SMUIO_BASE__INST6_SEG5                     0
1361c349dbc7Sjsg 
1362c349dbc7Sjsg #define SMUIO_BASE__INST7_SEG0                     0
1363c349dbc7Sjsg #define SMUIO_BASE__INST7_SEG1                     0
1364c349dbc7Sjsg #define SMUIO_BASE__INST7_SEG2                     0
1365c349dbc7Sjsg #define SMUIO_BASE__INST7_SEG3                     0
1366c349dbc7Sjsg #define SMUIO_BASE__INST7_SEG4                     0
1367c349dbc7Sjsg #define SMUIO_BASE__INST7_SEG5                     0
1368c349dbc7Sjsg 
1369c349dbc7Sjsg #define THM_BASE__INST0_SEG0                       0x00012060
1370c349dbc7Sjsg #define THM_BASE__INST0_SEG1                       0x00016600
1371c349dbc7Sjsg #define THM_BASE__INST0_SEG2                       0x00400C00
1372c349dbc7Sjsg #define THM_BASE__INST0_SEG3                       0
1373c349dbc7Sjsg #define THM_BASE__INST0_SEG4                       0
1374c349dbc7Sjsg #define THM_BASE__INST0_SEG5                       0
1375c349dbc7Sjsg 
1376c349dbc7Sjsg #define THM_BASE__INST1_SEG0                       0
1377c349dbc7Sjsg #define THM_BASE__INST1_SEG1                       0
1378c349dbc7Sjsg #define THM_BASE__INST1_SEG2                       0
1379c349dbc7Sjsg #define THM_BASE__INST1_SEG3                       0
1380c349dbc7Sjsg #define THM_BASE__INST1_SEG4                       0
1381c349dbc7Sjsg #define THM_BASE__INST1_SEG5                       0
1382c349dbc7Sjsg 
1383c349dbc7Sjsg #define THM_BASE__INST2_SEG0                       0
1384c349dbc7Sjsg #define THM_BASE__INST2_SEG1                       0
1385c349dbc7Sjsg #define THM_BASE__INST2_SEG2                       0
1386c349dbc7Sjsg #define THM_BASE__INST2_SEG3                       0
1387c349dbc7Sjsg #define THM_BASE__INST2_SEG4                       0
1388c349dbc7Sjsg #define THM_BASE__INST2_SEG5                       0
1389c349dbc7Sjsg 
1390c349dbc7Sjsg #define THM_BASE__INST3_SEG0                       0
1391c349dbc7Sjsg #define THM_BASE__INST3_SEG1                       0
1392c349dbc7Sjsg #define THM_BASE__INST3_SEG2                       0
1393c349dbc7Sjsg #define THM_BASE__INST3_SEG3                       0
1394c349dbc7Sjsg #define THM_BASE__INST3_SEG4                       0
1395c349dbc7Sjsg #define THM_BASE__INST3_SEG5                       0
1396c349dbc7Sjsg 
1397c349dbc7Sjsg #define THM_BASE__INST4_SEG0                       0
1398c349dbc7Sjsg #define THM_BASE__INST4_SEG1                       0
1399c349dbc7Sjsg #define THM_BASE__INST4_SEG2                       0
1400c349dbc7Sjsg #define THM_BASE__INST4_SEG3                       0
1401c349dbc7Sjsg #define THM_BASE__INST4_SEG4                       0
1402c349dbc7Sjsg #define THM_BASE__INST4_SEG5                       0
1403c349dbc7Sjsg 
1404c349dbc7Sjsg #define THM_BASE__INST5_SEG0                       0
1405c349dbc7Sjsg #define THM_BASE__INST5_SEG1                       0
1406c349dbc7Sjsg #define THM_BASE__INST5_SEG2                       0
1407c349dbc7Sjsg #define THM_BASE__INST5_SEG3                       0
1408c349dbc7Sjsg #define THM_BASE__INST5_SEG4                       0
1409c349dbc7Sjsg #define THM_BASE__INST5_SEG5                       0
1410c349dbc7Sjsg 
1411c349dbc7Sjsg #define THM_BASE__INST6_SEG0                       0
1412c349dbc7Sjsg #define THM_BASE__INST6_SEG1                       0
1413c349dbc7Sjsg #define THM_BASE__INST6_SEG2                       0
1414c349dbc7Sjsg #define THM_BASE__INST6_SEG3                       0
1415c349dbc7Sjsg #define THM_BASE__INST6_SEG4                       0
1416c349dbc7Sjsg #define THM_BASE__INST6_SEG5                       0
1417c349dbc7Sjsg 
1418c349dbc7Sjsg #define THM_BASE__INST7_SEG0                       0
1419c349dbc7Sjsg #define THM_BASE__INST7_SEG1                       0
1420c349dbc7Sjsg #define THM_BASE__INST7_SEG2                       0
1421c349dbc7Sjsg #define THM_BASE__INST7_SEG3                       0
1422c349dbc7Sjsg #define THM_BASE__INST7_SEG4                       0
1423c349dbc7Sjsg #define THM_BASE__INST7_SEG5                       0
1424c349dbc7Sjsg 
1425c349dbc7Sjsg #define UMC_BASE__INST0_SEG0                       0x000132C0
1426c349dbc7Sjsg #define UMC_BASE__INST0_SEG1                       0x00014000
1427c349dbc7Sjsg #define UMC_BASE__INST0_SEG2                       0x00425800
1428c349dbc7Sjsg #define UMC_BASE__INST0_SEG3                       0
1429c349dbc7Sjsg #define UMC_BASE__INST0_SEG4                       0
1430c349dbc7Sjsg #define UMC_BASE__INST0_SEG5                       0
1431c349dbc7Sjsg 
1432c349dbc7Sjsg #define UMC_BASE__INST1_SEG0                       0x000132E0
1433c349dbc7Sjsg #define UMC_BASE__INST1_SEG1                       0x00054000
1434c349dbc7Sjsg #define UMC_BASE__INST1_SEG2                       0x00425C00
1435c349dbc7Sjsg #define UMC_BASE__INST1_SEG3                       0
1436c349dbc7Sjsg #define UMC_BASE__INST1_SEG4                       0
1437c349dbc7Sjsg #define UMC_BASE__INST1_SEG5                       0
1438c349dbc7Sjsg 
1439c349dbc7Sjsg #define UMC_BASE__INST2_SEG0                       0x00013300
1440c349dbc7Sjsg #define UMC_BASE__INST2_SEG1                       0x00094000
1441c349dbc7Sjsg #define UMC_BASE__INST2_SEG2                       0x00426000
1442c349dbc7Sjsg #define UMC_BASE__INST2_SEG3                       0
1443c349dbc7Sjsg #define UMC_BASE__INST2_SEG4                       0
1444c349dbc7Sjsg #define UMC_BASE__INST2_SEG5                       0
1445c349dbc7Sjsg 
1446c349dbc7Sjsg #define UMC_BASE__INST3_SEG0                       0x00013320
1447c349dbc7Sjsg #define UMC_BASE__INST3_SEG1                       0x000D4000
1448c349dbc7Sjsg #define UMC_BASE__INST3_SEG2                       0x00426400
1449c349dbc7Sjsg #define UMC_BASE__INST3_SEG3                       0
1450c349dbc7Sjsg #define UMC_BASE__INST3_SEG4                       0
1451c349dbc7Sjsg #define UMC_BASE__INST3_SEG5                       0
1452c349dbc7Sjsg 
1453c349dbc7Sjsg #define UMC_BASE__INST4_SEG0                       0x00013340
1454c349dbc7Sjsg #define UMC_BASE__INST4_SEG1                       0x00114000
1455c349dbc7Sjsg #define UMC_BASE__INST4_SEG2                       0x00426800
1456c349dbc7Sjsg #define UMC_BASE__INST4_SEG3                       0
1457c349dbc7Sjsg #define UMC_BASE__INST4_SEG4                       0
1458c349dbc7Sjsg #define UMC_BASE__INST4_SEG5                       0
1459c349dbc7Sjsg 
1460c349dbc7Sjsg #define UMC_BASE__INST5_SEG0                       0x00013360
1461c349dbc7Sjsg #define UMC_BASE__INST5_SEG1                       0x00154000
1462c349dbc7Sjsg #define UMC_BASE__INST5_SEG2                       0x00426C00
1463c349dbc7Sjsg #define UMC_BASE__INST5_SEG3                       0
1464c349dbc7Sjsg #define UMC_BASE__INST5_SEG4                       0
1465c349dbc7Sjsg #define UMC_BASE__INST5_SEG5                       0
1466c349dbc7Sjsg 
1467c349dbc7Sjsg #define UMC_BASE__INST6_SEG0                       0x00013380
1468c349dbc7Sjsg #define UMC_BASE__INST6_SEG1                       0x00194000
1469c349dbc7Sjsg #define UMC_BASE__INST6_SEG2                       0x00427000
1470c349dbc7Sjsg #define UMC_BASE__INST6_SEG3                       0
1471c349dbc7Sjsg #define UMC_BASE__INST6_SEG4                       0
1472c349dbc7Sjsg #define UMC_BASE__INST6_SEG5                       0
1473c349dbc7Sjsg 
1474c349dbc7Sjsg #define UMC_BASE__INST7_SEG0                       0x000133A0
1475c349dbc7Sjsg #define UMC_BASE__INST7_SEG1                       0x001D4000
1476c349dbc7Sjsg #define UMC_BASE__INST7_SEG2                       0x00427400
1477c349dbc7Sjsg #define UMC_BASE__INST7_SEG3                       0
1478c349dbc7Sjsg #define UMC_BASE__INST7_SEG4                       0
1479c349dbc7Sjsg #define UMC_BASE__INST7_SEG5                       0
1480c349dbc7Sjsg 
1481c349dbc7Sjsg #define UVD_BASE__INST0_SEG0                       0x00007800
1482c349dbc7Sjsg #define UVD_BASE__INST0_SEG1                       0x00007E00
1483c349dbc7Sjsg #define UVD_BASE__INST0_SEG2                       0x00012180
1484c349dbc7Sjsg #define UVD_BASE__INST0_SEG3                       0x00403000
1485c349dbc7Sjsg #define UVD_BASE__INST0_SEG4                       0
1486c349dbc7Sjsg #define UVD_BASE__INST0_SEG5                       0
1487c349dbc7Sjsg 
1488c349dbc7Sjsg #define UVD_BASE__INST1_SEG0                       0x00007A00
1489c349dbc7Sjsg #define UVD_BASE__INST1_SEG1                       0x00009000
1490c349dbc7Sjsg #define UVD_BASE__INST1_SEG2                       0x000136E0
1491c349dbc7Sjsg #define UVD_BASE__INST1_SEG3                       0x0042DC00
1492c349dbc7Sjsg #define UVD_BASE__INST1_SEG4                       0
1493c349dbc7Sjsg #define UVD_BASE__INST1_SEG5                       0
1494c349dbc7Sjsg 
1495c349dbc7Sjsg #define UVD_BASE__INST2_SEG0                       0
1496c349dbc7Sjsg #define UVD_BASE__INST2_SEG1                       0
1497c349dbc7Sjsg #define UVD_BASE__INST2_SEG2                       0
1498c349dbc7Sjsg #define UVD_BASE__INST2_SEG3                       0
1499c349dbc7Sjsg #define UVD_BASE__INST2_SEG4                       0
1500c349dbc7Sjsg #define UVD_BASE__INST2_SEG5                       0
1501c349dbc7Sjsg 
1502c349dbc7Sjsg #define UVD_BASE__INST3_SEG0                       0
1503c349dbc7Sjsg #define UVD_BASE__INST3_SEG1                       0
1504c349dbc7Sjsg #define UVD_BASE__INST3_SEG2                       0
1505c349dbc7Sjsg #define UVD_BASE__INST3_SEG3                       0
1506c349dbc7Sjsg #define UVD_BASE__INST3_SEG4                       0
1507c349dbc7Sjsg #define UVD_BASE__INST3_SEG5                       0
1508c349dbc7Sjsg 
1509c349dbc7Sjsg #define UVD_BASE__INST4_SEG0                       0
1510c349dbc7Sjsg #define UVD_BASE__INST4_SEG1                       0
1511c349dbc7Sjsg #define UVD_BASE__INST4_SEG2                       0
1512c349dbc7Sjsg #define UVD_BASE__INST4_SEG3                       0
1513c349dbc7Sjsg #define UVD_BASE__INST4_SEG4                       0
1514c349dbc7Sjsg #define UVD_BASE__INST4_SEG5                       0
1515c349dbc7Sjsg 
1516c349dbc7Sjsg #define UVD_BASE__INST5_SEG0                       0
1517c349dbc7Sjsg #define UVD_BASE__INST5_SEG1                       0
1518c349dbc7Sjsg #define UVD_BASE__INST5_SEG2                       0
1519c349dbc7Sjsg #define UVD_BASE__INST5_SEG3                       0
1520c349dbc7Sjsg #define UVD_BASE__INST5_SEG4                       0
1521c349dbc7Sjsg #define UVD_BASE__INST5_SEG5                       0
1522c349dbc7Sjsg 
1523c349dbc7Sjsg #define UVD_BASE__INST6_SEG0                       0
1524c349dbc7Sjsg #define UVD_BASE__INST6_SEG1                       0
1525c349dbc7Sjsg #define UVD_BASE__INST6_SEG2                       0
1526c349dbc7Sjsg #define UVD_BASE__INST6_SEG3                       0
1527c349dbc7Sjsg #define UVD_BASE__INST6_SEG4                       0
1528c349dbc7Sjsg #define UVD_BASE__INST6_SEG5                       0
1529c349dbc7Sjsg 
1530c349dbc7Sjsg #define UVD_BASE__INST7_SEG0                       0
1531c349dbc7Sjsg #define UVD_BASE__INST7_SEG1                       0
1532c349dbc7Sjsg #define UVD_BASE__INST7_SEG2                       0
1533c349dbc7Sjsg #define UVD_BASE__INST7_SEG3                       0
1534c349dbc7Sjsg #define UVD_BASE__INST7_SEG4                       0
1535c349dbc7Sjsg #define UVD_BASE__INST7_SEG5                       0
1536c349dbc7Sjsg 
1537c349dbc7Sjsg #define DBGU_IO_BASE__INST0_SEG0                   0x000001E0
1538c349dbc7Sjsg #define DBGU_IO_BASE__INST0_SEG1                   0x000125A0
1539c349dbc7Sjsg #define DBGU_IO_BASE__INST0_SEG2                   0x0040B400
1540c349dbc7Sjsg #define DBGU_IO_BASE__INST0_SEG3                   0
1541c349dbc7Sjsg #define DBGU_IO_BASE__INST0_SEG4                   0
1542c349dbc7Sjsg #define DBGU_IO_BASE__INST0_SEG5                   0
1543c349dbc7Sjsg 
1544c349dbc7Sjsg #define DBGU_IO_BASE__INST1_SEG0                   0
1545c349dbc7Sjsg #define DBGU_IO_BASE__INST1_SEG1                   0
1546c349dbc7Sjsg #define DBGU_IO_BASE__INST1_SEG2                   0
1547c349dbc7Sjsg #define DBGU_IO_BASE__INST1_SEG3                   0
1548c349dbc7Sjsg #define DBGU_IO_BASE__INST1_SEG4                   0
1549c349dbc7Sjsg #define DBGU_IO_BASE__INST1_SEG5                   0
1550c349dbc7Sjsg 
1551c349dbc7Sjsg #define DBGU_IO_BASE__INST2_SEG0                   0
1552c349dbc7Sjsg #define DBGU_IO_BASE__INST2_SEG1                   0
1553c349dbc7Sjsg #define DBGU_IO_BASE__INST2_SEG2                   0
1554c349dbc7Sjsg #define DBGU_IO_BASE__INST2_SEG3                   0
1555c349dbc7Sjsg #define DBGU_IO_BASE__INST2_SEG4                   0
1556c349dbc7Sjsg #define DBGU_IO_BASE__INST2_SEG5                   0
1557c349dbc7Sjsg 
1558c349dbc7Sjsg #define DBGU_IO_BASE__INST3_SEG0                   0
1559c349dbc7Sjsg #define DBGU_IO_BASE__INST3_SEG1                   0
1560c349dbc7Sjsg #define DBGU_IO_BASE__INST3_SEG2                   0
1561c349dbc7Sjsg #define DBGU_IO_BASE__INST3_SEG3                   0
1562c349dbc7Sjsg #define DBGU_IO_BASE__INST3_SEG4                   0
1563c349dbc7Sjsg #define DBGU_IO_BASE__INST3_SEG5                   0
1564c349dbc7Sjsg 
1565c349dbc7Sjsg #define DBGU_IO_BASE__INST4_SEG0                   0
1566c349dbc7Sjsg #define DBGU_IO_BASE__INST4_SEG1                   0
1567c349dbc7Sjsg #define DBGU_IO_BASE__INST4_SEG2                   0
1568c349dbc7Sjsg #define DBGU_IO_BASE__INST4_SEG3                   0
1569c349dbc7Sjsg #define DBGU_IO_BASE__INST4_SEG4                   0
1570c349dbc7Sjsg #define DBGU_IO_BASE__INST4_SEG5                   0
1571c349dbc7Sjsg 
1572c349dbc7Sjsg #define DBGU_IO_BASE__INST5_SEG0                   0
1573c349dbc7Sjsg #define DBGU_IO_BASE__INST5_SEG1                   0
1574c349dbc7Sjsg #define DBGU_IO_BASE__INST5_SEG2                   0
1575c349dbc7Sjsg #define DBGU_IO_BASE__INST5_SEG3                   0
1576c349dbc7Sjsg #define DBGU_IO_BASE__INST5_SEG4                   0
1577c349dbc7Sjsg #define DBGU_IO_BASE__INST5_SEG5                   0
1578c349dbc7Sjsg 
1579c349dbc7Sjsg #define DBGU_IO_BASE__INST6_SEG0                   0
1580c349dbc7Sjsg #define DBGU_IO_BASE__INST6_SEG1                   0
1581c349dbc7Sjsg #define DBGU_IO_BASE__INST6_SEG2                   0
1582c349dbc7Sjsg #define DBGU_IO_BASE__INST6_SEG3                   0
1583c349dbc7Sjsg #define DBGU_IO_BASE__INST6_SEG4                   0
1584c349dbc7Sjsg #define DBGU_IO_BASE__INST6_SEG5                   0
1585c349dbc7Sjsg 
1586c349dbc7Sjsg #define DBGU_IO_BASE__INST7_SEG0                   0
1587c349dbc7Sjsg #define DBGU_IO_BASE__INST7_SEG1                   0
1588c349dbc7Sjsg #define DBGU_IO_BASE__INST7_SEG2                   0
1589c349dbc7Sjsg #define DBGU_IO_BASE__INST7_SEG3                   0
1590c349dbc7Sjsg #define DBGU_IO_BASE__INST7_SEG4                   0
1591c349dbc7Sjsg #define DBGU_IO_BASE__INST7_SEG5                   0
1592c349dbc7Sjsg 
1593c349dbc7Sjsg #define RSMU_BASE__INST0_SEG0                   0x00012000
1594c349dbc7Sjsg #define RSMU_BASE__INST0_SEG1                   0
1595c349dbc7Sjsg #define RSMU_BASE__INST0_SEG2                   0
1596c349dbc7Sjsg #define RSMU_BASE__INST0_SEG3                   0
1597c349dbc7Sjsg #define RSMU_BASE__INST0_SEG4                   0
1598c349dbc7Sjsg #define RSMU_BASE__INST0_SEG5                   0
1599c349dbc7Sjsg 
1600c349dbc7Sjsg #define RSMU_BASE__INST1_SEG0                   0
1601c349dbc7Sjsg #define RSMU_BASE__INST1_SEG1                   0
1602c349dbc7Sjsg #define RSMU_BASE__INST1_SEG2                   0
1603c349dbc7Sjsg #define RSMU_BASE__INST1_SEG3                   0
1604c349dbc7Sjsg #define RSMU_BASE__INST1_SEG4                   0
1605c349dbc7Sjsg #define RSMU_BASE__INST1_SEG5                   0
1606c349dbc7Sjsg 
1607c349dbc7Sjsg #define RSMU_BASE__INST2_SEG0                   0
1608c349dbc7Sjsg #define RSMU_BASE__INST2_SEG1                   0
1609c349dbc7Sjsg #define RSMU_BASE__INST2_SEG2                   0
1610c349dbc7Sjsg #define RSMU_BASE__INST2_SEG3                   0
1611c349dbc7Sjsg #define RSMU_BASE__INST2_SEG4                   0
1612c349dbc7Sjsg #define RSMU_BASE__INST2_SEG5                   0
1613c349dbc7Sjsg 
1614c349dbc7Sjsg #define RSMU_BASE__INST3_SEG0                   0
1615c349dbc7Sjsg #define RSMU_BASE__INST3_SEG1                   0
1616c349dbc7Sjsg #define RSMU_BASE__INST3_SEG2                   0
1617c349dbc7Sjsg #define RSMU_BASE__INST3_SEG3                   0
1618c349dbc7Sjsg #define RSMU_BASE__INST3_SEG4                   0
1619c349dbc7Sjsg #define RSMU_BASE__INST3_SEG5                   0
1620c349dbc7Sjsg 
1621c349dbc7Sjsg #define RSMU_BASE__INST4_SEG0                   0
1622c349dbc7Sjsg #define RSMU_BASE__INST4_SEG1                   0
1623c349dbc7Sjsg #define RSMU_BASE__INST4_SEG2                   0
1624c349dbc7Sjsg #define RSMU_BASE__INST4_SEG3                   0
1625c349dbc7Sjsg #define RSMU_BASE__INST4_SEG4                   0
1626c349dbc7Sjsg #define RSMU_BASE__INST4_SEG5                   0
1627c349dbc7Sjsg 
1628c349dbc7Sjsg #define RSMU_BASE__INST5_SEG0                   0
1629c349dbc7Sjsg #define RSMU_BASE__INST5_SEG1                   0
1630c349dbc7Sjsg #define RSMU_BASE__INST5_SEG2                   0
1631c349dbc7Sjsg #define RSMU_BASE__INST5_SEG3                   0
1632c349dbc7Sjsg #define RSMU_BASE__INST5_SEG4                   0
1633c349dbc7Sjsg #define RSMU_BASE__INST5_SEG5                   0
1634c349dbc7Sjsg 
1635c349dbc7Sjsg #define RSMU_BASE__INST6_SEG0                   0
1636c349dbc7Sjsg #define RSMU_BASE__INST6_SEG1                   0
1637c349dbc7Sjsg #define RSMU_BASE__INST6_SEG2                   0
1638c349dbc7Sjsg #define RSMU_BASE__INST6_SEG3                   0
1639c349dbc7Sjsg #define RSMU_BASE__INST6_SEG4                   0
1640c349dbc7Sjsg #define RSMU_BASE__INST6_SEG5                   0
1641c349dbc7Sjsg 
1642c349dbc7Sjsg #define RSMU_BASE__INST7_SEG0                   0
1643c349dbc7Sjsg #define RSMU_BASE__INST7_SEG1                   0
1644c349dbc7Sjsg #define RSMU_BASE__INST7_SEG2                   0
1645c349dbc7Sjsg #define RSMU_BASE__INST7_SEG3                   0
1646c349dbc7Sjsg #define RSMU_BASE__INST7_SEG4                   0
1647c349dbc7Sjsg #define RSMU_BASE__INST7_SEG5                   0
1648c349dbc7Sjsg 
1649c349dbc7Sjsg 
1650c349dbc7Sjsg #endif
1651