1*5ca02815Sjsg /* 2*5ca02815Sjsg * Copyright (C) 2020 Advanced Micro Devices, Inc. 3*5ca02815Sjsg * 4*5ca02815Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5*5ca02815Sjsg * copy of this software and associated documentation files (the "Software"), 6*5ca02815Sjsg * to deal in the Software without restriction, including without limitation 7*5ca02815Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*5ca02815Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9*5ca02815Sjsg * Software is furnished to do so, subject to the following conditions: 10*5ca02815Sjsg * 11*5ca02815Sjsg * The above copyright notice and this permission notice shall be included 12*5ca02815Sjsg * in all copies or substantial portions of the Software. 13*5ca02815Sjsg * 14*5ca02815Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15*5ca02815Sjsg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*5ca02815Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*5ca02815Sjsg * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18*5ca02815Sjsg * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19*5ca02815Sjsg * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20*5ca02815Sjsg */ 21*5ca02815Sjsg #ifndef _aldebaran_ip_offset_HEADER 22*5ca02815Sjsg #define _aldebaran_ip_offset_HEADER 23*5ca02815Sjsg 24*5ca02815Sjsg #define MAX_INSTANCE 7 25*5ca02815Sjsg #define MAX_SEGMENT 6 26*5ca02815Sjsg 27*5ca02815Sjsg struct IP_BASE_INSTANCE { 28*5ca02815Sjsg unsigned int segment[MAX_SEGMENT]; 29*5ca02815Sjsg }; 30*5ca02815Sjsg 31*5ca02815Sjsg struct IP_BASE { 32*5ca02815Sjsg struct IP_BASE_INSTANCE instance[MAX_INSTANCE]; 33*5ca02815Sjsg } __maybe_unused; 34*5ca02815Sjsg 35*5ca02815Sjsg static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C20, 0x02408C00, 0, 0, 0, 0 } }, 36*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 37*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 38*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 39*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 40*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 41*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 42*5ca02815Sjsg static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, 43*5ca02815Sjsg { { 0x00016E00, 0x02401C00, 0, 0, 0, 0 } }, 44*5ca02815Sjsg { { 0x00017000, 0x02402000, 0, 0, 0, 0 } }, 45*5ca02815Sjsg { { 0x00017200, 0x02402400, 0, 0, 0, 0 } }, 46*5ca02815Sjsg { { 0x0001B000, 0x0242D800, 0, 0, 0, 0 } }, 47*5ca02815Sjsg { { 0x0001B200, 0x0242DC00, 0, 0, 0, 0 } }, 48*5ca02815Sjsg { { 0x00017E00, 0x0240BC00, 0, 0, 0, 0 } } } }; 49*5ca02815Sjsg static const struct IP_BASE DBGU_IO0_BASE = { { { { 0x000001E0, 0x0240B400, 0, 0, 0, 0 } }, 50*5ca02815Sjsg { { 0x00000260, 0x02413C00, 0, 0, 0, 0 } }, 51*5ca02815Sjsg { { 0x00000280, 0x02416000, 0, 0, 0, 0 } }, 52*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 53*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 54*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 55*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 56*5ca02815Sjsg static const struct IP_BASE DF_BASE = { { { { 0x00007000, 0x0240B800, 0x07C00000, 0, 0, 0 } }, 57*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 58*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 59*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 60*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 61*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 62*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 63*5ca02815Sjsg static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } }, 64*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 65*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 66*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 67*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 68*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 69*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 70*5ca02815Sjsg static const struct IP_BASE GC_BASE = { { { { 0x00002000, 0x0000A000, 0x02402C00, 0, 0, 0 } }, 71*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 72*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 73*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 74*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 75*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 76*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 77*5ca02815Sjsg static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } }, 78*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 79*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 80*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 81*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 82*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 83*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 84*5ca02815Sjsg static const struct IP_BASE IOAGR0_BASE = { { { { 0x02419000, 0x056C0000, 0, 0, 0, 0 } }, 85*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 86*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 87*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 88*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 89*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 90*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 91*5ca02815Sjsg static const struct IP_BASE IOAPIC0_BASE = { { { { 0x00A00000, 0x0241F000, 0x050C0000, 0, 0, 0 } }, 92*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 93*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 94*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 95*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 96*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 97*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 98*5ca02815Sjsg static const struct IP_BASE IOHC0_BASE = { { { { 0x00010000, 0x02406000, 0x04EC0000, 0, 0, 0 } }, 99*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 100*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 101*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 102*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 103*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 104*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 105*5ca02815Sjsg static const struct IP_BASE L1IMUIOAGR0_BASE = { { { { 0x0240CC00, 0x05200000, 0, 0, 0, 0 } }, 106*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 107*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 108*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 109*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 110*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 111*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 112*5ca02815Sjsg static const struct IP_BASE L1IMUPCIE0_BASE = { { { { 0x0240C800, 0x051C0000, 0, 0, 0, 0 } }, 113*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 114*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 115*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 116*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 117*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 118*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 119*5ca02815Sjsg static const struct IP_BASE L2IMU0_BASE = { { { { 0x00007DC0, 0x00900000, 0x02407000, 0x04FC0000, 0x055C0000, 0 } }, 120*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 121*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 122*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 123*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 124*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 125*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 126*5ca02815Sjsg static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0x02408800, 0, 0, 0, 0 } }, 127*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 128*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 129*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 130*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 131*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 132*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 133*5ca02815Sjsg static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x0243FC00, 0 } }, 134*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 135*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 136*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 137*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 138*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 139*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 140*5ca02815Sjsg static const struct IP_BASE MP1_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x0243FC00, 0 } }, 141*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 142*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 143*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 144*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 145*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 146*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 147*5ca02815Sjsg static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } }, 148*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 149*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 150*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 151*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 152*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 153*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 154*5ca02815Sjsg static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0, 0 } }, 155*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 156*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 157*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 158*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 159*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 160*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 161*5ca02815Sjsg static const struct IP_BASE PCIE0_BASE = { { { { 0x02411800, 0x04440000, 0, 0, 0, 0 } }, 162*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 163*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 164*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 165*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 166*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 167*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 168*5ca02815Sjsg static const struct IP_BASE SDMA0_BASE = { { { { 0x00001260, 0x00012540, 0x0040A800, 0, 0, 0 } }, 169*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 170*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 171*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 172*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 173*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 174*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 175*5ca02815Sjsg static const struct IP_BASE SDMA1_BASE = { { { { 0x00001860, 0x00012560, 0x0040AC00, 0, 0, 0 } }, 176*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 177*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 178*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 179*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 180*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 181*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 182*5ca02815Sjsg static const struct IP_BASE SDMA2_BASE = { { { { 0x00013760, 0x0001E000, 0x0042EC00, 0, 0, 0 } }, 183*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 184*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 185*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 186*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 187*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 188*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 189*5ca02815Sjsg static const struct IP_BASE SDMA3_BASE = { { { { 0x00013780, 0x0001E400, 0x0042F000, 0, 0, 0 } }, 190*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 191*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 192*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 193*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 194*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 195*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 196*5ca02815Sjsg static const struct IP_BASE SDMA4_BASE = { { { { 0x000137A0, 0x0001E800, 0x0042F400, 0, 0, 0 } }, 197*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 198*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 199*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 200*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 201*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 202*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 203*5ca02815Sjsg static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0x00016A00, 0x02401000, 0x03440000, 0, 0 } }, 204*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 205*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 206*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 207*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 208*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 209*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 210*5ca02815Sjsg static const struct IP_BASE THM_BASE = { { { { 0x00016600, 0x02400C00, 0, 0, 0, 0 } }, 211*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 212*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 213*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 214*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 215*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 216*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 217*5ca02815Sjsg static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x00054000, 0x02425800, 0, 0, 0 } }, 218*5ca02815Sjsg { { 0x00094000, 0x000D4000, 0x02425C00, 0, 0, 0 } }, 219*5ca02815Sjsg { { 0x00114000, 0x00154000, 0x02426000, 0, 0, 0 } }, 220*5ca02815Sjsg { { 0x00194000, 0x001D4000, 0x02426400, 0, 0, 0 } }, 221*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 222*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 223*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 224*5ca02815Sjsg static const struct IP_BASE VCN_BASE = { { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0, 0 } }, 225*5ca02815Sjsg { { 0x00007A00, 0x00009000, 0x02445000, 0, 0, 0 } }, 226*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 227*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 228*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 229*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 230*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 231*5ca02815Sjsg static const struct IP_BASE WAFL0_BASE = { { { { 0x02438000, 0x04880000, 0, 0, 0, 0 } }, 232*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 233*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 234*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 235*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 236*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 237*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 238*5ca02815Sjsg static const struct IP_BASE WAFL1_BASE = { { { { 0, 0x01300000, 0x02410800, 0, 0, 0 } }, 239*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 240*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 241*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 242*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 243*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 244*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 245*5ca02815Sjsg static const struct IP_BASE XGMI0_BASE = { { { { 0x02438C00, 0x04680000, 0x04940000, 0, 0, 0 } }, 246*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 247*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 248*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 249*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 250*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 251*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 252*5ca02815Sjsg static const struct IP_BASE XGMI1_BASE = { { { { 0x02439000, 0x046C0000, 0x04980000, 0, 0, 0 } }, 253*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 254*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 255*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 256*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 257*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } }, 258*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 259*5ca02815Sjsg static const struct IP_BASE XGMI2_BASE = { { { { 0x04700000, 0x049C0000, 0, 0, 0, 0 } }, 260*5ca02815Sjsg { { 0x04740000, 0x04A00000, 0, 0, 0, 0 } }, 261*5ca02815Sjsg { { 0x04780000, 0x04A40000, 0, 0, 0, 0 } }, 262*5ca02815Sjsg { { 0x047C0000, 0x04A80000, 0, 0, 0, 0 } }, 263*5ca02815Sjsg { { 0x04800000, 0x04AC0000, 0, 0, 0, 0 } }, 264*5ca02815Sjsg { { 0x04840000, 0x04B00000, 0, 0, 0, 0 } }, 265*5ca02815Sjsg { { 0, 0, 0, 0, 0, 0 } } } }; 266*5ca02815Sjsg 267*5ca02815Sjsg 268*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG0 0x00000C20 269*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG1 0x02408C00 270*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG2 0 271*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG3 0 272*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG4 0 273*5ca02815Sjsg #define ATHUB_BASE__INST0_SEG5 0 274*5ca02815Sjsg 275*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG0 0 276*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG1 0 277*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG2 0 278*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG3 0 279*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG4 0 280*5ca02815Sjsg #define ATHUB_BASE__INST1_SEG5 0 281*5ca02815Sjsg 282*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG0 0 283*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG1 0 284*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG2 0 285*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG3 0 286*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG4 0 287*5ca02815Sjsg #define ATHUB_BASE__INST2_SEG5 0 288*5ca02815Sjsg 289*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG0 0 290*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG1 0 291*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG2 0 292*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG3 0 293*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG4 0 294*5ca02815Sjsg #define ATHUB_BASE__INST3_SEG5 0 295*5ca02815Sjsg 296*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG0 0 297*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG1 0 298*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG2 0 299*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG3 0 300*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG4 0 301*5ca02815Sjsg #define ATHUB_BASE__INST4_SEG5 0 302*5ca02815Sjsg 303*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG0 0 304*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG1 0 305*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG2 0 306*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG3 0 307*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG4 0 308*5ca02815Sjsg #define ATHUB_BASE__INST5_SEG5 0 309*5ca02815Sjsg 310*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG0 0 311*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG1 0 312*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG2 0 313*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG3 0 314*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG4 0 315*5ca02815Sjsg #define ATHUB_BASE__INST6_SEG5 0 316*5ca02815Sjsg 317*5ca02815Sjsg #define CLK_BASE__INST0_SEG0 0x00016C00 318*5ca02815Sjsg #define CLK_BASE__INST0_SEG1 0x02401800 319*5ca02815Sjsg #define CLK_BASE__INST0_SEG2 0 320*5ca02815Sjsg #define CLK_BASE__INST0_SEG3 0 321*5ca02815Sjsg #define CLK_BASE__INST0_SEG4 0 322*5ca02815Sjsg #define CLK_BASE__INST0_SEG5 0 323*5ca02815Sjsg 324*5ca02815Sjsg #define CLK_BASE__INST1_SEG0 0x00016E00 325*5ca02815Sjsg #define CLK_BASE__INST1_SEG1 0x02401C00 326*5ca02815Sjsg #define CLK_BASE__INST1_SEG2 0 327*5ca02815Sjsg #define CLK_BASE__INST1_SEG3 0 328*5ca02815Sjsg #define CLK_BASE__INST1_SEG4 0 329*5ca02815Sjsg #define CLK_BASE__INST1_SEG5 0 330*5ca02815Sjsg 331*5ca02815Sjsg #define CLK_BASE__INST2_SEG0 0x00017000 332*5ca02815Sjsg #define CLK_BASE__INST2_SEG1 0x02402000 333*5ca02815Sjsg #define CLK_BASE__INST2_SEG2 0 334*5ca02815Sjsg #define CLK_BASE__INST2_SEG3 0 335*5ca02815Sjsg #define CLK_BASE__INST2_SEG4 0 336*5ca02815Sjsg #define CLK_BASE__INST2_SEG5 0 337*5ca02815Sjsg 338*5ca02815Sjsg #define CLK_BASE__INST3_SEG0 0x00017200 339*5ca02815Sjsg #define CLK_BASE__INST3_SEG1 0x02402400 340*5ca02815Sjsg #define CLK_BASE__INST3_SEG2 0 341*5ca02815Sjsg #define CLK_BASE__INST3_SEG3 0 342*5ca02815Sjsg #define CLK_BASE__INST3_SEG4 0 343*5ca02815Sjsg #define CLK_BASE__INST3_SEG5 0 344*5ca02815Sjsg 345*5ca02815Sjsg #define CLK_BASE__INST4_SEG0 0x0001B000 346*5ca02815Sjsg #define CLK_BASE__INST4_SEG1 0x0242D800 347*5ca02815Sjsg #define CLK_BASE__INST4_SEG2 0 348*5ca02815Sjsg #define CLK_BASE__INST4_SEG3 0 349*5ca02815Sjsg #define CLK_BASE__INST4_SEG4 0 350*5ca02815Sjsg #define CLK_BASE__INST4_SEG5 0 351*5ca02815Sjsg 352*5ca02815Sjsg #define CLK_BASE__INST5_SEG0 0x0001B200 353*5ca02815Sjsg #define CLK_BASE__INST5_SEG1 0x0242DC00 354*5ca02815Sjsg #define CLK_BASE__INST5_SEG2 0 355*5ca02815Sjsg #define CLK_BASE__INST5_SEG3 0 356*5ca02815Sjsg #define CLK_BASE__INST5_SEG4 0 357*5ca02815Sjsg #define CLK_BASE__INST5_SEG5 0 358*5ca02815Sjsg 359*5ca02815Sjsg #define CLK_BASE__INST6_SEG0 0x00017E00 360*5ca02815Sjsg #define CLK_BASE__INST6_SEG1 0x0240BC00 361*5ca02815Sjsg #define CLK_BASE__INST6_SEG2 0 362*5ca02815Sjsg #define CLK_BASE__INST6_SEG3 0 363*5ca02815Sjsg #define CLK_BASE__INST6_SEG4 0 364*5ca02815Sjsg #define CLK_BASE__INST6_SEG5 0 365*5ca02815Sjsg 366*5ca02815Sjsg #define DBGU_IO0_BASE__INST0_SEG0 0x000001E0 367*5ca02815Sjsg #define DBGU_IO0_BASE__INST0_SEG1 0x0240B400 368*5ca02815Sjsg #define DBGU_IO0_BASE__INST0_SEG2 0 369*5ca02815Sjsg #define DBGU_IO0_BASE__INST0_SEG3 0 370*5ca02815Sjsg #define DBGU_IO0_BASE__INST0_SEG4 0 371*5ca02815Sjsg #define DBGU_IO0_BASE__INST0_SEG5 0 372*5ca02815Sjsg 373*5ca02815Sjsg #define DBGU_IO0_BASE__INST1_SEG0 0x00000260 374*5ca02815Sjsg #define DBGU_IO0_BASE__INST1_SEG1 0x02413C00 375*5ca02815Sjsg #define DBGU_IO0_BASE__INST1_SEG2 0 376*5ca02815Sjsg #define DBGU_IO0_BASE__INST1_SEG3 0 377*5ca02815Sjsg #define DBGU_IO0_BASE__INST1_SEG4 0 378*5ca02815Sjsg #define DBGU_IO0_BASE__INST1_SEG5 0 379*5ca02815Sjsg 380*5ca02815Sjsg #define DBGU_IO0_BASE__INST2_SEG0 0x00000280 381*5ca02815Sjsg #define DBGU_IO0_BASE__INST2_SEG1 0x02416000 382*5ca02815Sjsg #define DBGU_IO0_BASE__INST2_SEG2 0 383*5ca02815Sjsg #define DBGU_IO0_BASE__INST2_SEG3 0 384*5ca02815Sjsg #define DBGU_IO0_BASE__INST2_SEG4 0 385*5ca02815Sjsg #define DBGU_IO0_BASE__INST2_SEG5 0 386*5ca02815Sjsg 387*5ca02815Sjsg #define DBGU_IO0_BASE__INST3_SEG0 0 388*5ca02815Sjsg #define DBGU_IO0_BASE__INST3_SEG1 0 389*5ca02815Sjsg #define DBGU_IO0_BASE__INST3_SEG2 0 390*5ca02815Sjsg #define DBGU_IO0_BASE__INST3_SEG3 0 391*5ca02815Sjsg #define DBGU_IO0_BASE__INST3_SEG4 0 392*5ca02815Sjsg #define DBGU_IO0_BASE__INST3_SEG5 0 393*5ca02815Sjsg 394*5ca02815Sjsg #define DBGU_IO0_BASE__INST4_SEG0 0 395*5ca02815Sjsg #define DBGU_IO0_BASE__INST4_SEG1 0 396*5ca02815Sjsg #define DBGU_IO0_BASE__INST4_SEG2 0 397*5ca02815Sjsg #define DBGU_IO0_BASE__INST4_SEG3 0 398*5ca02815Sjsg #define DBGU_IO0_BASE__INST4_SEG4 0 399*5ca02815Sjsg #define DBGU_IO0_BASE__INST4_SEG5 0 400*5ca02815Sjsg 401*5ca02815Sjsg #define DBGU_IO0_BASE__INST5_SEG0 0 402*5ca02815Sjsg #define DBGU_IO0_BASE__INST5_SEG1 0 403*5ca02815Sjsg #define DBGU_IO0_BASE__INST5_SEG2 0 404*5ca02815Sjsg #define DBGU_IO0_BASE__INST5_SEG3 0 405*5ca02815Sjsg #define DBGU_IO0_BASE__INST5_SEG4 0 406*5ca02815Sjsg #define DBGU_IO0_BASE__INST5_SEG5 0 407*5ca02815Sjsg 408*5ca02815Sjsg #define DBGU_IO0_BASE__INST6_SEG0 0 409*5ca02815Sjsg #define DBGU_IO0_BASE__INST6_SEG1 0 410*5ca02815Sjsg #define DBGU_IO0_BASE__INST6_SEG2 0 411*5ca02815Sjsg #define DBGU_IO0_BASE__INST6_SEG3 0 412*5ca02815Sjsg #define DBGU_IO0_BASE__INST6_SEG4 0 413*5ca02815Sjsg #define DBGU_IO0_BASE__INST6_SEG5 0 414*5ca02815Sjsg 415*5ca02815Sjsg #define DF_BASE__INST0_SEG0 0x00007000 416*5ca02815Sjsg #define DF_BASE__INST0_SEG1 0x0240B800 417*5ca02815Sjsg #define DF_BASE__INST0_SEG2 0x07C00000 418*5ca02815Sjsg #define DF_BASE__INST0_SEG3 0 419*5ca02815Sjsg #define DF_BASE__INST0_SEG4 0 420*5ca02815Sjsg #define DF_BASE__INST0_SEG5 0 421*5ca02815Sjsg 422*5ca02815Sjsg #define DF_BASE__INST1_SEG0 0 423*5ca02815Sjsg #define DF_BASE__INST1_SEG1 0 424*5ca02815Sjsg #define DF_BASE__INST1_SEG2 0 425*5ca02815Sjsg #define DF_BASE__INST1_SEG3 0 426*5ca02815Sjsg #define DF_BASE__INST1_SEG4 0 427*5ca02815Sjsg #define DF_BASE__INST1_SEG5 0 428*5ca02815Sjsg 429*5ca02815Sjsg #define DF_BASE__INST2_SEG0 0 430*5ca02815Sjsg #define DF_BASE__INST2_SEG1 0 431*5ca02815Sjsg #define DF_BASE__INST2_SEG2 0 432*5ca02815Sjsg #define DF_BASE__INST2_SEG3 0 433*5ca02815Sjsg #define DF_BASE__INST2_SEG4 0 434*5ca02815Sjsg #define DF_BASE__INST2_SEG5 0 435*5ca02815Sjsg 436*5ca02815Sjsg #define DF_BASE__INST3_SEG0 0 437*5ca02815Sjsg #define DF_BASE__INST3_SEG1 0 438*5ca02815Sjsg #define DF_BASE__INST3_SEG2 0 439*5ca02815Sjsg #define DF_BASE__INST3_SEG3 0 440*5ca02815Sjsg #define DF_BASE__INST3_SEG4 0 441*5ca02815Sjsg #define DF_BASE__INST3_SEG5 0 442*5ca02815Sjsg 443*5ca02815Sjsg #define DF_BASE__INST4_SEG0 0 444*5ca02815Sjsg #define DF_BASE__INST4_SEG1 0 445*5ca02815Sjsg #define DF_BASE__INST4_SEG2 0 446*5ca02815Sjsg #define DF_BASE__INST4_SEG3 0 447*5ca02815Sjsg #define DF_BASE__INST4_SEG4 0 448*5ca02815Sjsg #define DF_BASE__INST4_SEG5 0 449*5ca02815Sjsg 450*5ca02815Sjsg #define DF_BASE__INST5_SEG0 0 451*5ca02815Sjsg #define DF_BASE__INST5_SEG1 0 452*5ca02815Sjsg #define DF_BASE__INST5_SEG2 0 453*5ca02815Sjsg #define DF_BASE__INST5_SEG3 0 454*5ca02815Sjsg #define DF_BASE__INST5_SEG4 0 455*5ca02815Sjsg #define DF_BASE__INST5_SEG5 0 456*5ca02815Sjsg 457*5ca02815Sjsg #define DF_BASE__INST6_SEG0 0 458*5ca02815Sjsg #define DF_BASE__INST6_SEG1 0 459*5ca02815Sjsg #define DF_BASE__INST6_SEG2 0 460*5ca02815Sjsg #define DF_BASE__INST6_SEG3 0 461*5ca02815Sjsg #define DF_BASE__INST6_SEG4 0 462*5ca02815Sjsg #define DF_BASE__INST6_SEG5 0 463*5ca02815Sjsg 464*5ca02815Sjsg #define FUSE_BASE__INST0_SEG0 0x00017400 465*5ca02815Sjsg #define FUSE_BASE__INST0_SEG1 0x02401400 466*5ca02815Sjsg #define FUSE_BASE__INST0_SEG2 0 467*5ca02815Sjsg #define FUSE_BASE__INST0_SEG3 0 468*5ca02815Sjsg #define FUSE_BASE__INST0_SEG4 0 469*5ca02815Sjsg #define FUSE_BASE__INST0_SEG5 0 470*5ca02815Sjsg 471*5ca02815Sjsg #define FUSE_BASE__INST1_SEG0 0 472*5ca02815Sjsg #define FUSE_BASE__INST1_SEG1 0 473*5ca02815Sjsg #define FUSE_BASE__INST1_SEG2 0 474*5ca02815Sjsg #define FUSE_BASE__INST1_SEG3 0 475*5ca02815Sjsg #define FUSE_BASE__INST1_SEG4 0 476*5ca02815Sjsg #define FUSE_BASE__INST1_SEG5 0 477*5ca02815Sjsg 478*5ca02815Sjsg #define FUSE_BASE__INST2_SEG0 0 479*5ca02815Sjsg #define FUSE_BASE__INST2_SEG1 0 480*5ca02815Sjsg #define FUSE_BASE__INST2_SEG2 0 481*5ca02815Sjsg #define FUSE_BASE__INST2_SEG3 0 482*5ca02815Sjsg #define FUSE_BASE__INST2_SEG4 0 483*5ca02815Sjsg #define FUSE_BASE__INST2_SEG5 0 484*5ca02815Sjsg 485*5ca02815Sjsg #define FUSE_BASE__INST3_SEG0 0 486*5ca02815Sjsg #define FUSE_BASE__INST3_SEG1 0 487*5ca02815Sjsg #define FUSE_BASE__INST3_SEG2 0 488*5ca02815Sjsg #define FUSE_BASE__INST3_SEG3 0 489*5ca02815Sjsg #define FUSE_BASE__INST3_SEG4 0 490*5ca02815Sjsg #define FUSE_BASE__INST3_SEG5 0 491*5ca02815Sjsg 492*5ca02815Sjsg #define FUSE_BASE__INST4_SEG0 0 493*5ca02815Sjsg #define FUSE_BASE__INST4_SEG1 0 494*5ca02815Sjsg #define FUSE_BASE__INST4_SEG2 0 495*5ca02815Sjsg #define FUSE_BASE__INST4_SEG3 0 496*5ca02815Sjsg #define FUSE_BASE__INST4_SEG4 0 497*5ca02815Sjsg #define FUSE_BASE__INST4_SEG5 0 498*5ca02815Sjsg 499*5ca02815Sjsg #define FUSE_BASE__INST5_SEG0 0 500*5ca02815Sjsg #define FUSE_BASE__INST5_SEG1 0 501*5ca02815Sjsg #define FUSE_BASE__INST5_SEG2 0 502*5ca02815Sjsg #define FUSE_BASE__INST5_SEG3 0 503*5ca02815Sjsg #define FUSE_BASE__INST5_SEG4 0 504*5ca02815Sjsg #define FUSE_BASE__INST5_SEG5 0 505*5ca02815Sjsg 506*5ca02815Sjsg #define FUSE_BASE__INST6_SEG0 0 507*5ca02815Sjsg #define FUSE_BASE__INST6_SEG1 0 508*5ca02815Sjsg #define FUSE_BASE__INST6_SEG2 0 509*5ca02815Sjsg #define FUSE_BASE__INST6_SEG3 0 510*5ca02815Sjsg #define FUSE_BASE__INST6_SEG4 0 511*5ca02815Sjsg #define FUSE_BASE__INST6_SEG5 0 512*5ca02815Sjsg 513*5ca02815Sjsg #define GC_BASE__INST0_SEG0 0x00002000 514*5ca02815Sjsg #define GC_BASE__INST0_SEG1 0x0000A000 515*5ca02815Sjsg #define GC_BASE__INST0_SEG2 0x02402C00 516*5ca02815Sjsg #define GC_BASE__INST0_SEG3 0 517*5ca02815Sjsg #define GC_BASE__INST0_SEG4 0 518*5ca02815Sjsg #define GC_BASE__INST0_SEG5 0 519*5ca02815Sjsg 520*5ca02815Sjsg #define GC_BASE__INST1_SEG0 0 521*5ca02815Sjsg #define GC_BASE__INST1_SEG1 0 522*5ca02815Sjsg #define GC_BASE__INST1_SEG2 0 523*5ca02815Sjsg #define GC_BASE__INST1_SEG3 0 524*5ca02815Sjsg #define GC_BASE__INST1_SEG4 0 525*5ca02815Sjsg #define GC_BASE__INST1_SEG5 0 526*5ca02815Sjsg 527*5ca02815Sjsg #define GC_BASE__INST2_SEG0 0 528*5ca02815Sjsg #define GC_BASE__INST2_SEG1 0 529*5ca02815Sjsg #define GC_BASE__INST2_SEG2 0 530*5ca02815Sjsg #define GC_BASE__INST2_SEG3 0 531*5ca02815Sjsg #define GC_BASE__INST2_SEG4 0 532*5ca02815Sjsg #define GC_BASE__INST2_SEG5 0 533*5ca02815Sjsg 534*5ca02815Sjsg #define GC_BASE__INST3_SEG0 0 535*5ca02815Sjsg #define GC_BASE__INST3_SEG1 0 536*5ca02815Sjsg #define GC_BASE__INST3_SEG2 0 537*5ca02815Sjsg #define GC_BASE__INST3_SEG3 0 538*5ca02815Sjsg #define GC_BASE__INST3_SEG4 0 539*5ca02815Sjsg #define GC_BASE__INST3_SEG5 0 540*5ca02815Sjsg 541*5ca02815Sjsg #define GC_BASE__INST4_SEG0 0 542*5ca02815Sjsg #define GC_BASE__INST4_SEG1 0 543*5ca02815Sjsg #define GC_BASE__INST4_SEG2 0 544*5ca02815Sjsg #define GC_BASE__INST4_SEG3 0 545*5ca02815Sjsg #define GC_BASE__INST4_SEG4 0 546*5ca02815Sjsg #define GC_BASE__INST4_SEG5 0 547*5ca02815Sjsg 548*5ca02815Sjsg #define GC_BASE__INST5_SEG0 0 549*5ca02815Sjsg #define GC_BASE__INST5_SEG1 0 550*5ca02815Sjsg #define GC_BASE__INST5_SEG2 0 551*5ca02815Sjsg #define GC_BASE__INST5_SEG3 0 552*5ca02815Sjsg #define GC_BASE__INST5_SEG4 0 553*5ca02815Sjsg #define GC_BASE__INST5_SEG5 0 554*5ca02815Sjsg 555*5ca02815Sjsg #define GC_BASE__INST6_SEG0 0 556*5ca02815Sjsg #define GC_BASE__INST6_SEG1 0 557*5ca02815Sjsg #define GC_BASE__INST6_SEG2 0 558*5ca02815Sjsg #define GC_BASE__INST6_SEG3 0 559*5ca02815Sjsg #define GC_BASE__INST6_SEG4 0 560*5ca02815Sjsg #define GC_BASE__INST6_SEG5 0 561*5ca02815Sjsg 562*5ca02815Sjsg #define HDP_BASE__INST0_SEG0 0x00000F20 563*5ca02815Sjsg #define HDP_BASE__INST0_SEG1 0x0240A400 564*5ca02815Sjsg #define HDP_BASE__INST0_SEG2 0 565*5ca02815Sjsg #define HDP_BASE__INST0_SEG3 0 566*5ca02815Sjsg #define HDP_BASE__INST0_SEG4 0 567*5ca02815Sjsg #define HDP_BASE__INST0_SEG5 0 568*5ca02815Sjsg 569*5ca02815Sjsg #define HDP_BASE__INST1_SEG0 0 570*5ca02815Sjsg #define HDP_BASE__INST1_SEG1 0 571*5ca02815Sjsg #define HDP_BASE__INST1_SEG2 0 572*5ca02815Sjsg #define HDP_BASE__INST1_SEG3 0 573*5ca02815Sjsg #define HDP_BASE__INST1_SEG4 0 574*5ca02815Sjsg #define HDP_BASE__INST1_SEG5 0 575*5ca02815Sjsg 576*5ca02815Sjsg #define HDP_BASE__INST2_SEG0 0 577*5ca02815Sjsg #define HDP_BASE__INST2_SEG1 0 578*5ca02815Sjsg #define HDP_BASE__INST2_SEG2 0 579*5ca02815Sjsg #define HDP_BASE__INST2_SEG3 0 580*5ca02815Sjsg #define HDP_BASE__INST2_SEG4 0 581*5ca02815Sjsg #define HDP_BASE__INST2_SEG5 0 582*5ca02815Sjsg 583*5ca02815Sjsg #define HDP_BASE__INST3_SEG0 0 584*5ca02815Sjsg #define HDP_BASE__INST3_SEG1 0 585*5ca02815Sjsg #define HDP_BASE__INST3_SEG2 0 586*5ca02815Sjsg #define HDP_BASE__INST3_SEG3 0 587*5ca02815Sjsg #define HDP_BASE__INST3_SEG4 0 588*5ca02815Sjsg #define HDP_BASE__INST3_SEG5 0 589*5ca02815Sjsg 590*5ca02815Sjsg #define HDP_BASE__INST4_SEG0 0 591*5ca02815Sjsg #define HDP_BASE__INST4_SEG1 0 592*5ca02815Sjsg #define HDP_BASE__INST4_SEG2 0 593*5ca02815Sjsg #define HDP_BASE__INST4_SEG3 0 594*5ca02815Sjsg #define HDP_BASE__INST4_SEG4 0 595*5ca02815Sjsg #define HDP_BASE__INST4_SEG5 0 596*5ca02815Sjsg 597*5ca02815Sjsg #define HDP_BASE__INST5_SEG0 0 598*5ca02815Sjsg #define HDP_BASE__INST5_SEG1 0 599*5ca02815Sjsg #define HDP_BASE__INST5_SEG2 0 600*5ca02815Sjsg #define HDP_BASE__INST5_SEG3 0 601*5ca02815Sjsg #define HDP_BASE__INST5_SEG4 0 602*5ca02815Sjsg #define HDP_BASE__INST5_SEG5 0 603*5ca02815Sjsg 604*5ca02815Sjsg #define HDP_BASE__INST6_SEG0 0 605*5ca02815Sjsg #define HDP_BASE__INST6_SEG1 0 606*5ca02815Sjsg #define HDP_BASE__INST6_SEG2 0 607*5ca02815Sjsg #define HDP_BASE__INST6_SEG3 0 608*5ca02815Sjsg #define HDP_BASE__INST6_SEG4 0 609*5ca02815Sjsg #define HDP_BASE__INST6_SEG5 0 610*5ca02815Sjsg 611*5ca02815Sjsg #define IOAGR0_BASE__INST0_SEG0 0x02419000 612*5ca02815Sjsg #define IOAGR0_BASE__INST0_SEG1 0x056C0000 613*5ca02815Sjsg #define IOAGR0_BASE__INST0_SEG2 0 614*5ca02815Sjsg #define IOAGR0_BASE__INST0_SEG3 0 615*5ca02815Sjsg #define IOAGR0_BASE__INST0_SEG4 0 616*5ca02815Sjsg #define IOAGR0_BASE__INST0_SEG5 0 617*5ca02815Sjsg 618*5ca02815Sjsg #define IOAGR0_BASE__INST1_SEG0 0 619*5ca02815Sjsg #define IOAGR0_BASE__INST1_SEG1 0 620*5ca02815Sjsg #define IOAGR0_BASE__INST1_SEG2 0 621*5ca02815Sjsg #define IOAGR0_BASE__INST1_SEG3 0 622*5ca02815Sjsg #define IOAGR0_BASE__INST1_SEG4 0 623*5ca02815Sjsg #define IOAGR0_BASE__INST1_SEG5 0 624*5ca02815Sjsg 625*5ca02815Sjsg #define IOAGR0_BASE__INST2_SEG0 0 626*5ca02815Sjsg #define IOAGR0_BASE__INST2_SEG1 0 627*5ca02815Sjsg #define IOAGR0_BASE__INST2_SEG2 0 628*5ca02815Sjsg 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#define IOHC0_BASE__INST0_SEG3 0 713*5ca02815Sjsg #define IOHC0_BASE__INST0_SEG4 0 714*5ca02815Sjsg #define IOHC0_BASE__INST0_SEG5 0 715*5ca02815Sjsg 716*5ca02815Sjsg #define IOHC0_BASE__INST1_SEG0 0 717*5ca02815Sjsg #define IOHC0_BASE__INST1_SEG1 0 718*5ca02815Sjsg #define IOHC0_BASE__INST1_SEG2 0 719*5ca02815Sjsg #define IOHC0_BASE__INST1_SEG3 0 720*5ca02815Sjsg #define IOHC0_BASE__INST1_SEG4 0 721*5ca02815Sjsg #define IOHC0_BASE__INST1_SEG5 0 722*5ca02815Sjsg 723*5ca02815Sjsg #define IOHC0_BASE__INST2_SEG0 0 724*5ca02815Sjsg #define IOHC0_BASE__INST2_SEG1 0 725*5ca02815Sjsg #define IOHC0_BASE__INST2_SEG2 0 726*5ca02815Sjsg #define IOHC0_BASE__INST2_SEG3 0 727*5ca02815Sjsg #define IOHC0_BASE__INST2_SEG4 0 728*5ca02815Sjsg #define IOHC0_BASE__INST2_SEG5 0 729*5ca02815Sjsg 730*5ca02815Sjsg #define IOHC0_BASE__INST3_SEG0 0 731*5ca02815Sjsg #define IOHC0_BASE__INST3_SEG1 0 732*5ca02815Sjsg #define IOHC0_BASE__INST3_SEG2 0 733*5ca02815Sjsg #define IOHC0_BASE__INST3_SEG3 0 734*5ca02815Sjsg #define IOHC0_BASE__INST3_SEG4 0 735*5ca02815Sjsg #define IOHC0_BASE__INST3_SEG5 0 736*5ca02815Sjsg 737*5ca02815Sjsg #define IOHC0_BASE__INST4_SEG0 0 738*5ca02815Sjsg #define IOHC0_BASE__INST4_SEG1 0 739*5ca02815Sjsg #define IOHC0_BASE__INST4_SEG2 0 740*5ca02815Sjsg #define IOHC0_BASE__INST4_SEG3 0 741*5ca02815Sjsg #define IOHC0_BASE__INST4_SEG4 0 742*5ca02815Sjsg #define IOHC0_BASE__INST4_SEG5 0 743*5ca02815Sjsg 744*5ca02815Sjsg #define IOHC0_BASE__INST5_SEG0 0 745*5ca02815Sjsg #define IOHC0_BASE__INST5_SEG1 0 746*5ca02815Sjsg #define IOHC0_BASE__INST5_SEG2 0 747*5ca02815Sjsg #define IOHC0_BASE__INST5_SEG3 0 748*5ca02815Sjsg #define IOHC0_BASE__INST5_SEG4 0 749*5ca02815Sjsg #define IOHC0_BASE__INST5_SEG5 0 750*5ca02815Sjsg 751*5ca02815Sjsg #define IOHC0_BASE__INST6_SEG0 0 752*5ca02815Sjsg #define IOHC0_BASE__INST6_SEG1 0 753*5ca02815Sjsg #define IOHC0_BASE__INST6_SEG2 0 754*5ca02815Sjsg #define IOHC0_BASE__INST6_SEG3 0 755*5ca02815Sjsg #define IOHC0_BASE__INST6_SEG4 0 756*5ca02815Sjsg #define IOHC0_BASE__INST6_SEG5 0 757*5ca02815Sjsg 758*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST0_SEG0 0x0240CC00 759*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST0_SEG1 0x05200000 760*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST0_SEG2 0 761*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST0_SEG3 0 762*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST0_SEG4 0 763*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST0_SEG5 0 764*5ca02815Sjsg 765*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST1_SEG0 0 766*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST1_SEG1 0 767*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST1_SEG2 0 768*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST1_SEG3 0 769*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST1_SEG4 0 770*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST1_SEG5 0 771*5ca02815Sjsg 772*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST2_SEG0 0 773*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST2_SEG1 0 774*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST2_SEG2 0 775*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST2_SEG3 0 776*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST2_SEG4 0 777*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST2_SEG5 0 778*5ca02815Sjsg 779*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST3_SEG0 0 780*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST3_SEG1 0 781*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST3_SEG2 0 782*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST3_SEG3 0 783*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST3_SEG4 0 784*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST3_SEG5 0 785*5ca02815Sjsg 786*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST4_SEG0 0 787*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST4_SEG1 0 788*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST4_SEG2 0 789*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST4_SEG3 0 790*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST4_SEG4 0 791*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST4_SEG5 0 792*5ca02815Sjsg 793*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST5_SEG0 0 794*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST5_SEG1 0 795*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST5_SEG2 0 796*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST5_SEG3 0 797*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST5_SEG4 0 798*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST5_SEG5 0 799*5ca02815Sjsg 800*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST6_SEG0 0 801*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST6_SEG1 0 802*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST6_SEG2 0 803*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST6_SEG3 0 804*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST6_SEG4 0 805*5ca02815Sjsg #define L1IMUIOAGR0_BASE__INST6_SEG5 0 806*5ca02815Sjsg 807*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST0_SEG0 0x0240C800 808*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST0_SEG1 0x051C0000 809*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST0_SEG2 0 810*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST0_SEG3 0 811*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST0_SEG4 0 812*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST0_SEG5 0 813*5ca02815Sjsg 814*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST1_SEG0 0 815*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST1_SEG1 0 816*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST1_SEG2 0 817*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST1_SEG3 0 818*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST1_SEG4 0 819*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST1_SEG5 0 820*5ca02815Sjsg 821*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST2_SEG0 0 822*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST2_SEG1 0 823*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST2_SEG2 0 824*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST2_SEG3 0 825*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST2_SEG4 0 826*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST2_SEG5 0 827*5ca02815Sjsg 828*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST3_SEG0 0 829*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST3_SEG1 0 830*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST3_SEG2 0 831*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST3_SEG3 0 832*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST3_SEG4 0 833*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST3_SEG5 0 834*5ca02815Sjsg 835*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST4_SEG0 0 836*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST4_SEG1 0 837*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST4_SEG2 0 838*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST4_SEG3 0 839*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST4_SEG4 0 840*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST4_SEG5 0 841*5ca02815Sjsg 842*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST5_SEG0 0 843*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST5_SEG1 0 844*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST5_SEG2 0 845*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST5_SEG3 0 846*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST5_SEG4 0 847*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST5_SEG5 0 848*5ca02815Sjsg 849*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST6_SEG0 0 850*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST6_SEG1 0 851*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST6_SEG2 0 852*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST6_SEG3 0 853*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST6_SEG4 0 854*5ca02815Sjsg #define L1IMUPCIE0_BASE__INST6_SEG5 0 855*5ca02815Sjsg 856*5ca02815Sjsg #define L2IMU0_BASE__INST0_SEG0 0x00007DC0 857*5ca02815Sjsg #define L2IMU0_BASE__INST0_SEG1 0x00900000 858*5ca02815Sjsg #define L2IMU0_BASE__INST0_SEG2 0x02407000 859*5ca02815Sjsg #define L2IMU0_BASE__INST0_SEG3 0x04FC0000 860*5ca02815Sjsg #define L2IMU0_BASE__INST0_SEG4 0x055C0000 861*5ca02815Sjsg #define L2IMU0_BASE__INST0_SEG5 0 862*5ca02815Sjsg 863*5ca02815Sjsg #define L2IMU0_BASE__INST1_SEG0 0 864*5ca02815Sjsg #define L2IMU0_BASE__INST1_SEG1 0 865*5ca02815Sjsg #define L2IMU0_BASE__INST1_SEG2 0 866*5ca02815Sjsg #define L2IMU0_BASE__INST1_SEG3 0 867*5ca02815Sjsg #define L2IMU0_BASE__INST1_SEG4 0 868*5ca02815Sjsg #define L2IMU0_BASE__INST1_SEG5 0 869*5ca02815Sjsg 870*5ca02815Sjsg #define L2IMU0_BASE__INST2_SEG0 0 871*5ca02815Sjsg #define L2IMU0_BASE__INST2_SEG1 0 872*5ca02815Sjsg #define L2IMU0_BASE__INST2_SEG2 0 873*5ca02815Sjsg #define L2IMU0_BASE__INST2_SEG3 0 874*5ca02815Sjsg #define L2IMU0_BASE__INST2_SEG4 0 875*5ca02815Sjsg #define L2IMU0_BASE__INST2_SEG5 0 876*5ca02815Sjsg 877*5ca02815Sjsg #define L2IMU0_BASE__INST3_SEG0 0 878*5ca02815Sjsg #define L2IMU0_BASE__INST3_SEG1 0 879*5ca02815Sjsg #define L2IMU0_BASE__INST3_SEG2 0 880*5ca02815Sjsg #define L2IMU0_BASE__INST3_SEG3 0 881*5ca02815Sjsg #define L2IMU0_BASE__INST3_SEG4 0 882*5ca02815Sjsg #define L2IMU0_BASE__INST3_SEG5 0 883*5ca02815Sjsg 884*5ca02815Sjsg #define L2IMU0_BASE__INST4_SEG0 0 885*5ca02815Sjsg #define L2IMU0_BASE__INST4_SEG1 0 886*5ca02815Sjsg #define L2IMU0_BASE__INST4_SEG2 0 887*5ca02815Sjsg #define L2IMU0_BASE__INST4_SEG3 0 888*5ca02815Sjsg #define L2IMU0_BASE__INST4_SEG4 0 889*5ca02815Sjsg #define L2IMU0_BASE__INST4_SEG5 0 890*5ca02815Sjsg 891*5ca02815Sjsg #define L2IMU0_BASE__INST5_SEG0 0 892*5ca02815Sjsg #define L2IMU0_BASE__INST5_SEG1 0 893*5ca02815Sjsg #define L2IMU0_BASE__INST5_SEG2 0 894*5ca02815Sjsg #define L2IMU0_BASE__INST5_SEG3 0 895*5ca02815Sjsg #define L2IMU0_BASE__INST5_SEG4 0 896*5ca02815Sjsg #define L2IMU0_BASE__INST5_SEG5 0 897*5ca02815Sjsg 898*5ca02815Sjsg #define L2IMU0_BASE__INST6_SEG0 0 899*5ca02815Sjsg #define L2IMU0_BASE__INST6_SEG1 0 900*5ca02815Sjsg #define L2IMU0_BASE__INST6_SEG2 0 901*5ca02815Sjsg #define L2IMU0_BASE__INST6_SEG3 0 902*5ca02815Sjsg #define L2IMU0_BASE__INST6_SEG4 0 903*5ca02815Sjsg #define L2IMU0_BASE__INST6_SEG5 0 904*5ca02815Sjsg 905*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG0 0x0001A000 906*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG1 0x02408800 907*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG2 0 908*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG3 0 909*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG4 0 910*5ca02815Sjsg #define MMHUB_BASE__INST0_SEG5 0 911*5ca02815Sjsg 912*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG0 0 913*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG1 0 914*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG2 0 915*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG3 0 916*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG4 0 917*5ca02815Sjsg #define MMHUB_BASE__INST1_SEG5 0 918*5ca02815Sjsg 919*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG0 0 920*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG1 0 921*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG2 0 922*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG3 0 923*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG4 0 924*5ca02815Sjsg #define MMHUB_BASE__INST2_SEG5 0 925*5ca02815Sjsg 926*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG0 0 927*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG1 0 928*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG2 0 929*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG3 0 930*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG4 0 931*5ca02815Sjsg #define MMHUB_BASE__INST3_SEG5 0 932*5ca02815Sjsg 933*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG0 0 934*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG1 0 935*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG2 0 936*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG3 0 937*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG4 0 938*5ca02815Sjsg #define MMHUB_BASE__INST4_SEG5 0 939*5ca02815Sjsg 940*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG0 0 941*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG1 0 942*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG2 0 943*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG3 0 944*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG4 0 945*5ca02815Sjsg #define MMHUB_BASE__INST5_SEG5 0 946*5ca02815Sjsg 947*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG0 0 948*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG1 0 949*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG2 0 950*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG3 0 951*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG4 0 952*5ca02815Sjsg #define MMHUB_BASE__INST6_SEG5 0 953*5ca02815Sjsg 954*5ca02815Sjsg #define MP0_BASE__INST0_SEG0 0x00016000 955*5ca02815Sjsg #define MP0_BASE__INST0_SEG1 0x00DC0000 956*5ca02815Sjsg #define MP0_BASE__INST0_SEG2 0x00E00000 957*5ca02815Sjsg #define MP0_BASE__INST0_SEG3 0x00E40000 958*5ca02815Sjsg #define MP0_BASE__INST0_SEG4 0x0243FC00 959*5ca02815Sjsg #define MP0_BASE__INST0_SEG5 0 960*5ca02815Sjsg 961*5ca02815Sjsg #define MP0_BASE__INST1_SEG0 0 962*5ca02815Sjsg #define MP0_BASE__INST1_SEG1 0 963*5ca02815Sjsg #define MP0_BASE__INST1_SEG2 0 964*5ca02815Sjsg #define MP0_BASE__INST1_SEG3 0 965*5ca02815Sjsg #define MP0_BASE__INST1_SEG4 0 966*5ca02815Sjsg #define MP0_BASE__INST1_SEG5 0 967*5ca02815Sjsg 968*5ca02815Sjsg #define MP0_BASE__INST2_SEG0 0 969*5ca02815Sjsg #define MP0_BASE__INST2_SEG1 0 970*5ca02815Sjsg #define MP0_BASE__INST2_SEG2 0 971*5ca02815Sjsg #define MP0_BASE__INST2_SEG3 0 972*5ca02815Sjsg #define MP0_BASE__INST2_SEG4 0 973*5ca02815Sjsg #define MP0_BASE__INST2_SEG5 0 974*5ca02815Sjsg 975*5ca02815Sjsg #define MP0_BASE__INST3_SEG0 0 976*5ca02815Sjsg #define MP0_BASE__INST3_SEG1 0 977*5ca02815Sjsg #define MP0_BASE__INST3_SEG2 0 978*5ca02815Sjsg #define MP0_BASE__INST3_SEG3 0 979*5ca02815Sjsg #define MP0_BASE__INST3_SEG4 0 980*5ca02815Sjsg #define MP0_BASE__INST3_SEG5 0 981*5ca02815Sjsg 982*5ca02815Sjsg #define MP0_BASE__INST4_SEG0 0 983*5ca02815Sjsg #define MP0_BASE__INST4_SEG1 0 984*5ca02815Sjsg #define MP0_BASE__INST4_SEG2 0 985*5ca02815Sjsg #define MP0_BASE__INST4_SEG3 0 986*5ca02815Sjsg #define MP0_BASE__INST4_SEG4 0 987*5ca02815Sjsg #define MP0_BASE__INST4_SEG5 0 988*5ca02815Sjsg 989*5ca02815Sjsg #define MP0_BASE__INST5_SEG0 0 990*5ca02815Sjsg #define MP0_BASE__INST5_SEG1 0 991*5ca02815Sjsg #define MP0_BASE__INST5_SEG2 0 992*5ca02815Sjsg #define MP0_BASE__INST5_SEG3 0 993*5ca02815Sjsg #define MP0_BASE__INST5_SEG4 0 994*5ca02815Sjsg #define MP0_BASE__INST5_SEG5 0 995*5ca02815Sjsg 996*5ca02815Sjsg #define MP0_BASE__INST6_SEG0 0 997*5ca02815Sjsg #define MP0_BASE__INST6_SEG1 0 998*5ca02815Sjsg #define MP0_BASE__INST6_SEG2 0 999*5ca02815Sjsg #define MP0_BASE__INST6_SEG3 0 1000*5ca02815Sjsg #define MP0_BASE__INST6_SEG4 0 1001*5ca02815Sjsg #define MP0_BASE__INST6_SEG5 0 1002*5ca02815Sjsg 1003*5ca02815Sjsg #define MP1_BASE__INST0_SEG0 0x00016000 1004*5ca02815Sjsg #define MP1_BASE__INST0_SEG1 0x00DC0000 1005*5ca02815Sjsg #define MP1_BASE__INST0_SEG2 0x00E00000 1006*5ca02815Sjsg #define MP1_BASE__INST0_SEG3 0x00E40000 1007*5ca02815Sjsg #define MP1_BASE__INST0_SEG4 0x0243FC00 1008*5ca02815Sjsg #define MP1_BASE__INST0_SEG5 0 1009*5ca02815Sjsg 1010*5ca02815Sjsg #define MP1_BASE__INST1_SEG0 0 1011*5ca02815Sjsg #define MP1_BASE__INST1_SEG1 0 1012*5ca02815Sjsg #define MP1_BASE__INST1_SEG2 0 1013*5ca02815Sjsg #define MP1_BASE__INST1_SEG3 0 1014*5ca02815Sjsg #define MP1_BASE__INST1_SEG4 0 1015*5ca02815Sjsg #define MP1_BASE__INST1_SEG5 0 1016*5ca02815Sjsg 1017*5ca02815Sjsg #define MP1_BASE__INST2_SEG0 0 1018*5ca02815Sjsg #define MP1_BASE__INST2_SEG1 0 1019*5ca02815Sjsg #define MP1_BASE__INST2_SEG2 0 1020*5ca02815Sjsg #define MP1_BASE__INST2_SEG3 0 1021*5ca02815Sjsg #define MP1_BASE__INST2_SEG4 0 1022*5ca02815Sjsg #define MP1_BASE__INST2_SEG5 0 1023*5ca02815Sjsg 1024*5ca02815Sjsg #define MP1_BASE__INST3_SEG0 0 1025*5ca02815Sjsg #define MP1_BASE__INST3_SEG1 0 1026*5ca02815Sjsg #define MP1_BASE__INST3_SEG2 0 1027*5ca02815Sjsg #define MP1_BASE__INST3_SEG3 0 1028*5ca02815Sjsg #define MP1_BASE__INST3_SEG4 0 1029*5ca02815Sjsg #define MP1_BASE__INST3_SEG5 0 1030*5ca02815Sjsg 1031*5ca02815Sjsg #define MP1_BASE__INST4_SEG0 0 1032*5ca02815Sjsg #define MP1_BASE__INST4_SEG1 0 1033*5ca02815Sjsg #define MP1_BASE__INST4_SEG2 0 1034*5ca02815Sjsg #define MP1_BASE__INST4_SEG3 0 1035*5ca02815Sjsg #define MP1_BASE__INST4_SEG4 0 1036*5ca02815Sjsg #define MP1_BASE__INST4_SEG5 0 1037*5ca02815Sjsg 1038*5ca02815Sjsg #define MP1_BASE__INST5_SEG0 0 1039*5ca02815Sjsg #define MP1_BASE__INST5_SEG1 0 1040*5ca02815Sjsg #define MP1_BASE__INST5_SEG2 0 1041*5ca02815Sjsg #define MP1_BASE__INST5_SEG3 0 1042*5ca02815Sjsg #define MP1_BASE__INST5_SEG4 0 1043*5ca02815Sjsg #define MP1_BASE__INST5_SEG5 0 1044*5ca02815Sjsg 1045*5ca02815Sjsg #define MP1_BASE__INST6_SEG0 0 1046*5ca02815Sjsg #define MP1_BASE__INST6_SEG1 0 1047*5ca02815Sjsg #define MP1_BASE__INST6_SEG2 0 1048*5ca02815Sjsg #define MP1_BASE__INST6_SEG3 0 1049*5ca02815Sjsg #define MP1_BASE__INST6_SEG4 0 1050*5ca02815Sjsg #define MP1_BASE__INST6_SEG5 0 1051*5ca02815Sjsg 1052*5ca02815Sjsg #define NBIO_BASE__INST0_SEG0 0x00000000 1053*5ca02815Sjsg #define NBIO_BASE__INST0_SEG1 0x00000014 1054*5ca02815Sjsg #define NBIO_BASE__INST0_SEG2 0x00000D20 1055*5ca02815Sjsg #define NBIO_BASE__INST0_SEG3 0x00010400 1056*5ca02815Sjsg #define NBIO_BASE__INST0_SEG4 0x0241B000 1057*5ca02815Sjsg #define NBIO_BASE__INST0_SEG5 0x04040000 1058*5ca02815Sjsg 1059*5ca02815Sjsg #define NBIO_BASE__INST1_SEG0 0 1060*5ca02815Sjsg #define NBIO_BASE__INST1_SEG1 0 1061*5ca02815Sjsg #define NBIO_BASE__INST1_SEG2 0 1062*5ca02815Sjsg #define NBIO_BASE__INST1_SEG3 0 1063*5ca02815Sjsg #define NBIO_BASE__INST1_SEG4 0 1064*5ca02815Sjsg #define NBIO_BASE__INST1_SEG5 0 1065*5ca02815Sjsg 1066*5ca02815Sjsg #define NBIO_BASE__INST2_SEG0 0 1067*5ca02815Sjsg #define NBIO_BASE__INST2_SEG1 0 1068*5ca02815Sjsg #define NBIO_BASE__INST2_SEG2 0 1069*5ca02815Sjsg #define NBIO_BASE__INST2_SEG3 0 1070*5ca02815Sjsg #define NBIO_BASE__INST2_SEG4 0 1071*5ca02815Sjsg #define NBIO_BASE__INST2_SEG5 0 1072*5ca02815Sjsg 1073*5ca02815Sjsg #define NBIO_BASE__INST3_SEG0 0 1074*5ca02815Sjsg #define NBIO_BASE__INST3_SEG1 0 1075*5ca02815Sjsg #define NBIO_BASE__INST3_SEG2 0 1076*5ca02815Sjsg #define NBIO_BASE__INST3_SEG3 0 1077*5ca02815Sjsg #define NBIO_BASE__INST3_SEG4 0 1078*5ca02815Sjsg #define NBIO_BASE__INST3_SEG5 0 1079*5ca02815Sjsg 1080*5ca02815Sjsg #define NBIO_BASE__INST4_SEG0 0 1081*5ca02815Sjsg #define NBIO_BASE__INST4_SEG1 0 1082*5ca02815Sjsg #define NBIO_BASE__INST4_SEG2 0 1083*5ca02815Sjsg #define NBIO_BASE__INST4_SEG3 0 1084*5ca02815Sjsg #define NBIO_BASE__INST4_SEG4 0 1085*5ca02815Sjsg #define NBIO_BASE__INST4_SEG5 0 1086*5ca02815Sjsg 1087*5ca02815Sjsg #define NBIO_BASE__INST5_SEG0 0 1088*5ca02815Sjsg #define NBIO_BASE__INST5_SEG1 0 1089*5ca02815Sjsg #define NBIO_BASE__INST5_SEG2 0 1090*5ca02815Sjsg #define NBIO_BASE__INST5_SEG3 0 1091*5ca02815Sjsg #define NBIO_BASE__INST5_SEG4 0 1092*5ca02815Sjsg #define NBIO_BASE__INST5_SEG5 0 1093*5ca02815Sjsg 1094*5ca02815Sjsg #define NBIO_BASE__INST6_SEG0 0 1095*5ca02815Sjsg #define NBIO_BASE__INST6_SEG1 0 1096*5ca02815Sjsg #define NBIO_BASE__INST6_SEG2 0 1097*5ca02815Sjsg #define NBIO_BASE__INST6_SEG3 0 1098*5ca02815Sjsg #define NBIO_BASE__INST6_SEG4 0 1099*5ca02815Sjsg #define NBIO_BASE__INST6_SEG5 0 1100*5ca02815Sjsg 1101*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG0 0x000010A0 1102*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG1 0x0240A000 1103*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG2 0 1104*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG3 0 1105*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG4 0 1106*5ca02815Sjsg #define OSSSYS_BASE__INST0_SEG5 0 1107*5ca02815Sjsg 1108*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG0 0 1109*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG1 0 1110*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG2 0 1111*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG3 0 1112*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG4 0 1113*5ca02815Sjsg #define OSSSYS_BASE__INST1_SEG5 0 1114*5ca02815Sjsg 1115*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG0 0 1116*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG1 0 1117*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG2 0 1118*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG3 0 1119*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG4 0 1120*5ca02815Sjsg #define OSSSYS_BASE__INST2_SEG5 0 1121*5ca02815Sjsg 1122*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG0 0 1123*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG1 0 1124*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG2 0 1125*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG3 0 1126*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG4 0 1127*5ca02815Sjsg #define OSSSYS_BASE__INST3_SEG5 0 1128*5ca02815Sjsg 1129*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG0 0 1130*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG1 0 1131*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG2 0 1132*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG3 0 1133*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG4 0 1134*5ca02815Sjsg #define OSSSYS_BASE__INST4_SEG5 0 1135*5ca02815Sjsg 1136*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG0 0 1137*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG1 0 1138*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG2 0 1139*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG3 0 1140*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG4 0 1141*5ca02815Sjsg #define OSSSYS_BASE__INST5_SEG5 0 1142*5ca02815Sjsg 1143*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG0 0 1144*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG1 0 1145*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG2 0 1146*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG3 0 1147*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG4 0 1148*5ca02815Sjsg #define OSSSYS_BASE__INST6_SEG5 0 1149*5ca02815Sjsg 1150*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG0 0x02411800 1151*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG1 0x04440000 1152*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG2 0 1153*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG3 0 1154*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG4 0 1155*5ca02815Sjsg #define PCIE0_BASE__INST0_SEG5 0 1156*5ca02815Sjsg 1157*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG0 0 1158*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG1 0 1159*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG2 0 1160*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG3 0 1161*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG4 0 1162*5ca02815Sjsg #define PCIE0_BASE__INST1_SEG5 0 1163*5ca02815Sjsg 1164*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG0 0 1165*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG1 0 1166*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG2 0 1167*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG3 0 1168*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG4 0 1169*5ca02815Sjsg #define PCIE0_BASE__INST2_SEG5 0 1170*5ca02815Sjsg 1171*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG0 0 1172*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG1 0 1173*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG2 0 1174*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG3 0 1175*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG4 0 1176*5ca02815Sjsg #define PCIE0_BASE__INST3_SEG5 0 1177*5ca02815Sjsg 1178*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG0 0 1179*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG1 0 1180*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG2 0 1181*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG3 0 1182*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG4 0 1183*5ca02815Sjsg #define PCIE0_BASE__INST4_SEG5 0 1184*5ca02815Sjsg 1185*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG0 0 1186*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG1 0 1187*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG2 0 1188*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG3 0 1189*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG4 0 1190*5ca02815Sjsg #define PCIE0_BASE__INST5_SEG5 0 1191*5ca02815Sjsg 1192*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG0 0 1193*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG1 0 1194*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG2 0 1195*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG3 0 1196*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG4 0 1197*5ca02815Sjsg #define PCIE0_BASE__INST6_SEG5 0 1198*5ca02815Sjsg 1199*5ca02815Sjsg #define SDMA0_BASE__INST0_SEG0 0x00001260 1200*5ca02815Sjsg #define SDMA0_BASE__INST0_SEG1 0x02445400 1201*5ca02815Sjsg #define SDMA0_BASE__INST0_SEG2 0 1202*5ca02815Sjsg #define SDMA0_BASE__INST0_SEG3 0 1203*5ca02815Sjsg #define SDMA0_BASE__INST0_SEG4 0 1204*5ca02815Sjsg #define SDMA0_BASE__INST0_SEG5 0 1205*5ca02815Sjsg 1206*5ca02815Sjsg #define SDMA0_BASE__INST1_SEG0 0 1207*5ca02815Sjsg #define SDMA0_BASE__INST1_SEG1 0 1208*5ca02815Sjsg #define SDMA0_BASE__INST1_SEG2 0 1209*5ca02815Sjsg #define SDMA0_BASE__INST1_SEG3 0 1210*5ca02815Sjsg #define SDMA0_BASE__INST1_SEG4 0 1211*5ca02815Sjsg #define SDMA0_BASE__INST1_SEG5 0 1212*5ca02815Sjsg 1213*5ca02815Sjsg #define SDMA0_BASE__INST2_SEG0 0 1214*5ca02815Sjsg #define SDMA0_BASE__INST2_SEG1 0 1215*5ca02815Sjsg #define SDMA0_BASE__INST2_SEG2 0 1216*5ca02815Sjsg #define SDMA0_BASE__INST2_SEG3 0 1217*5ca02815Sjsg #define SDMA0_BASE__INST2_SEG4 0 1218*5ca02815Sjsg #define SDMA0_BASE__INST2_SEG5 0 1219*5ca02815Sjsg 1220*5ca02815Sjsg #define SDMA0_BASE__INST3_SEG0 0 1221*5ca02815Sjsg #define SDMA0_BASE__INST3_SEG1 0 1222*5ca02815Sjsg #define SDMA0_BASE__INST3_SEG2 0 1223*5ca02815Sjsg #define SDMA0_BASE__INST3_SEG3 0 1224*5ca02815Sjsg #define SDMA0_BASE__INST3_SEG4 0 1225*5ca02815Sjsg #define SDMA0_BASE__INST3_SEG5 0 1226*5ca02815Sjsg 1227*5ca02815Sjsg #define SDMA0_BASE__INST4_SEG0 0 1228*5ca02815Sjsg #define SDMA0_BASE__INST4_SEG1 0 1229*5ca02815Sjsg #define SDMA0_BASE__INST4_SEG2 0 1230*5ca02815Sjsg #define SDMA0_BASE__INST4_SEG3 0 1231*5ca02815Sjsg #define SDMA0_BASE__INST4_SEG4 0 1232*5ca02815Sjsg #define SDMA0_BASE__INST4_SEG5 0 1233*5ca02815Sjsg 1234*5ca02815Sjsg #define SDMA0_BASE__INST5_SEG0 0 1235*5ca02815Sjsg #define SDMA0_BASE__INST5_SEG1 0 1236*5ca02815Sjsg #define SDMA0_BASE__INST5_SEG2 0 1237*5ca02815Sjsg #define SDMA0_BASE__INST5_SEG3 0 1238*5ca02815Sjsg #define SDMA0_BASE__INST5_SEG4 0 1239*5ca02815Sjsg #define SDMA0_BASE__INST5_SEG5 0 1240*5ca02815Sjsg 1241*5ca02815Sjsg #define SDMA0_BASE__INST6_SEG0 0 1242*5ca02815Sjsg #define SDMA0_BASE__INST6_SEG1 0 1243*5ca02815Sjsg #define SDMA0_BASE__INST6_SEG2 0 1244*5ca02815Sjsg #define SDMA0_BASE__INST6_SEG3 0 1245*5ca02815Sjsg #define SDMA0_BASE__INST6_SEG4 0 1246*5ca02815Sjsg #define SDMA0_BASE__INST6_SEG5 0 1247*5ca02815Sjsg 1248*5ca02815Sjsg #define SDMA1_BASE__INST0_SEG0 0x00001860 1249*5ca02815Sjsg #define SDMA1_BASE__INST0_SEG1 0x02445800 1250*5ca02815Sjsg #define SDMA1_BASE__INST0_SEG2 0 1251*5ca02815Sjsg #define SDMA1_BASE__INST0_SEG3 0 1252*5ca02815Sjsg #define SDMA1_BASE__INST0_SEG4 0 1253*5ca02815Sjsg #define SDMA1_BASE__INST0_SEG5 0 1254*5ca02815Sjsg 1255*5ca02815Sjsg #define SDMA1_BASE__INST1_SEG0 0x0001E000 1256*5ca02815Sjsg #define SDMA1_BASE__INST1_SEG1 0x02446400 1257*5ca02815Sjsg #define SDMA1_BASE__INST1_SEG2 0 1258*5ca02815Sjsg #define SDMA1_BASE__INST1_SEG3 0 1259*5ca02815Sjsg #define SDMA1_BASE__INST1_SEG4 0 1260*5ca02815Sjsg #define SDMA1_BASE__INST1_SEG5 0 1261*5ca02815Sjsg 1262*5ca02815Sjsg #define SDMA1_BASE__INST2_SEG0 0x0001E400 1263*5ca02815Sjsg #define SDMA1_BASE__INST2_SEG1 0x02446800 1264*5ca02815Sjsg #define SDMA1_BASE__INST2_SEG2 0 1265*5ca02815Sjsg #define SDMA1_BASE__INST2_SEG3 0 1266*5ca02815Sjsg #define SDMA1_BASE__INST2_SEG4 0 1267*5ca02815Sjsg #define SDMA1_BASE__INST2_SEG5 0 1268*5ca02815Sjsg 1269*5ca02815Sjsg #define SDMA1_BASE__INST3_SEG0 0x0001E800 1270*5ca02815Sjsg #define SDMA1_BASE__INST3_SEG1 0x02446C00 1271*5ca02815Sjsg #define SDMA1_BASE__INST3_SEG2 0 1272*5ca02815Sjsg #define SDMA1_BASE__INST3_SEG3 0 1273*5ca02815Sjsg #define SDMA1_BASE__INST3_SEG4 0 1274*5ca02815Sjsg #define SDMA1_BASE__INST3_SEG5 0 1275*5ca02815Sjsg 1276*5ca02815Sjsg #define SDMA1_BASE__INST4_SEG0 0 1277*5ca02815Sjsg #define SDMA1_BASE__INST4_SEG1 0 1278*5ca02815Sjsg #define SDMA1_BASE__INST4_SEG2 0 1279*5ca02815Sjsg #define SDMA1_BASE__INST4_SEG3 0 1280*5ca02815Sjsg #define SDMA1_BASE__INST4_SEG4 0 1281*5ca02815Sjsg #define SDMA1_BASE__INST4_SEG5 0 1282*5ca02815Sjsg 1283*5ca02815Sjsg #define SDMA1_BASE__INST5_SEG0 0 1284*5ca02815Sjsg #define SDMA1_BASE__INST5_SEG1 0 1285*5ca02815Sjsg #define SDMA1_BASE__INST5_SEG2 0 1286*5ca02815Sjsg #define SDMA1_BASE__INST5_SEG3 0 1287*5ca02815Sjsg #define SDMA1_BASE__INST5_SEG4 0 1288*5ca02815Sjsg #define SDMA1_BASE__INST5_SEG5 0 1289*5ca02815Sjsg 1290*5ca02815Sjsg #define SDMA1_BASE__INST6_SEG0 0 1291*5ca02815Sjsg #define SDMA1_BASE__INST6_SEG1 0 1292*5ca02815Sjsg #define SDMA1_BASE__INST6_SEG2 0 1293*5ca02815Sjsg #define SDMA1_BASE__INST6_SEG3 0 1294*5ca02815Sjsg #define SDMA1_BASE__INST6_SEG4 0 1295*5ca02815Sjsg #define SDMA1_BASE__INST6_SEG5 0 1296*5ca02815Sjsg 1297*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG0 0x00016800 1298*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG1 0x00016A00 1299*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG2 0x02401000 1300*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG3 0x03440000 1301*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG4 0 1302*5ca02815Sjsg #define SMUIO_BASE__INST0_SEG5 0 1303*5ca02815Sjsg 1304*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG0 0 1305*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG1 0 1306*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG2 0 1307*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG3 0 1308*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG4 0 1309*5ca02815Sjsg #define SMUIO_BASE__INST1_SEG5 0 1310*5ca02815Sjsg 1311*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG0 0 1312*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG1 0 1313*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG2 0 1314*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG3 0 1315*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG4 0 1316*5ca02815Sjsg #define SMUIO_BASE__INST2_SEG5 0 1317*5ca02815Sjsg 1318*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG0 0 1319*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG1 0 1320*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG2 0 1321*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG3 0 1322*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG4 0 1323*5ca02815Sjsg #define SMUIO_BASE__INST3_SEG5 0 1324*5ca02815Sjsg 1325*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG0 0 1326*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG1 0 1327*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG2 0 1328*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG3 0 1329*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG4 0 1330*5ca02815Sjsg #define SMUIO_BASE__INST4_SEG5 0 1331*5ca02815Sjsg 1332*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG0 0 1333*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG1 0 1334*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG2 0 1335*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG3 0 1336*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG4 0 1337*5ca02815Sjsg #define SMUIO_BASE__INST5_SEG5 0 1338*5ca02815Sjsg 1339*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG0 0 1340*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG1 0 1341*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG2 0 1342*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG3 0 1343*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG4 0 1344*5ca02815Sjsg #define SMUIO_BASE__INST6_SEG5 0 1345*5ca02815Sjsg 1346*5ca02815Sjsg #define THM_BASE__INST0_SEG0 0x00016600 1347*5ca02815Sjsg #define THM_BASE__INST0_SEG1 0x02400C00 1348*5ca02815Sjsg #define THM_BASE__INST0_SEG2 0 1349*5ca02815Sjsg #define THM_BASE__INST0_SEG3 0 1350*5ca02815Sjsg #define THM_BASE__INST0_SEG4 0 1351*5ca02815Sjsg #define THM_BASE__INST0_SEG5 0 1352*5ca02815Sjsg 1353*5ca02815Sjsg #define THM_BASE__INST1_SEG0 0 1354*5ca02815Sjsg #define THM_BASE__INST1_SEG1 0 1355*5ca02815Sjsg #define THM_BASE__INST1_SEG2 0 1356*5ca02815Sjsg #define THM_BASE__INST1_SEG3 0 1357*5ca02815Sjsg #define THM_BASE__INST1_SEG4 0 1358*5ca02815Sjsg #define THM_BASE__INST1_SEG5 0 1359*5ca02815Sjsg 1360*5ca02815Sjsg #define THM_BASE__INST2_SEG0 0 1361*5ca02815Sjsg #define THM_BASE__INST2_SEG1 0 1362*5ca02815Sjsg #define THM_BASE__INST2_SEG2 0 1363*5ca02815Sjsg #define THM_BASE__INST2_SEG3 0 1364*5ca02815Sjsg #define THM_BASE__INST2_SEG4 0 1365*5ca02815Sjsg #define THM_BASE__INST2_SEG5 0 1366*5ca02815Sjsg 1367*5ca02815Sjsg #define THM_BASE__INST3_SEG0 0 1368*5ca02815Sjsg #define THM_BASE__INST3_SEG1 0 1369*5ca02815Sjsg #define THM_BASE__INST3_SEG2 0 1370*5ca02815Sjsg #define THM_BASE__INST3_SEG3 0 1371*5ca02815Sjsg #define THM_BASE__INST3_SEG4 0 1372*5ca02815Sjsg #define THM_BASE__INST3_SEG5 0 1373*5ca02815Sjsg 1374*5ca02815Sjsg #define THM_BASE__INST4_SEG0 0 1375*5ca02815Sjsg #define THM_BASE__INST4_SEG1 0 1376*5ca02815Sjsg #define THM_BASE__INST4_SEG2 0 1377*5ca02815Sjsg #define THM_BASE__INST4_SEG3 0 1378*5ca02815Sjsg #define THM_BASE__INST4_SEG4 0 1379*5ca02815Sjsg #define THM_BASE__INST4_SEG5 0 1380*5ca02815Sjsg 1381*5ca02815Sjsg #define THM_BASE__INST5_SEG0 0 1382*5ca02815Sjsg #define THM_BASE__INST5_SEG1 0 1383*5ca02815Sjsg #define THM_BASE__INST5_SEG2 0 1384*5ca02815Sjsg #define THM_BASE__INST5_SEG3 0 1385*5ca02815Sjsg #define THM_BASE__INST5_SEG4 0 1386*5ca02815Sjsg #define THM_BASE__INST5_SEG5 0 1387*5ca02815Sjsg 1388*5ca02815Sjsg #define THM_BASE__INST6_SEG0 0 1389*5ca02815Sjsg #define THM_BASE__INST6_SEG1 0 1390*5ca02815Sjsg #define THM_BASE__INST6_SEG2 0 1391*5ca02815Sjsg #define THM_BASE__INST6_SEG3 0 1392*5ca02815Sjsg #define THM_BASE__INST6_SEG4 0 1393*5ca02815Sjsg #define THM_BASE__INST6_SEG5 0 1394*5ca02815Sjsg 1395*5ca02815Sjsg #define UMC_BASE__INST0_SEG0 0x00014000 1396*5ca02815Sjsg #define UMC_BASE__INST0_SEG1 0x00054000 1397*5ca02815Sjsg #define UMC_BASE__INST0_SEG2 0x02425800 1398*5ca02815Sjsg #define UMC_BASE__INST0_SEG3 0 1399*5ca02815Sjsg #define UMC_BASE__INST0_SEG4 0 1400*5ca02815Sjsg #define UMC_BASE__INST0_SEG5 0 1401*5ca02815Sjsg 1402*5ca02815Sjsg #define UMC_BASE__INST1_SEG0 0x00094000 1403*5ca02815Sjsg #define UMC_BASE__INST1_SEG1 0x000D4000 1404*5ca02815Sjsg #define UMC_BASE__INST1_SEG2 0x02425C00 1405*5ca02815Sjsg #define UMC_BASE__INST1_SEG3 0 1406*5ca02815Sjsg #define UMC_BASE__INST1_SEG4 0 1407*5ca02815Sjsg #define UMC_BASE__INST1_SEG5 0 1408*5ca02815Sjsg 1409*5ca02815Sjsg #define UMC_BASE__INST2_SEG0 0x00114000 1410*5ca02815Sjsg #define UMC_BASE__INST2_SEG1 0x00154000 1411*5ca02815Sjsg #define UMC_BASE__INST2_SEG2 0x02426000 1412*5ca02815Sjsg #define UMC_BASE__INST2_SEG3 0 1413*5ca02815Sjsg #define UMC_BASE__INST2_SEG4 0 1414*5ca02815Sjsg #define UMC_BASE__INST2_SEG5 0 1415*5ca02815Sjsg 1416*5ca02815Sjsg #define UMC_BASE__INST3_SEG0 0x00194000 1417*5ca02815Sjsg #define UMC_BASE__INST3_SEG1 0x001D4000 1418*5ca02815Sjsg #define UMC_BASE__INST3_SEG2 0x02426400 1419*5ca02815Sjsg #define UMC_BASE__INST3_SEG3 0 1420*5ca02815Sjsg #define UMC_BASE__INST3_SEG4 0 1421*5ca02815Sjsg #define UMC_BASE__INST3_SEG5 0 1422*5ca02815Sjsg 1423*5ca02815Sjsg #define UMC_BASE__INST4_SEG0 0 1424*5ca02815Sjsg #define UMC_BASE__INST4_SEG1 0 1425*5ca02815Sjsg #define UMC_BASE__INST4_SEG2 0 1426*5ca02815Sjsg #define UMC_BASE__INST4_SEG3 0 1427*5ca02815Sjsg #define UMC_BASE__INST4_SEG4 0 1428*5ca02815Sjsg #define UMC_BASE__INST4_SEG5 0 1429*5ca02815Sjsg 1430*5ca02815Sjsg #define UMC_BASE__INST5_SEG0 0 1431*5ca02815Sjsg #define UMC_BASE__INST5_SEG1 0 1432*5ca02815Sjsg #define UMC_BASE__INST5_SEG2 0 1433*5ca02815Sjsg #define UMC_BASE__INST5_SEG3 0 1434*5ca02815Sjsg #define UMC_BASE__INST5_SEG4 0 1435*5ca02815Sjsg #define UMC_BASE__INST5_SEG5 0 1436*5ca02815Sjsg 1437*5ca02815Sjsg #define UMC_BASE__INST6_SEG0 0 1438*5ca02815Sjsg #define UMC_BASE__INST6_SEG1 0 1439*5ca02815Sjsg #define UMC_BASE__INST6_SEG2 0 1440*5ca02815Sjsg #define UMC_BASE__INST6_SEG3 0 1441*5ca02815Sjsg #define UMC_BASE__INST6_SEG4 0 1442*5ca02815Sjsg #define UMC_BASE__INST6_SEG5 0 1443*5ca02815Sjsg 1444*5ca02815Sjsg #define VCN_BASE__INST0_SEG0 0x00007800 1445*5ca02815Sjsg #define VCN_BASE__INST0_SEG1 0x00007E00 1446*5ca02815Sjsg #define VCN_BASE__INST0_SEG2 0x02403000 1447*5ca02815Sjsg #define VCN_BASE__INST0_SEG3 0 1448*5ca02815Sjsg #define VCN_BASE__INST0_SEG4 0 1449*5ca02815Sjsg #define VCN_BASE__INST0_SEG5 0 1450*5ca02815Sjsg 1451*5ca02815Sjsg #define VCN_BASE__INST1_SEG0 0x00007A00 1452*5ca02815Sjsg #define VCN_BASE__INST1_SEG1 0x00009000 1453*5ca02815Sjsg #define VCN_BASE__INST1_SEG2 0x02445000 1454*5ca02815Sjsg #define VCN_BASE__INST1_SEG3 0 1455*5ca02815Sjsg #define VCN_BASE__INST1_SEG4 0 1456*5ca02815Sjsg #define VCN_BASE__INST1_SEG5 0 1457*5ca02815Sjsg 1458*5ca02815Sjsg #define VCN_BASE__INST2_SEG0 0 1459*5ca02815Sjsg #define VCN_BASE__INST2_SEG1 0 1460*5ca02815Sjsg #define VCN_BASE__INST2_SEG2 0 1461*5ca02815Sjsg #define VCN_BASE__INST2_SEG3 0 1462*5ca02815Sjsg #define VCN_BASE__INST2_SEG4 0 1463*5ca02815Sjsg #define VCN_BASE__INST2_SEG5 0 1464*5ca02815Sjsg 1465*5ca02815Sjsg #define VCN_BASE__INST3_SEG0 0 1466*5ca02815Sjsg #define VCN_BASE__INST3_SEG1 0 1467*5ca02815Sjsg #define VCN_BASE__INST3_SEG2 0 1468*5ca02815Sjsg #define VCN_BASE__INST3_SEG3 0 1469*5ca02815Sjsg #define VCN_BASE__INST3_SEG4 0 1470*5ca02815Sjsg #define VCN_BASE__INST3_SEG5 0 1471*5ca02815Sjsg 1472*5ca02815Sjsg #define VCN_BASE__INST4_SEG0 0 1473*5ca02815Sjsg #define VCN_BASE__INST4_SEG1 0 1474*5ca02815Sjsg #define VCN_BASE__INST4_SEG2 0 1475*5ca02815Sjsg #define VCN_BASE__INST4_SEG3 0 1476*5ca02815Sjsg #define VCN_BASE__INST4_SEG4 0 1477*5ca02815Sjsg #define VCN_BASE__INST4_SEG5 0 1478*5ca02815Sjsg 1479*5ca02815Sjsg #define VCN_BASE__INST5_SEG0 0 1480*5ca02815Sjsg #define VCN_BASE__INST5_SEG1 0 1481*5ca02815Sjsg #define VCN_BASE__INST5_SEG2 0 1482*5ca02815Sjsg #define VCN_BASE__INST5_SEG3 0 1483*5ca02815Sjsg #define VCN_BASE__INST5_SEG4 0 1484*5ca02815Sjsg #define VCN_BASE__INST5_SEG5 0 1485*5ca02815Sjsg 1486*5ca02815Sjsg #define VCN_BASE__INST6_SEG0 0 1487*5ca02815Sjsg #define VCN_BASE__INST6_SEG1 0 1488*5ca02815Sjsg #define VCN_BASE__INST6_SEG2 0 1489*5ca02815Sjsg #define VCN_BASE__INST6_SEG3 0 1490*5ca02815Sjsg #define VCN_BASE__INST6_SEG4 0 1491*5ca02815Sjsg #define VCN_BASE__INST6_SEG5 0 1492*5ca02815Sjsg 1493*5ca02815Sjsg #define WAFL0_BASE__INST0_SEG0 0x02438000 1494*5ca02815Sjsg #define WAFL0_BASE__INST0_SEG1 0x04880000 1495*5ca02815Sjsg #define WAFL0_BASE__INST0_SEG2 0 1496*5ca02815Sjsg #define WAFL0_BASE__INST0_SEG3 0 1497*5ca02815Sjsg #define WAFL0_BASE__INST0_SEG4 0 1498*5ca02815Sjsg #define WAFL0_BASE__INST0_SEG5 0 1499*5ca02815Sjsg 1500*5ca02815Sjsg #define WAFL0_BASE__INST1_SEG0 0 1501*5ca02815Sjsg #define WAFL0_BASE__INST1_SEG1 0 1502*5ca02815Sjsg #define WAFL0_BASE__INST1_SEG2 0 1503*5ca02815Sjsg #define WAFL0_BASE__INST1_SEG3 0 1504*5ca02815Sjsg #define WAFL0_BASE__INST1_SEG4 0 1505*5ca02815Sjsg #define WAFL0_BASE__INST1_SEG5 0 1506*5ca02815Sjsg 1507*5ca02815Sjsg #define WAFL0_BASE__INST2_SEG0 0 1508*5ca02815Sjsg #define WAFL0_BASE__INST2_SEG1 0 1509*5ca02815Sjsg #define WAFL0_BASE__INST2_SEG2 0 1510*5ca02815Sjsg #define WAFL0_BASE__INST2_SEG3 0 1511*5ca02815Sjsg #define WAFL0_BASE__INST2_SEG4 0 1512*5ca02815Sjsg #define WAFL0_BASE__INST2_SEG5 0 1513*5ca02815Sjsg 1514*5ca02815Sjsg #define WAFL0_BASE__INST3_SEG0 0 1515*5ca02815Sjsg #define WAFL0_BASE__INST3_SEG1 0 1516*5ca02815Sjsg #define WAFL0_BASE__INST3_SEG2 0 1517*5ca02815Sjsg #define WAFL0_BASE__INST3_SEG3 0 1518*5ca02815Sjsg #define WAFL0_BASE__INST3_SEG4 0 1519*5ca02815Sjsg #define WAFL0_BASE__INST3_SEG5 0 1520*5ca02815Sjsg 1521*5ca02815Sjsg #define WAFL0_BASE__INST4_SEG0 0 1522*5ca02815Sjsg #define WAFL0_BASE__INST4_SEG1 0 1523*5ca02815Sjsg #define WAFL0_BASE__INST4_SEG2 0 1524*5ca02815Sjsg #define WAFL0_BASE__INST4_SEG3 0 1525*5ca02815Sjsg #define WAFL0_BASE__INST4_SEG4 0 1526*5ca02815Sjsg #define WAFL0_BASE__INST4_SEG5 0 1527*5ca02815Sjsg 1528*5ca02815Sjsg #define WAFL0_BASE__INST5_SEG0 0 1529*5ca02815Sjsg #define WAFL0_BASE__INST5_SEG1 0 1530*5ca02815Sjsg #define WAFL0_BASE__INST5_SEG2 0 1531*5ca02815Sjsg #define WAFL0_BASE__INST5_SEG3 0 1532*5ca02815Sjsg #define WAFL0_BASE__INST5_SEG4 0 1533*5ca02815Sjsg #define WAFL0_BASE__INST5_SEG5 0 1534*5ca02815Sjsg 1535*5ca02815Sjsg #define WAFL0_BASE__INST6_SEG0 0 1536*5ca02815Sjsg #define WAFL0_BASE__INST6_SEG1 0 1537*5ca02815Sjsg #define WAFL0_BASE__INST6_SEG2 0 1538*5ca02815Sjsg #define WAFL0_BASE__INST6_SEG3 0 1539*5ca02815Sjsg #define WAFL0_BASE__INST6_SEG4 0 1540*5ca02815Sjsg #define WAFL0_BASE__INST6_SEG5 0 1541*5ca02815Sjsg 1542*5ca02815Sjsg #define WAFL1_BASE__INST0_SEG0 0 1543*5ca02815Sjsg #define WAFL1_BASE__INST0_SEG1 0x01300000 1544*5ca02815Sjsg #define WAFL1_BASE__INST0_SEG2 0x02410800 1545*5ca02815Sjsg #define WAFL1_BASE__INST0_SEG3 0 1546*5ca02815Sjsg #define WAFL1_BASE__INST0_SEG4 0 1547*5ca02815Sjsg #define WAFL1_BASE__INST0_SEG5 0 1548*5ca02815Sjsg 1549*5ca02815Sjsg #define WAFL1_BASE__INST1_SEG0 0 1550*5ca02815Sjsg #define WAFL1_BASE__INST1_SEG1 0 1551*5ca02815Sjsg #define WAFL1_BASE__INST1_SEG2 0 1552*5ca02815Sjsg #define WAFL1_BASE__INST1_SEG3 0 1553*5ca02815Sjsg #define WAFL1_BASE__INST1_SEG4 0 1554*5ca02815Sjsg #define WAFL1_BASE__INST1_SEG5 0 1555*5ca02815Sjsg 1556*5ca02815Sjsg #define WAFL1_BASE__INST2_SEG0 0 1557*5ca02815Sjsg #define WAFL1_BASE__INST2_SEG1 0 1558*5ca02815Sjsg #define WAFL1_BASE__INST2_SEG2 0 1559*5ca02815Sjsg #define WAFL1_BASE__INST2_SEG3 0 1560*5ca02815Sjsg #define WAFL1_BASE__INST2_SEG4 0 1561*5ca02815Sjsg #define WAFL1_BASE__INST2_SEG5 0 1562*5ca02815Sjsg 1563*5ca02815Sjsg #define WAFL1_BASE__INST3_SEG0 0 1564*5ca02815Sjsg #define WAFL1_BASE__INST3_SEG1 0 1565*5ca02815Sjsg #define WAFL1_BASE__INST3_SEG2 0 1566*5ca02815Sjsg #define WAFL1_BASE__INST3_SEG3 0 1567*5ca02815Sjsg #define WAFL1_BASE__INST3_SEG4 0 1568*5ca02815Sjsg #define WAFL1_BASE__INST3_SEG5 0 1569*5ca02815Sjsg 1570*5ca02815Sjsg #define WAFL1_BASE__INST4_SEG0 0 1571*5ca02815Sjsg #define WAFL1_BASE__INST4_SEG1 0 1572*5ca02815Sjsg #define WAFL1_BASE__INST4_SEG2 0 1573*5ca02815Sjsg #define WAFL1_BASE__INST4_SEG3 0 1574*5ca02815Sjsg #define WAFL1_BASE__INST4_SEG4 0 1575*5ca02815Sjsg #define WAFL1_BASE__INST4_SEG5 0 1576*5ca02815Sjsg 1577*5ca02815Sjsg #define WAFL1_BASE__INST5_SEG0 0 1578*5ca02815Sjsg #define WAFL1_BASE__INST5_SEG1 0 1579*5ca02815Sjsg #define WAFL1_BASE__INST5_SEG2 0 1580*5ca02815Sjsg #define WAFL1_BASE__INST5_SEG3 0 1581*5ca02815Sjsg #define WAFL1_BASE__INST5_SEG4 0 1582*5ca02815Sjsg #define WAFL1_BASE__INST5_SEG5 0 1583*5ca02815Sjsg 1584*5ca02815Sjsg #define WAFL1_BASE__INST6_SEG0 0 1585*5ca02815Sjsg #define WAFL1_BASE__INST6_SEG1 0 1586*5ca02815Sjsg #define WAFL1_BASE__INST6_SEG2 0 1587*5ca02815Sjsg #define WAFL1_BASE__INST6_SEG3 0 1588*5ca02815Sjsg #define WAFL1_BASE__INST6_SEG4 0 1589*5ca02815Sjsg #define WAFL1_BASE__INST6_SEG5 0 1590*5ca02815Sjsg 1591*5ca02815Sjsg #define XGMI0_BASE__INST0_SEG0 0x02438C00 1592*5ca02815Sjsg #define XGMI0_BASE__INST0_SEG1 0x04680000 1593*5ca02815Sjsg #define XGMI0_BASE__INST0_SEG2 0x04940000 1594*5ca02815Sjsg #define XGMI0_BASE__INST0_SEG3 0 1595*5ca02815Sjsg #define XGMI0_BASE__INST0_SEG4 0 1596*5ca02815Sjsg #define XGMI0_BASE__INST0_SEG5 0 1597*5ca02815Sjsg 1598*5ca02815Sjsg #define XGMI0_BASE__INST1_SEG0 0 1599*5ca02815Sjsg #define XGMI0_BASE__INST1_SEG1 0 1600*5ca02815Sjsg #define XGMI0_BASE__INST1_SEG2 0 1601*5ca02815Sjsg #define XGMI0_BASE__INST1_SEG3 0 1602*5ca02815Sjsg #define XGMI0_BASE__INST1_SEG4 0 1603*5ca02815Sjsg #define XGMI0_BASE__INST1_SEG5 0 1604*5ca02815Sjsg 1605*5ca02815Sjsg #define XGMI0_BASE__INST2_SEG0 0 1606*5ca02815Sjsg #define XGMI0_BASE__INST2_SEG1 0 1607*5ca02815Sjsg #define XGMI0_BASE__INST2_SEG2 0 1608*5ca02815Sjsg #define XGMI0_BASE__INST2_SEG3 0 1609*5ca02815Sjsg #define XGMI0_BASE__INST2_SEG4 0 1610*5ca02815Sjsg #define XGMI0_BASE__INST2_SEG5 0 1611*5ca02815Sjsg 1612*5ca02815Sjsg #define XGMI0_BASE__INST3_SEG0 0 1613*5ca02815Sjsg #define XGMI0_BASE__INST3_SEG1 0 1614*5ca02815Sjsg #define XGMI0_BASE__INST3_SEG2 0 1615*5ca02815Sjsg #define XGMI0_BASE__INST3_SEG3 0 1616*5ca02815Sjsg #define XGMI0_BASE__INST3_SEG4 0 1617*5ca02815Sjsg #define XGMI0_BASE__INST3_SEG5 0 1618*5ca02815Sjsg 1619*5ca02815Sjsg #define XGMI0_BASE__INST4_SEG0 0 1620*5ca02815Sjsg #define XGMI0_BASE__INST4_SEG1 0 1621*5ca02815Sjsg #define XGMI0_BASE__INST4_SEG2 0 1622*5ca02815Sjsg #define XGMI0_BASE__INST4_SEG3 0 1623*5ca02815Sjsg #define XGMI0_BASE__INST4_SEG4 0 1624*5ca02815Sjsg #define XGMI0_BASE__INST4_SEG5 0 1625*5ca02815Sjsg 1626*5ca02815Sjsg #define XGMI0_BASE__INST5_SEG0 0 1627*5ca02815Sjsg #define XGMI0_BASE__INST5_SEG1 0 1628*5ca02815Sjsg #define XGMI0_BASE__INST5_SEG2 0 1629*5ca02815Sjsg #define XGMI0_BASE__INST5_SEG3 0 1630*5ca02815Sjsg #define XGMI0_BASE__INST5_SEG4 0 1631*5ca02815Sjsg #define XGMI0_BASE__INST5_SEG5 0 1632*5ca02815Sjsg 1633*5ca02815Sjsg #define XGMI0_BASE__INST6_SEG0 0 1634*5ca02815Sjsg #define XGMI0_BASE__INST6_SEG1 0 1635*5ca02815Sjsg #define XGMI0_BASE__INST6_SEG2 0 1636*5ca02815Sjsg #define XGMI0_BASE__INST6_SEG3 0 1637*5ca02815Sjsg #define XGMI0_BASE__INST6_SEG4 0 1638*5ca02815Sjsg #define XGMI0_BASE__INST6_SEG5 0 1639*5ca02815Sjsg 1640*5ca02815Sjsg #define XGMI1_BASE__INST0_SEG0 0x02439000 1641*5ca02815Sjsg #define XGMI1_BASE__INST0_SEG1 0x046C0000 1642*5ca02815Sjsg #define XGMI1_BASE__INST0_SEG2 0x04980000 1643*5ca02815Sjsg #define XGMI1_BASE__INST0_SEG3 0 1644*5ca02815Sjsg #define XGMI1_BASE__INST0_SEG4 0 1645*5ca02815Sjsg #define XGMI1_BASE__INST0_SEG5 0 1646*5ca02815Sjsg 1647*5ca02815Sjsg #define XGMI1_BASE__INST1_SEG0 0 1648*5ca02815Sjsg #define XGMI1_BASE__INST1_SEG1 0 1649*5ca02815Sjsg #define XGMI1_BASE__INST1_SEG2 0 1650*5ca02815Sjsg #define XGMI1_BASE__INST1_SEG3 0 1651*5ca02815Sjsg #define XGMI1_BASE__INST1_SEG4 0 1652*5ca02815Sjsg #define XGMI1_BASE__INST1_SEG5 0 1653*5ca02815Sjsg 1654*5ca02815Sjsg #define XGMI1_BASE__INST2_SEG0 0 1655*5ca02815Sjsg #define XGMI1_BASE__INST2_SEG1 0 1656*5ca02815Sjsg #define XGMI1_BASE__INST2_SEG2 0 1657*5ca02815Sjsg #define XGMI1_BASE__INST2_SEG3 0 1658*5ca02815Sjsg #define XGMI1_BASE__INST2_SEG4 0 1659*5ca02815Sjsg #define XGMI1_BASE__INST2_SEG5 0 1660*5ca02815Sjsg 1661*5ca02815Sjsg #define XGMI1_BASE__INST3_SEG0 0 1662*5ca02815Sjsg #define XGMI1_BASE__INST3_SEG1 0 1663*5ca02815Sjsg #define XGMI1_BASE__INST3_SEG2 0 1664*5ca02815Sjsg #define XGMI1_BASE__INST3_SEG3 0 1665*5ca02815Sjsg #define XGMI1_BASE__INST3_SEG4 0 1666*5ca02815Sjsg #define XGMI1_BASE__INST3_SEG5 0 1667*5ca02815Sjsg 1668*5ca02815Sjsg #define XGMI1_BASE__INST4_SEG0 0 1669*5ca02815Sjsg #define XGMI1_BASE__INST4_SEG1 0 1670*5ca02815Sjsg #define XGMI1_BASE__INST4_SEG2 0 1671*5ca02815Sjsg #define XGMI1_BASE__INST4_SEG3 0 1672*5ca02815Sjsg #define XGMI1_BASE__INST4_SEG4 0 1673*5ca02815Sjsg #define XGMI1_BASE__INST4_SEG5 0 1674*5ca02815Sjsg 1675*5ca02815Sjsg #define XGMI1_BASE__INST5_SEG0 0 1676*5ca02815Sjsg #define XGMI1_BASE__INST5_SEG1 0 1677*5ca02815Sjsg #define XGMI1_BASE__INST5_SEG2 0 1678*5ca02815Sjsg #define XGMI1_BASE__INST5_SEG3 0 1679*5ca02815Sjsg #define XGMI1_BASE__INST5_SEG4 0 1680*5ca02815Sjsg #define XGMI1_BASE__INST5_SEG5 0 1681*5ca02815Sjsg 1682*5ca02815Sjsg #define XGMI1_BASE__INST6_SEG0 0 1683*5ca02815Sjsg #define XGMI1_BASE__INST6_SEG1 0 1684*5ca02815Sjsg #define XGMI1_BASE__INST6_SEG2 0 1685*5ca02815Sjsg #define XGMI1_BASE__INST6_SEG3 0 1686*5ca02815Sjsg #define XGMI1_BASE__INST6_SEG4 0 1687*5ca02815Sjsg #define XGMI1_BASE__INST6_SEG5 0 1688*5ca02815Sjsg 1689*5ca02815Sjsg #define XGMI2_BASE__INST0_SEG0 0x04700000 1690*5ca02815Sjsg #define XGMI2_BASE__INST0_SEG1 0x049C0000 1691*5ca02815Sjsg #define XGMI2_BASE__INST0_SEG2 0 1692*5ca02815Sjsg #define XGMI2_BASE__INST0_SEG3 0 1693*5ca02815Sjsg #define XGMI2_BASE__INST0_SEG4 0 1694*5ca02815Sjsg #define XGMI2_BASE__INST0_SEG5 0 1695*5ca02815Sjsg 1696*5ca02815Sjsg #define XGMI2_BASE__INST1_SEG0 0x04740000 1697*5ca02815Sjsg #define XGMI2_BASE__INST1_SEG1 0x04A00000 1698*5ca02815Sjsg #define XGMI2_BASE__INST1_SEG2 0 1699*5ca02815Sjsg #define XGMI2_BASE__INST1_SEG3 0 1700*5ca02815Sjsg #define XGMI2_BASE__INST1_SEG4 0 1701*5ca02815Sjsg #define XGMI2_BASE__INST1_SEG5 0 1702*5ca02815Sjsg 1703*5ca02815Sjsg #define XGMI2_BASE__INST2_SEG0 0x04780000 1704*5ca02815Sjsg #define XGMI2_BASE__INST2_SEG1 0x04A40000 1705*5ca02815Sjsg #define XGMI2_BASE__INST2_SEG2 0 1706*5ca02815Sjsg #define XGMI2_BASE__INST2_SEG3 0 1707*5ca02815Sjsg #define XGMI2_BASE__INST2_SEG4 0 1708*5ca02815Sjsg #define XGMI2_BASE__INST2_SEG5 0 1709*5ca02815Sjsg 1710*5ca02815Sjsg #define XGMI2_BASE__INST3_SEG0 0x047C0000 1711*5ca02815Sjsg #define XGMI2_BASE__INST3_SEG1 0x04A80000 1712*5ca02815Sjsg #define XGMI2_BASE__INST3_SEG2 0 1713*5ca02815Sjsg #define XGMI2_BASE__INST3_SEG3 0 1714*5ca02815Sjsg #define XGMI2_BASE__INST3_SEG4 0 1715*5ca02815Sjsg #define XGMI2_BASE__INST3_SEG5 0 1716*5ca02815Sjsg 1717*5ca02815Sjsg #define XGMI2_BASE__INST4_SEG0 0x04800000 1718*5ca02815Sjsg #define XGMI2_BASE__INST4_SEG1 0x04AC0000 1719*5ca02815Sjsg #define XGMI2_BASE__INST4_SEG2 0 1720*5ca02815Sjsg #define XGMI2_BASE__INST4_SEG3 0 1721*5ca02815Sjsg #define XGMI2_BASE__INST4_SEG4 0 1722*5ca02815Sjsg #define XGMI2_BASE__INST4_SEG5 0 1723*5ca02815Sjsg 1724*5ca02815Sjsg #define XGMI2_BASE__INST5_SEG0 0x04840000 1725*5ca02815Sjsg #define XGMI2_BASE__INST5_SEG1 0x04B00000 1726*5ca02815Sjsg #define XGMI2_BASE__INST5_SEG2 0 1727*5ca02815Sjsg #define XGMI2_BASE__INST5_SEG3 0 1728*5ca02815Sjsg #define XGMI2_BASE__INST5_SEG4 0 1729*5ca02815Sjsg #define XGMI2_BASE__INST5_SEG5 0 1730*5ca02815Sjsg 1731*5ca02815Sjsg #define XGMI2_BASE__INST6_SEG0 0 1732*5ca02815Sjsg #define XGMI2_BASE__INST6_SEG1 0 1733*5ca02815Sjsg #define XGMI2_BASE__INST6_SEG2 0 1734*5ca02815Sjsg #define XGMI2_BASE__INST6_SEG3 0 1735*5ca02815Sjsg #define XGMI2_BASE__INST6_SEG4 0 1736*5ca02815Sjsg #define XGMI2_BASE__INST6_SEG5 0 1737*5ca02815Sjsg 1738*5ca02815Sjsg #endif 1739