1fb4d8502Sjsg /* 2fb4d8502Sjsg * Copyright 2012-15 Advanced Micro Devices, Inc. 3fb4d8502Sjsg * 4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"), 6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation 7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions: 10fb4d8502Sjsg * 11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included in 12fb4d8502Sjsg * all copies or substantial portions of the Software. 13fb4d8502Sjsg * 14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15fb4d8502Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18fb4d8502Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19fb4d8502Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20fb4d8502Sjsg * OTHER DEALINGS IN THE SOFTWARE. 21fb4d8502Sjsg * 22fb4d8502Sjsg * Authors: AMD 23fb4d8502Sjsg * 24fb4d8502Sjsg */ 25fb4d8502Sjsg 26fb4d8502Sjsg #ifndef __DAL_GPIO_SERVICE_INTERFACE_H__ 27fb4d8502Sjsg #define __DAL_GPIO_SERVICE_INTERFACE_H__ 28fb4d8502Sjsg 29fb4d8502Sjsg #include "gpio_types.h" 30fb4d8502Sjsg #include "gpio_interface.h" 31fb4d8502Sjsg #include "hw/gpio.h" 32fb4d8502Sjsg 33fb4d8502Sjsg struct gpio_service; 34fb4d8502Sjsg 35fb4d8502Sjsg struct gpio *dal_gpio_create( 36fb4d8502Sjsg struct gpio_service *service, 37fb4d8502Sjsg enum gpio_id id, 38fb4d8502Sjsg uint32_t en, 39fb4d8502Sjsg enum gpio_pin_output_state output_state); 40fb4d8502Sjsg 41fb4d8502Sjsg void dal_gpio_destroy( 42fb4d8502Sjsg struct gpio **ptr); 43fb4d8502Sjsg 44fb4d8502Sjsg struct gpio_service *dal_gpio_service_create( 45*5ca02815Sjsg enum dce_version dce_version, 46*5ca02815Sjsg enum dce_environment dce_environment, 47fb4d8502Sjsg struct dc_context *ctx); 48fb4d8502Sjsg 49fb4d8502Sjsg struct gpio *dal_gpio_service_create_irq( 50fb4d8502Sjsg struct gpio_service *service, 51fb4d8502Sjsg uint32_t offset, 52fb4d8502Sjsg uint32_t mask); 53fb4d8502Sjsg 54c349dbc7Sjsg struct gpio *dal_gpio_service_create_generic_mux( 55c349dbc7Sjsg struct gpio_service *service, 56c349dbc7Sjsg uint32_t offset, 57c349dbc7Sjsg uint32_t mask); 58c349dbc7Sjsg 59c349dbc7Sjsg void dal_gpio_destroy_generic_mux( 60c349dbc7Sjsg struct gpio **mux); 61c349dbc7Sjsg 62c349dbc7Sjsg enum gpio_result dal_mux_setup_config( 63c349dbc7Sjsg struct gpio *mux, 64c349dbc7Sjsg struct gpio_generic_mux_config *config); 65c349dbc7Sjsg 66c349dbc7Sjsg struct gpio_pin_info dal_gpio_get_generic_pin_info( 67c349dbc7Sjsg struct gpio_service *service, 68c349dbc7Sjsg enum gpio_id id, 69c349dbc7Sjsg uint32_t en); 70c349dbc7Sjsg 71fb4d8502Sjsg struct ddc *dal_gpio_create_ddc( 72fb4d8502Sjsg struct gpio_service *service, 73fb4d8502Sjsg uint32_t offset, 74fb4d8502Sjsg uint32_t mask, 75fb4d8502Sjsg struct gpio_ddc_hw_info *info); 76fb4d8502Sjsg 77fb4d8502Sjsg void dal_gpio_destroy_ddc( 78fb4d8502Sjsg struct ddc **ddc); 79fb4d8502Sjsg 80fb4d8502Sjsg void dal_gpio_service_destroy( 81fb4d8502Sjsg struct gpio_service **ptr); 82fb4d8502Sjsg 83fb4d8502Sjsg enum dc_irq_source dal_irq_get_source( 84fb4d8502Sjsg const struct gpio *irq); 85fb4d8502Sjsg 86fb4d8502Sjsg enum dc_irq_source dal_irq_get_rx_source( 87fb4d8502Sjsg const struct gpio *irq); 88fb4d8502Sjsg 89fb4d8502Sjsg enum gpio_result dal_irq_setup_hpd_filter( 90fb4d8502Sjsg struct gpio *irq, 91fb4d8502Sjsg struct gpio_hpd_config *config); 92fb4d8502Sjsg 93fb4d8502Sjsg struct gpio *dal_gpio_create_irq( 94fb4d8502Sjsg struct gpio_service *service, 95fb4d8502Sjsg enum gpio_id id, 96fb4d8502Sjsg uint32_t en); 97fb4d8502Sjsg 98fb4d8502Sjsg void dal_gpio_destroy_irq( 99fb4d8502Sjsg struct gpio **ptr); 100fb4d8502Sjsg 101fb4d8502Sjsg 102fb4d8502Sjsg enum gpio_result dal_ddc_open( 103fb4d8502Sjsg struct ddc *ddc, 104fb4d8502Sjsg enum gpio_mode mode, 105fb4d8502Sjsg enum gpio_ddc_config_type config_type); 106fb4d8502Sjsg 107fb4d8502Sjsg enum gpio_result dal_ddc_change_mode( 108fb4d8502Sjsg struct ddc *ddc, 109fb4d8502Sjsg enum gpio_mode mode); 110fb4d8502Sjsg 111fb4d8502Sjsg enum gpio_ddc_line dal_ddc_get_line( 112fb4d8502Sjsg const struct ddc *ddc); 113fb4d8502Sjsg 114fb4d8502Sjsg enum gpio_result dal_ddc_set_config( 115fb4d8502Sjsg struct ddc *ddc, 116fb4d8502Sjsg enum gpio_ddc_config_type config_type); 117fb4d8502Sjsg 118fb4d8502Sjsg void dal_ddc_close( 119fb4d8502Sjsg struct ddc *ddc); 120fb4d8502Sjsg 121fb4d8502Sjsg #endif 122