1fb4d8502Sjsg /* 2fb4d8502Sjsg * Copyright 2015 Advanced Micro Devices, Inc. 3fb4d8502Sjsg * 4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"), 6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation 7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions: 10fb4d8502Sjsg * 11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included in 12fb4d8502Sjsg * all copies or substantial portions of the Software. 13fb4d8502Sjsg * 14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15fb4d8502Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18fb4d8502Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19fb4d8502Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20fb4d8502Sjsg * OTHER DEALINGS IN THE SOFTWARE. 21fb4d8502Sjsg * 22fb4d8502Sjsg * Authors: AMD 23fb4d8502Sjsg * 24fb4d8502Sjsg */ 25fb4d8502Sjsg 26fb4d8502Sjsg #ifndef __DC_LINK_HWSS_H__ 27fb4d8502Sjsg #define __DC_LINK_HWSS_H__ 28fb4d8502Sjsg 291bb76ff1Sjsg /* include basic type headers only */ 301bb76ff1Sjsg #include "dc_dp_types.h" 311bb76ff1Sjsg #include "signal_types.h" 321bb76ff1Sjsg #include "grph_object_id.h" 331bb76ff1Sjsg #include "fixed31_32.h" 34fb4d8502Sjsg 351bb76ff1Sjsg /* forward declare dc core types */ 361bb76ff1Sjsg struct dc_link; 371bb76ff1Sjsg struct link_resource; 381bb76ff1Sjsg struct pipe_ctx; 391bb76ff1Sjsg struct encoder_set_dp_phy_pattern_param; 401bb76ff1Sjsg struct link_mst_stream_allocation_table; 41*f005ef32Sjsg struct audio_output; 421bb76ff1Sjsg 431bb76ff1Sjsg struct link_hwss_ext { 441bb76ff1Sjsg /* function pointers below may require to check for NULL if caller 451bb76ff1Sjsg * considers missing implementation as expected in some cases or none 461bb76ff1Sjsg * critical to be investigated immediately 471bb76ff1Sjsg * ********************************************************************* 481bb76ff1Sjsg */ 491bb76ff1Sjsg void (*set_hblank_min_symbol_width)(struct pipe_ctx *pipe_ctx, 501bb76ff1Sjsg const struct dc_link_settings *link_settings, 511bb76ff1Sjsg struct fixed31_32 throttled_vcp_size); 521bb76ff1Sjsg void (*set_throttled_vcp_size)(struct pipe_ctx *pipe_ctx, 531bb76ff1Sjsg struct fixed31_32 throttled_vcp_size); 541bb76ff1Sjsg void (*enable_dp_link_output)(struct dc_link *link, 551bb76ff1Sjsg const struct link_resource *link_res, 56fb4d8502Sjsg enum amd_signal_type signal, 57fb4d8502Sjsg enum clock_source_id clock_source, 58fb4d8502Sjsg const struct dc_link_settings *link_settings); 591bb76ff1Sjsg void (*set_dp_link_test_pattern)(struct dc_link *link, 601bb76ff1Sjsg const struct link_resource *link_res, 611bb76ff1Sjsg struct encoder_set_dp_phy_pattern_param *tp_params); 621bb76ff1Sjsg void (*set_dp_lane_settings)(struct dc_link *link, 631bb76ff1Sjsg const struct link_resource *link_res, 641bb76ff1Sjsg const struct dc_link_settings *link_settings, 651bb76ff1Sjsg const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]); 661bb76ff1Sjsg void (*update_stream_allocation_table)(struct dc_link *link, 671bb76ff1Sjsg const struct link_resource *link_res, 681bb76ff1Sjsg const struct link_mst_stream_allocation_table *table); 691bb76ff1Sjsg }; 70fb4d8502Sjsg 711bb76ff1Sjsg struct link_hwss { 721bb76ff1Sjsg struct link_hwss_ext ext; 73fb4d8502Sjsg 741bb76ff1Sjsg /* function pointers below MUST be assigned to all types of link_hwss 751bb76ff1Sjsg * ********************************************************************* 761bb76ff1Sjsg */ 771bb76ff1Sjsg void (*setup_stream_encoder)(struct pipe_ctx *pipe_ctx); 781bb76ff1Sjsg void (*reset_stream_encoder)(struct pipe_ctx *pipe_ctx); 791bb76ff1Sjsg void (*setup_stream_attribute)(struct pipe_ctx *pipe_ctx); 801bb76ff1Sjsg void (*disable_link_output)(struct dc_link *link, 811bb76ff1Sjsg const struct link_resource *link_res, 821bb76ff1Sjsg enum amd_signal_type signal); 83*f005ef32Sjsg void (*setup_audio_output)(struct pipe_ctx *pipe_ctx, 84*f005ef32Sjsg struct audio_output *audio_output, uint32_t audio_inst); 85*f005ef32Sjsg void (*enable_audio_packet)(struct pipe_ctx *pipe_ctx); 86*f005ef32Sjsg void (*disable_audio_packet)(struct pipe_ctx *pipe_ctx); 871bb76ff1Sjsg }; 88fb4d8502Sjsg #endif /* __DC_LINK_HWSS_H__ */ 891bb76ff1Sjsg 90