xref: /openbsd-src/sys/dev/pci/drm/amd/display/dc/inc/hw/mpc.h (revision 1bb76ff151c0aba8e3312a604e4cd2e5195cf4b7)
1fb4d8502Sjsg /* Copyright 2012-15 Advanced Micro Devices, Inc.
2fb4d8502Sjsg  *
3fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
4fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
5fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
6fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
8fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
9fb4d8502Sjsg  *
10fb4d8502Sjsg  * The above copyright notice and this permission notice shall be included in
11fb4d8502Sjsg  * all copies or substantial portions of the Software.
12fb4d8502Sjsg  *
13fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14fb4d8502Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
16fb4d8502Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17fb4d8502Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18fb4d8502Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19fb4d8502Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
20fb4d8502Sjsg  *
21fb4d8502Sjsg  * Authors: AMD
22fb4d8502Sjsg  *
23fb4d8502Sjsg  */
24fb4d8502Sjsg 
25*1bb76ff1Sjsg /**
26*1bb76ff1Sjsg  * DOC: mpc-overview
27*1bb76ff1Sjsg  *
28*1bb76ff1Sjsg  * Multiple Pipe/Plane Combined (MPC) is a component in the hardware pipeline
29*1bb76ff1Sjsg  * that performs blending of multiple planes, using global and per-pixel alpha.
30*1bb76ff1Sjsg  * It also performs post-blending color correction operations according to the
31*1bb76ff1Sjsg  * hardware capabilities, such as color transformation matrix and gamma 1D and
32*1bb76ff1Sjsg  * 3D LUT.
33*1bb76ff1Sjsg  */
34*1bb76ff1Sjsg 
35fb4d8502Sjsg #ifndef __DC_MPCC_H__
36fb4d8502Sjsg #define __DC_MPCC_H__
37fb4d8502Sjsg 
38fb4d8502Sjsg #include "dc_hw_types.h"
39fb4d8502Sjsg #include "hw_shared.h"
40ad8b1aafSjsg #include "transform.h"
41fb4d8502Sjsg 
42fb4d8502Sjsg #define MAX_MPCC 6
43fb4d8502Sjsg #define MAX_OPP 6
44fb4d8502Sjsg 
45ad8b1aafSjsg #define MAX_DWB		2
46c349dbc7Sjsg 
47fb4d8502Sjsg enum mpc_output_csc_mode {
48fb4d8502Sjsg 	MPC_OUTPUT_CSC_DISABLE = 0,
49fb4d8502Sjsg 	MPC_OUTPUT_CSC_COEF_A,
50fb4d8502Sjsg 	MPC_OUTPUT_CSC_COEF_B
51fb4d8502Sjsg };
52fb4d8502Sjsg 
53fb4d8502Sjsg 
54fb4d8502Sjsg enum mpcc_blend_mode {
55fb4d8502Sjsg 	MPCC_BLEND_MODE_BYPASS,
56fb4d8502Sjsg 	MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH,
57fb4d8502Sjsg 	MPCC_BLEND_MODE_TOP_LAYER_ONLY,
58fb4d8502Sjsg 	MPCC_BLEND_MODE_TOP_BOT_BLENDING
59fb4d8502Sjsg };
60fb4d8502Sjsg 
61*1bb76ff1Sjsg /**
62*1bb76ff1Sjsg  * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel
63*1bb76ff1Sjsg  * alpha and plane alpha values
64*1bb76ff1Sjsg  */
65fb4d8502Sjsg enum mpcc_alpha_blend_mode {
66*1bb76ff1Sjsg 	/**
67*1bb76ff1Sjsg 	 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA: per pixel alpha using DPP
68*1bb76ff1Sjsg 	 * alpha value
69*1bb76ff1Sjsg 	 */
70fb4d8502Sjsg 	MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA,
71*1bb76ff1Sjsg 	/**
72*1bb76ff1Sjsg 	 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN: per
73*1bb76ff1Sjsg 	 * pixel alpha using DPP alpha value multiplied by a global gain (plane
74*1bb76ff1Sjsg 	 * alpha)
75*1bb76ff1Sjsg 	 */
76fb4d8502Sjsg 	MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN,
77*1bb76ff1Sjsg 	/**
78*1bb76ff1Sjsg 	 * @MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA: global alpha value, ignores
79*1bb76ff1Sjsg 	 * pixel alpha and consider only plane alpha
80*1bb76ff1Sjsg 	 */
81fb4d8502Sjsg 	MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA
82fb4d8502Sjsg };
83fb4d8502Sjsg 
84*1bb76ff1Sjsg /**
85*1bb76ff1Sjsg  * struct mpcc_blnd_cfg - MPCC blending configuration
86*1bb76ff1Sjsg  *
87*1bb76ff1Sjsg  * @black_color: background color
88*1bb76ff1Sjsg  * @alpha_mode: alpha blend mode (MPCC_ALPHA_BLND_MODE)
89*1bb76ff1Sjsg  * @pre_multiplied_alpha: whether pixel color values were pre-multiplied by the
90*1bb76ff1Sjsg  * alpha channel (MPCC_ALPHA_MULTIPLIED_MODE)
91*1bb76ff1Sjsg  * @global_gain: used when blend mode considers both pixel alpha and plane
92*1bb76ff1Sjsg  * alpha value and assumes the global alpha value.
93*1bb76ff1Sjsg  * @global_alpha: plane alpha value
94fb4d8502Sjsg  */
95fb4d8502Sjsg struct mpcc_blnd_cfg {
96fb4d8502Sjsg 	struct tg_color black_color;	/* background color */
97fb4d8502Sjsg 	enum mpcc_alpha_blend_mode alpha_mode;	/* alpha blend mode */
98fb4d8502Sjsg 	bool pre_multiplied_alpha;	/* alpha pre-multiplied mode flag */
99fb4d8502Sjsg 	int global_gain;
100fb4d8502Sjsg 	int global_alpha;
101fb4d8502Sjsg 	bool overlap_only;
102fb4d8502Sjsg 
103c349dbc7Sjsg 	/* MPCC top/bottom gain settings */
104c349dbc7Sjsg 	int bottom_gain_mode;
105c349dbc7Sjsg 	int background_color_bpc;
106c349dbc7Sjsg 	int top_gain;
107c349dbc7Sjsg 	int bottom_inside_gain;
108c349dbc7Sjsg 	int bottom_outside_gain;
109fb4d8502Sjsg };
110fb4d8502Sjsg 
111ad8b1aafSjsg struct mpc_grph_gamut_adjustment {
112ad8b1aafSjsg 	struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
113ad8b1aafSjsg 	enum graphics_gamut_adjust_type gamut_adjust_type;
114ad8b1aafSjsg };
1155ca02815Sjsg 
116fb4d8502Sjsg struct mpcc_sm_cfg {
117fb4d8502Sjsg 	bool enable;
118fb4d8502Sjsg 	/* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */
119fb4d8502Sjsg 	int sm_mode;
120fb4d8502Sjsg 	/* 0- disable frame alternate, 1- enable frame alternate */
121fb4d8502Sjsg 	bool frame_alt;
122fb4d8502Sjsg 	/* 0- disable field alternate, 1- enable field alternate */
123fb4d8502Sjsg 	bool field_alt;
124fb4d8502Sjsg 	/* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */
125fb4d8502Sjsg 	int force_next_frame_porlarity;
126fb4d8502Sjsg 	/* 0-no force,2-force field polarity from top,3-force field polarity from bottom */
127fb4d8502Sjsg 	int force_next_field_polarity;
128fb4d8502Sjsg };
129fb4d8502Sjsg 
130c349dbc7Sjsg struct mpc_denorm_clamp {
131c349dbc7Sjsg 	int clamp_max_r_cr;
132c349dbc7Sjsg 	int clamp_min_r_cr;
133c349dbc7Sjsg 	int clamp_max_g_y;
134c349dbc7Sjsg 	int clamp_min_g_y;
135c349dbc7Sjsg 	int clamp_max_b_cb;
136c349dbc7Sjsg 	int clamp_min_b_cb;
137c349dbc7Sjsg };
138c349dbc7Sjsg 
139ad8b1aafSjsg struct mpc_dwb_flow_control {
140ad8b1aafSjsg 	int flow_ctrl_mode;
141ad8b1aafSjsg 	int flow_ctrl_cnt0;
142ad8b1aafSjsg 	int flow_ctrl_cnt1;
143ad8b1aafSjsg };
1445ca02815Sjsg 
145*1bb76ff1Sjsg /**
146*1bb76ff1Sjsg  * struct mpcc - MPCC connection and blending configuration for a single MPCC instance.
147*1bb76ff1Sjsg  * @mpcc_id: MPCC physical instance
148*1bb76ff1Sjsg  * @dpp_id: DPP input to this MPCC
149*1bb76ff1Sjsg  * @mpcc_bot: pointer to bottom layer MPCC. NULL when not connected.
150*1bb76ff1Sjsg  * @blnd_cfg: the blending configuration for this MPCC
151*1bb76ff1Sjsg  * @sm_cfg: stereo mix setting for this MPCC
152*1bb76ff1Sjsg  * @shared_bottom: if MPCC output to both OPP and DWB endpoints, true. Otherwise, false.
153*1bb76ff1Sjsg  *
154fb4d8502Sjsg  * This struct is used as a node in an MPC tree.
155fb4d8502Sjsg  */
156fb4d8502Sjsg struct mpcc {
157fb4d8502Sjsg 	int mpcc_id;			/* MPCC physical instance */
158fb4d8502Sjsg 	int dpp_id;			/* DPP input to this MPCC */
159fb4d8502Sjsg 	struct mpcc *mpcc_bot;		/* pointer to bottom layer MPCC.  NULL when not connected */
160fb4d8502Sjsg 	struct mpcc_blnd_cfg blnd_cfg;	/* The blending configuration for this MPCC */
161fb4d8502Sjsg 	struct mpcc_sm_cfg sm_cfg;	/* stereo mix setting for this MPCC */
162ad8b1aafSjsg 	bool shared_bottom;		/* TRUE if MPCC output to both OPP and DWB endpoints, else FALSE */
163fb4d8502Sjsg };
164fb4d8502Sjsg 
165*1bb76ff1Sjsg /**
166*1bb76ff1Sjsg  * struct mpc_tree - MPC tree represents all MPCC connections for a pipe.
167*1bb76ff1Sjsg  *
168*1bb76ff1Sjsg  * @opp_id: the OPP instance that owns this MPC tree
169*1bb76ff1Sjsg  * @opp_list: the top MPCC layer of the MPC tree that outputs to OPP endpoint
170*1bb76ff1Sjsg  *
171fb4d8502Sjsg  */
172fb4d8502Sjsg struct mpc_tree {
173fb4d8502Sjsg 	int opp_id;			/* The OPP instance that owns this MPC tree */
174fb4d8502Sjsg 	struct mpcc *opp_list;		/* The top MPCC layer of the MPC tree that outputs to OPP endpoint */
175fb4d8502Sjsg };
176fb4d8502Sjsg 
177fb4d8502Sjsg struct mpc {
178fb4d8502Sjsg 	const struct mpc_funcs *funcs;
179fb4d8502Sjsg 	struct dc_context *ctx;
180fb4d8502Sjsg 
181fb4d8502Sjsg 	struct mpcc mpcc_array[MAX_MPCC];
182c349dbc7Sjsg 	struct pwl_params blender_params;
183c349dbc7Sjsg 	bool cm_bypass_mode;
184fb4d8502Sjsg };
185fb4d8502Sjsg 
186fb4d8502Sjsg struct mpcc_state {
187fb4d8502Sjsg 	uint32_t opp_id;
188fb4d8502Sjsg 	uint32_t dpp_id;
189fb4d8502Sjsg 	uint32_t bot_mpcc_id;
190fb4d8502Sjsg 	uint32_t mode;
191fb4d8502Sjsg 	uint32_t alpha_mode;
192fb4d8502Sjsg 	uint32_t pre_multiplied_alpha;
193fb4d8502Sjsg 	uint32_t overlap_only;
194fb4d8502Sjsg 	uint32_t idle;
195fb4d8502Sjsg 	uint32_t busy;
196fb4d8502Sjsg };
197fb4d8502Sjsg 
198*1bb76ff1Sjsg /**
199*1bb76ff1Sjsg  * struct mpc_funcs - funcs
200*1bb76ff1Sjsg  */
201fb4d8502Sjsg struct mpc_funcs {
202fb4d8502Sjsg 	void (*read_mpcc_state)(
203fb4d8502Sjsg 			struct mpc *mpc,
204fb4d8502Sjsg 			int mpcc_inst,
205fb4d8502Sjsg 			struct mpcc_state *s);
206fb4d8502Sjsg 
207*1bb76ff1Sjsg 	/**
208*1bb76ff1Sjsg 	 * @insert_plane:
209*1bb76ff1Sjsg 	 *
210fb4d8502Sjsg 	 * Insert DPP into MPC tree based on specified blending position.
211fb4d8502Sjsg 	 * Only used for planes that are part of blending chain for OPP output
212fb4d8502Sjsg 	 *
213fb4d8502Sjsg 	 * Parameters:
214fb4d8502Sjsg 	 * [in/out] mpc		- MPC context.
215fb4d8502Sjsg 	 * [in/out] tree	- MPC tree structure that plane will be added to.
216fb4d8502Sjsg 	 * [in]	blnd_cfg	- MPCC blending configuration for the new blending layer.
217fb4d8502Sjsg 	 * [in]	sm_cfg		- MPCC stereo mix configuration for the new blending layer.
218fb4d8502Sjsg 	 *			  stereo mix must disable for the very bottom layer of the tree config.
219fb4d8502Sjsg 	 * [in]	insert_above_mpcc - Insert new plane above this MPCC.  If NULL, insert as bottom plane.
220fb4d8502Sjsg 	 * [in]	dpp_id		 - DPP instance for the plane to be added.
221fb4d8502Sjsg 	 * [in]	mpcc_id		 - The MPCC physical instance to use for blending.
222fb4d8502Sjsg 	 *
223fb4d8502Sjsg 	 * Return:  struct mpcc* - MPCC that was added.
224fb4d8502Sjsg 	 */
225fb4d8502Sjsg 	struct mpcc* (*insert_plane)(
226fb4d8502Sjsg 			struct mpc *mpc,
227fb4d8502Sjsg 			struct mpc_tree *tree,
228fb4d8502Sjsg 			struct mpcc_blnd_cfg *blnd_cfg,
229fb4d8502Sjsg 			struct mpcc_sm_cfg *sm_cfg,
230fb4d8502Sjsg 			struct mpcc *insert_above_mpcc,
231fb4d8502Sjsg 			int dpp_id,
232fb4d8502Sjsg 			int mpcc_id);
233fb4d8502Sjsg 
234*1bb76ff1Sjsg 	/**
235*1bb76ff1Sjsg 	 * @remove_mpcc:
236*1bb76ff1Sjsg 	 *
237fb4d8502Sjsg 	 * Remove a specified MPCC from the MPC tree.
238fb4d8502Sjsg 	 *
239fb4d8502Sjsg 	 * Parameters:
240fb4d8502Sjsg 	 * [in/out] mpc		- MPC context.
241fb4d8502Sjsg 	 * [in/out] tree	- MPC tree structure that plane will be removed from.
242fb4d8502Sjsg 	 * [in/out] mpcc	- MPCC to be removed from tree.
243fb4d8502Sjsg 	 *
244fb4d8502Sjsg 	 * Return:  void
245fb4d8502Sjsg 	 */
246fb4d8502Sjsg 	void (*remove_mpcc)(
247fb4d8502Sjsg 			struct mpc *mpc,
248fb4d8502Sjsg 			struct mpc_tree *tree,
249fb4d8502Sjsg 			struct mpcc *mpcc);
250fb4d8502Sjsg 
251*1bb76ff1Sjsg 	/**
252*1bb76ff1Sjsg 	 * @mpc_init:
253*1bb76ff1Sjsg 	 *
254fb4d8502Sjsg 	 * Reset the MPCC HW status by disconnecting all muxes.
255fb4d8502Sjsg 	 *
256fb4d8502Sjsg 	 * Parameters:
257fb4d8502Sjsg 	 * [in/out] mpc		- MPC context.
258fb4d8502Sjsg 	 *
259fb4d8502Sjsg 	 * Return:  void
260fb4d8502Sjsg 	 */
261fb4d8502Sjsg 	void (*mpc_init)(struct mpc *mpc);
262c349dbc7Sjsg 	void (*mpc_init_single_inst)(
263c349dbc7Sjsg 			struct mpc *mpc,
264c349dbc7Sjsg 			unsigned int mpcc_id);
265fb4d8502Sjsg 
266*1bb76ff1Sjsg 	/**
267*1bb76ff1Sjsg 	 * @update_blending:
268*1bb76ff1Sjsg 	 *
269fb4d8502Sjsg 	 * Update the blending configuration for a specified MPCC.
270fb4d8502Sjsg 	 *
271fb4d8502Sjsg 	 * Parameters:
272fb4d8502Sjsg 	 * [in/out] mpc		- MPC context.
273fb4d8502Sjsg 	 * [in]     blnd_cfg	- MPCC blending configuration.
274fb4d8502Sjsg 	 * [in]     mpcc_id	- The MPCC physical instance.
275fb4d8502Sjsg 	 *
276fb4d8502Sjsg 	 * Return:  void
277fb4d8502Sjsg 	 */
278fb4d8502Sjsg 	void (*update_blending)(
279fb4d8502Sjsg 		struct mpc *mpc,
280fb4d8502Sjsg 		struct mpcc_blnd_cfg *blnd_cfg,
281fb4d8502Sjsg 		int mpcc_id);
282fb4d8502Sjsg 
283*1bb76ff1Sjsg 	/**
284*1bb76ff1Sjsg 	 * @cursor_lock:
285*1bb76ff1Sjsg 	 *
286c349dbc7Sjsg 	 * Lock cursor updates for the specified OPP.
287c349dbc7Sjsg 	 * OPP defines the set of MPCC that are locked together for cursor.
288c349dbc7Sjsg 	 *
289c349dbc7Sjsg 	 * Parameters:
290c349dbc7Sjsg 	 * [in] 	mpc		- MPC context.
291c349dbc7Sjsg 	 * [in]     opp_id	- The OPP to lock cursor updates on
292c349dbc7Sjsg 	 * [in]		lock	- lock/unlock the OPP
293c349dbc7Sjsg 	 *
294c349dbc7Sjsg 	 * Return:  void
295c349dbc7Sjsg 	 */
296c349dbc7Sjsg 	void (*cursor_lock)(
297c349dbc7Sjsg 			struct mpc *mpc,
298c349dbc7Sjsg 			int opp_id,
299c349dbc7Sjsg 			bool lock);
300c349dbc7Sjsg 
301*1bb76ff1Sjsg 	/**
302*1bb76ff1Sjsg 	 * @insert_plane_to_secondary:
303*1bb76ff1Sjsg 	 *
304*1bb76ff1Sjsg 	 * Add DPP into secondary MPC tree based on specified blending position.
305ad8b1aafSjsg 	 * Only used for planes that are part of blending chain for DWB output
306ad8b1aafSjsg 	 *
307ad8b1aafSjsg 	 * Parameters:
308ad8b1aafSjsg 	 * [in/out] mpc		- MPC context.
309ad8b1aafSjsg 	 * [in/out] tree		- MPC tree structure that plane will be added to.
310ad8b1aafSjsg 	 * [in]	blnd_cfg	- MPCC blending configuration for the new blending layer.
311ad8b1aafSjsg 	 * [in]	sm_cfg		- MPCC stereo mix configuration for the new blending layer.
312ad8b1aafSjsg 	 *			  stereo mix must disable for the very bottom layer of the tree config.
313ad8b1aafSjsg 	 * [in]	insert_above_mpcc - Insert new plane above this MPCC.  If NULL, insert as bottom plane.
314ad8b1aafSjsg 	 * [in]	dpp_id		- DPP instance for the plane to be added.
315ad8b1aafSjsg 	 * [in]	mpcc_id		- The MPCC physical instance to use for blending.
316ad8b1aafSjsg 	 *
317ad8b1aafSjsg 	 * Return:  struct mpcc* - MPCC that was added.
318ad8b1aafSjsg 	 */
319ad8b1aafSjsg 	struct mpcc* (*insert_plane_to_secondary)(
320ad8b1aafSjsg 			struct mpc *mpc,
321ad8b1aafSjsg 			struct mpc_tree *tree,
322ad8b1aafSjsg 			struct mpcc_blnd_cfg *blnd_cfg,
323ad8b1aafSjsg 			struct mpcc_sm_cfg *sm_cfg,
324ad8b1aafSjsg 			struct mpcc *insert_above_mpcc,
325ad8b1aafSjsg 			int dpp_id,
326ad8b1aafSjsg 			int mpcc_id);
327ad8b1aafSjsg 
328*1bb76ff1Sjsg 	/**
329*1bb76ff1Sjsg 	 * @remove_mpcc_from_secondary:
330*1bb76ff1Sjsg 	 *
331ad8b1aafSjsg 	 * Remove a specified DPP from the 'secondary' MPC tree.
332ad8b1aafSjsg 	 *
333ad8b1aafSjsg 	 * Parameters:
334ad8b1aafSjsg 	 * [in/out] mpc		- MPC context.
335ad8b1aafSjsg 	 * [in/out] tree	- MPC tree structure that plane will be removed from.
336ad8b1aafSjsg 	 * [in]     mpcc	- MPCC to be removed from tree.
337ad8b1aafSjsg 	 * Return:  void
338ad8b1aafSjsg 	 */
339ad8b1aafSjsg 	void (*remove_mpcc_from_secondary)(
340ad8b1aafSjsg 			struct mpc *mpc,
341ad8b1aafSjsg 			struct mpc_tree *tree,
342ad8b1aafSjsg 			struct mpcc *mpcc);
343ad8b1aafSjsg 
344ad8b1aafSjsg 	struct mpcc* (*get_mpcc_for_dpp_from_secondary)(
345ad8b1aafSjsg 			struct mpc_tree *tree,
346ad8b1aafSjsg 			int dpp_id);
347*1bb76ff1Sjsg 
348fb4d8502Sjsg 	struct mpcc* (*get_mpcc_for_dpp)(
349fb4d8502Sjsg 			struct mpc_tree *tree,
350fb4d8502Sjsg 			int dpp_id);
351fb4d8502Sjsg 
352fb4d8502Sjsg 	void (*wait_for_idle)(struct mpc *mpc, int id);
353fb4d8502Sjsg 
354fb4d8502Sjsg 	void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id);
355fb4d8502Sjsg 
356fb4d8502Sjsg 	void (*init_mpcc_list_from_hw)(
357fb4d8502Sjsg 		struct mpc *mpc,
358fb4d8502Sjsg 		struct mpc_tree *tree);
359fb4d8502Sjsg 
360c349dbc7Sjsg 	void (*set_denorm)(struct mpc *mpc,
361c349dbc7Sjsg 			int opp_id,
362c349dbc7Sjsg 			enum dc_color_depth output_depth);
363c349dbc7Sjsg 
364c349dbc7Sjsg 	void (*set_denorm_clamp)(
365c349dbc7Sjsg 			struct mpc *mpc,
366c349dbc7Sjsg 			int opp_id,
367c349dbc7Sjsg 			struct mpc_denorm_clamp denorm_clamp);
368c349dbc7Sjsg 
369c349dbc7Sjsg 	void (*set_output_csc)(struct mpc *mpc,
370c349dbc7Sjsg 			int opp_id,
371c349dbc7Sjsg 			const uint16_t *regval,
372c349dbc7Sjsg 			enum mpc_output_csc_mode ocsc_mode);
373c349dbc7Sjsg 
374c349dbc7Sjsg 	void (*set_ocsc_default)(struct mpc *mpc,
375c349dbc7Sjsg 			int opp_id,
376c349dbc7Sjsg 			enum dc_color_space color_space,
377c349dbc7Sjsg 			enum mpc_output_csc_mode ocsc_mode);
378c349dbc7Sjsg 
379c349dbc7Sjsg 	void (*set_output_gamma)(
380c349dbc7Sjsg 			struct mpc *mpc,
381c349dbc7Sjsg 			int mpcc_id,
382c349dbc7Sjsg 			const struct pwl_params *params);
383c349dbc7Sjsg 	void (*power_on_mpc_mem_pwr)(
384c349dbc7Sjsg 			struct mpc *mpc,
385c349dbc7Sjsg 			int mpcc_id,
386c349dbc7Sjsg 			bool power_on);
387ad8b1aafSjsg 	void (*set_dwb_mux)(
388ad8b1aafSjsg 			struct mpc *mpc,
389ad8b1aafSjsg 			int dwb_id,
390ad8b1aafSjsg 			int mpcc_id);
391ad8b1aafSjsg 
392ad8b1aafSjsg 	void (*disable_dwb_mux)(
393ad8b1aafSjsg 		struct mpc *mpc,
394ad8b1aafSjsg 		int dwb_id);
395ad8b1aafSjsg 
396ad8b1aafSjsg 	bool (*is_dwb_idle)(
397ad8b1aafSjsg 		struct mpc *mpc,
398ad8b1aafSjsg 		int dwb_id);
399ad8b1aafSjsg 
400ad8b1aafSjsg 	void (*set_out_rate_control)(
401ad8b1aafSjsg 		struct mpc *mpc,
402ad8b1aafSjsg 		int opp_id,
403ad8b1aafSjsg 		bool enable,
404ad8b1aafSjsg 		bool rate_2x_mode,
405ad8b1aafSjsg 		struct mpc_dwb_flow_control *flow_control);
406ad8b1aafSjsg 
407ad8b1aafSjsg 	void (*set_gamut_remap)(
408ad8b1aafSjsg 			struct mpc *mpc,
409ad8b1aafSjsg 			int mpcc_id,
410ad8b1aafSjsg 			const struct mpc_grph_gamut_adjustment *adjust);
411ad8b1aafSjsg 
412*1bb76ff1Sjsg 	bool (*program_1dlut)(
413*1bb76ff1Sjsg 			struct mpc *mpc,
414*1bb76ff1Sjsg 			const struct pwl_params *params,
415*1bb76ff1Sjsg 			uint32_t rmu_idx);
416*1bb76ff1Sjsg 
417ad8b1aafSjsg 	bool (*program_shaper)(
418ad8b1aafSjsg 			struct mpc *mpc,
419ad8b1aafSjsg 			const struct pwl_params *params,
420ad8b1aafSjsg 			uint32_t rmu_idx);
421ad8b1aafSjsg 
422ad8b1aafSjsg 	uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx);
423ad8b1aafSjsg 
424ad8b1aafSjsg 	bool (*program_3dlut)(
425ad8b1aafSjsg 			struct mpc *mpc,
426ad8b1aafSjsg 			const struct tetrahedral_params *params,
427ad8b1aafSjsg 			int rmu_idx);
428ad8b1aafSjsg 
429ad8b1aafSjsg 	int (*release_rmu)(struct mpc *mpc, int mpcc_id);
430ad8b1aafSjsg 
4315ca02815Sjsg 	unsigned int (*get_mpc_out_mux)(
4325ca02815Sjsg 			struct mpc *mpc,
4335ca02815Sjsg 			int opp_id);
434c349dbc7Sjsg 
4355ca02815Sjsg 	void (*set_bg_color)(struct mpc *mpc,
4365ca02815Sjsg 			struct tg_color *bg_color,
4375ca02815Sjsg 			int mpcc_id);
438*1bb76ff1Sjsg 	void (*set_mpc_mem_lp_mode)(struct mpc *mpc);
439fb4d8502Sjsg };
440fb4d8502Sjsg 
441fb4d8502Sjsg #endif
442