1*c349dbc7Sjsg /*
2*c349dbc7Sjsg * Copyright 2012-15 Advanced Micro Devices, Inc.
3*c349dbc7Sjsg *
4*c349dbc7Sjsg * Permission is hereby granted, free of charge, to any person obtaining a
5*c349dbc7Sjsg * copy of this software and associated documentation files (the "Software"),
6*c349dbc7Sjsg * to deal in the Software without restriction, including without limitation
7*c349dbc7Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*c349dbc7Sjsg * and/or sell copies of the Software, and to permit persons to whom the
9*c349dbc7Sjsg * Software is furnished to do so, subject to the following conditions:
10*c349dbc7Sjsg *
11*c349dbc7Sjsg * The above copyright notice and this permission notice shall be included in
12*c349dbc7Sjsg * all copies or substantial portions of the Software.
13*c349dbc7Sjsg *
14*c349dbc7Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*c349dbc7Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*c349dbc7Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*c349dbc7Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*c349dbc7Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*c349dbc7Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*c349dbc7Sjsg * OTHER DEALINGS IN THE SOFTWARE.
21*c349dbc7Sjsg *
22*c349dbc7Sjsg * Authors: AMD
23*c349dbc7Sjsg *
24*c349dbc7Sjsg */
25*c349dbc7Sjsg
26*c349dbc7Sjsg #include <linux/slab.h>
27*c349dbc7Sjsg
28*c349dbc7Sjsg #include "dm_services.h"
29*c349dbc7Sjsg
30*c349dbc7Sjsg #include "include/gpio_interface.h"
31*c349dbc7Sjsg #include "include/gpio_types.h"
32*c349dbc7Sjsg #include "hw_gpio.h"
33*c349dbc7Sjsg #include "hw_generic.h"
34*c349dbc7Sjsg
35*c349dbc7Sjsg #include "reg_helper.h"
36*c349dbc7Sjsg #include "generic_regs.h"
37*c349dbc7Sjsg
38*c349dbc7Sjsg #undef FN
39*c349dbc7Sjsg #define FN(reg_name, field_name) \
40*c349dbc7Sjsg generic->shifts->field_name, generic->masks->field_name
41*c349dbc7Sjsg
42*c349dbc7Sjsg #define CTX \
43*c349dbc7Sjsg generic->base.base.ctx
44*c349dbc7Sjsg #define REG(reg)\
45*c349dbc7Sjsg (generic->regs->reg)
46*c349dbc7Sjsg
47*c349dbc7Sjsg struct gpio;
48*c349dbc7Sjsg
dal_hw_generic_destruct(struct hw_generic * pin)49*c349dbc7Sjsg static void dal_hw_generic_destruct(
50*c349dbc7Sjsg struct hw_generic *pin)
51*c349dbc7Sjsg {
52*c349dbc7Sjsg dal_hw_gpio_destruct(&pin->base);
53*c349dbc7Sjsg }
54*c349dbc7Sjsg
dal_hw_generic_destroy(struct hw_gpio_pin ** ptr)55*c349dbc7Sjsg static void dal_hw_generic_destroy(
56*c349dbc7Sjsg struct hw_gpio_pin **ptr)
57*c349dbc7Sjsg {
58*c349dbc7Sjsg struct hw_generic *generic = HW_GENERIC_FROM_BASE(*ptr);
59*c349dbc7Sjsg
60*c349dbc7Sjsg dal_hw_generic_destruct(generic);
61*c349dbc7Sjsg
62*c349dbc7Sjsg kfree(generic);
63*c349dbc7Sjsg
64*c349dbc7Sjsg *ptr = NULL;
65*c349dbc7Sjsg }
66*c349dbc7Sjsg
set_config(struct hw_gpio_pin * ptr,const struct gpio_config_data * config_data)67*c349dbc7Sjsg static enum gpio_result set_config(
68*c349dbc7Sjsg struct hw_gpio_pin *ptr,
69*c349dbc7Sjsg const struct gpio_config_data *config_data)
70*c349dbc7Sjsg {
71*c349dbc7Sjsg struct hw_generic *generic = HW_GENERIC_FROM_BASE(ptr);
72*c349dbc7Sjsg
73*c349dbc7Sjsg if (!config_data)
74*c349dbc7Sjsg return GPIO_RESULT_INVALID_DATA;
75*c349dbc7Sjsg
76*c349dbc7Sjsg REG_UPDATE_2(mux,
77*c349dbc7Sjsg GENERIC_EN, config_data->config.generic_mux.enable_output_from_mux,
78*c349dbc7Sjsg GENERIC_SEL, config_data->config.generic_mux.mux_select);
79*c349dbc7Sjsg
80*c349dbc7Sjsg return GPIO_RESULT_OK;
81*c349dbc7Sjsg }
82*c349dbc7Sjsg
83*c349dbc7Sjsg static const struct hw_gpio_pin_funcs funcs = {
84*c349dbc7Sjsg .destroy = dal_hw_generic_destroy,
85*c349dbc7Sjsg .open = dal_hw_gpio_open,
86*c349dbc7Sjsg .get_value = dal_hw_gpio_get_value,
87*c349dbc7Sjsg .set_value = dal_hw_gpio_set_value,
88*c349dbc7Sjsg .set_config = set_config,
89*c349dbc7Sjsg .change_mode = dal_hw_gpio_change_mode,
90*c349dbc7Sjsg .close = dal_hw_gpio_close,
91*c349dbc7Sjsg };
92*c349dbc7Sjsg
dal_hw_generic_construct(struct hw_generic * pin,enum gpio_id id,uint32_t en,struct dc_context * ctx)93*c349dbc7Sjsg static void dal_hw_generic_construct(
94*c349dbc7Sjsg struct hw_generic *pin,
95*c349dbc7Sjsg enum gpio_id id,
96*c349dbc7Sjsg uint32_t en,
97*c349dbc7Sjsg struct dc_context *ctx)
98*c349dbc7Sjsg {
99*c349dbc7Sjsg dal_hw_gpio_construct(&pin->base, id, en, ctx);
100*c349dbc7Sjsg pin->base.base.funcs = &funcs;
101*c349dbc7Sjsg }
102*c349dbc7Sjsg
dal_hw_generic_init(struct hw_generic ** hw_generic,struct dc_context * ctx,enum gpio_id id,uint32_t en)103*c349dbc7Sjsg void dal_hw_generic_init(
104*c349dbc7Sjsg struct hw_generic **hw_generic,
105*c349dbc7Sjsg struct dc_context *ctx,
106*c349dbc7Sjsg enum gpio_id id,
107*c349dbc7Sjsg uint32_t en)
108*c349dbc7Sjsg {
109*c349dbc7Sjsg if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) {
110*c349dbc7Sjsg ASSERT_CRITICAL(false);
111*c349dbc7Sjsg *hw_generic = NULL;
112*c349dbc7Sjsg }
113*c349dbc7Sjsg
114*c349dbc7Sjsg *hw_generic = kzalloc(sizeof(struct hw_generic), GFP_KERNEL);
115*c349dbc7Sjsg if (!*hw_generic) {
116*c349dbc7Sjsg ASSERT_CRITICAL(false);
117*c349dbc7Sjsg return;
118*c349dbc7Sjsg }
119*c349dbc7Sjsg
120*c349dbc7Sjsg dal_hw_generic_construct(*hw_generic, id, en, ctx);
121*c349dbc7Sjsg }
122*c349dbc7Sjsg
123*c349dbc7Sjsg
dal_hw_generic_get_pin(struct gpio * gpio)124*c349dbc7Sjsg struct hw_gpio_pin *dal_hw_generic_get_pin(struct gpio *gpio)
125*c349dbc7Sjsg {
126*c349dbc7Sjsg struct hw_generic *hw_generic = dal_gpio_get_generic(gpio);
127*c349dbc7Sjsg
128*c349dbc7Sjsg return &hw_generic->base.base;
129*c349dbc7Sjsg }
130