xref: /openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/hw_ddc.h (revision c349dbc7938c71a30e13c1be4acc1976165f4630)
1fb4d8502Sjsg /*
2fb4d8502Sjsg  * Copyright 2012-15 Advanced Micro Devices, Inc.
3fb4d8502Sjsg  *
4fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
5fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
6fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
7fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
9fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
10fb4d8502Sjsg  *
11fb4d8502Sjsg  * The above copyright notice and this permission notice shall be included in
12fb4d8502Sjsg  * all copies or substantial portions of the Software.
13fb4d8502Sjsg  *
14fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15fb4d8502Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17fb4d8502Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18fb4d8502Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19fb4d8502Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20fb4d8502Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
21fb4d8502Sjsg  *
22fb4d8502Sjsg  * Authors: AMD
23fb4d8502Sjsg  *
24fb4d8502Sjsg  */
25fb4d8502Sjsg 
26fb4d8502Sjsg #ifndef __DAL_HW_DDC_H__
27fb4d8502Sjsg #define __DAL_HW_DDC_H__
28fb4d8502Sjsg 
29fb4d8502Sjsg #include "ddc_regs.h"
30fb4d8502Sjsg 
31fb4d8502Sjsg struct hw_ddc {
32fb4d8502Sjsg 	struct hw_gpio base;
33fb4d8502Sjsg 	const struct ddc_registers *regs;
34fb4d8502Sjsg 	const struct ddc_sh_mask *shifts;
35fb4d8502Sjsg 	const struct ddc_sh_mask *masks;
36fb4d8502Sjsg };
37fb4d8502Sjsg 
38fb4d8502Sjsg #define HW_DDC_FROM_BASE(hw_gpio) \
39fb4d8502Sjsg 	container_of((HW_GPIO_FROM_BASE(hw_gpio)), struct hw_ddc, base)
40fb4d8502Sjsg 
41*c349dbc7Sjsg void dal_hw_ddc_init(
42*c349dbc7Sjsg 	struct hw_ddc **hw_ddc,
43fb4d8502Sjsg 	struct dc_context *ctx,
44fb4d8502Sjsg 	enum gpio_id id,
45fb4d8502Sjsg 	uint32_t en);
46fb4d8502Sjsg 
47*c349dbc7Sjsg struct hw_gpio_pin *dal_hw_ddc_get_pin(struct gpio *gpio);
48*c349dbc7Sjsg 
49fb4d8502Sjsg #endif
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