1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Christian König <christian.koenig@amd.com> 29 */ 30 31 #include <linux/dma-fence-chain.h> 32 33 #include "amdgpu.h" 34 #include "amdgpu_trace.h" 35 #include "amdgpu_amdkfd.h" 36 37 struct amdgpu_sync_entry { 38 struct hlist_node node; 39 struct dma_fence *fence; 40 }; 41 42 static struct pool amdgpu_sync_slab; 43 44 /** 45 * amdgpu_sync_create - zero init sync object 46 * 47 * @sync: sync object to initialize 48 * 49 * Just clear the sync object for now. 50 */ 51 void amdgpu_sync_create(struct amdgpu_sync *sync) 52 { 53 hash_init(sync->fences); 54 sync->last_vm_update = NULL; 55 } 56 57 /** 58 * amdgpu_sync_same_dev - test if fence belong to us 59 * 60 * @adev: amdgpu device to use for the test 61 * @f: fence to test 62 * 63 * Test if the fence was issued by us. 64 */ 65 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, 66 struct dma_fence *f) 67 { 68 struct drm_sched_fence *s_fence = to_drm_sched_fence(f); 69 70 if (s_fence) { 71 struct amdgpu_ring *ring; 72 73 ring = container_of(s_fence->sched, struct amdgpu_ring, sched); 74 return ring->adev == adev; 75 } 76 77 return false; 78 } 79 80 /** 81 * amdgpu_sync_get_owner - extract the owner of a fence 82 * 83 * @f: fence get the owner from 84 * 85 * Extract who originally created the fence. 86 */ 87 static void *amdgpu_sync_get_owner(struct dma_fence *f) 88 { 89 struct drm_sched_fence *s_fence; 90 struct amdgpu_amdkfd_fence *kfd_fence; 91 92 if (!f) 93 return AMDGPU_FENCE_OWNER_UNDEFINED; 94 95 s_fence = to_drm_sched_fence(f); 96 if (s_fence) 97 return s_fence->owner; 98 99 kfd_fence = to_amdgpu_amdkfd_fence(f); 100 if (kfd_fence) 101 return AMDGPU_FENCE_OWNER_KFD; 102 103 return AMDGPU_FENCE_OWNER_UNDEFINED; 104 } 105 106 /** 107 * amdgpu_sync_keep_later - Keep the later fence 108 * 109 * @keep: existing fence to test 110 * @fence: new fence 111 * 112 * Either keep the existing fence or the new one, depending which one is later. 113 */ 114 static void amdgpu_sync_keep_later(struct dma_fence **keep, 115 struct dma_fence *fence) 116 { 117 if (*keep && dma_fence_is_later(*keep, fence)) 118 return; 119 120 dma_fence_put(*keep); 121 *keep = dma_fence_get(fence); 122 } 123 124 /** 125 * amdgpu_sync_add_later - add the fence to the hash 126 * 127 * @sync: sync object to add the fence to 128 * @f: fence to add 129 * 130 * Tries to add the fence to an existing hash entry. Returns true when an entry 131 * was found, false otherwise. 132 */ 133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f) 134 { 135 struct amdgpu_sync_entry *e; 136 137 hash_for_each_possible(sync->fences, e, node, f->context) { 138 if (unlikely(e->fence->context != f->context)) 139 continue; 140 141 amdgpu_sync_keep_later(&e->fence, f); 142 return true; 143 } 144 return false; 145 } 146 147 /** 148 * amdgpu_sync_fence - remember to sync to this fence 149 * 150 * @sync: sync object to add fence to 151 * @f: fence to sync to 152 * 153 * Add the fence to the sync object. 154 */ 155 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f) 156 { 157 struct amdgpu_sync_entry *e; 158 159 if (!f) 160 return 0; 161 162 if (amdgpu_sync_add_later(sync, f)) 163 return 0; 164 165 #ifdef __linux__ 166 e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL); 167 #else 168 e = pool_get(&amdgpu_sync_slab, PR_WAITOK); 169 #endif 170 if (!e) 171 return -ENOMEM; 172 173 hash_add(sync->fences, &e->node, f->context); 174 e->fence = dma_fence_get(f); 175 return 0; 176 } 177 178 /** 179 * amdgpu_sync_vm_fence - remember to sync to this VM fence 180 * 181 * @sync: sync object to add fence to 182 * @fence: the VM fence to add 183 * 184 * Add the fence to the sync object and remember it as VM update. 185 */ 186 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence) 187 { 188 if (!fence) 189 return 0; 190 191 amdgpu_sync_keep_later(&sync->last_vm_update, fence); 192 return amdgpu_sync_fence(sync, fence); 193 } 194 195 /* Determine based on the owner and mode if we should sync to a fence or not */ 196 static bool amdgpu_sync_test_fence(struct amdgpu_device *adev, 197 enum amdgpu_sync_mode mode, 198 void *owner, struct dma_fence *f) 199 { 200 void *fence_owner = amdgpu_sync_get_owner(f); 201 202 /* Always sync to moves, no matter what */ 203 if (fence_owner == AMDGPU_FENCE_OWNER_UNDEFINED) 204 return true; 205 206 /* We only want to trigger KFD eviction fences on 207 * evict or move jobs. Skip KFD fences otherwise. 208 */ 209 if (fence_owner == AMDGPU_FENCE_OWNER_KFD && 210 owner != AMDGPU_FENCE_OWNER_UNDEFINED) 211 return false; 212 213 /* Never sync to VM updates either. */ 214 if (fence_owner == AMDGPU_FENCE_OWNER_VM && 215 owner != AMDGPU_FENCE_OWNER_UNDEFINED) 216 return false; 217 218 /* Ignore fences depending on the sync mode */ 219 switch (mode) { 220 case AMDGPU_SYNC_ALWAYS: 221 return true; 222 223 case AMDGPU_SYNC_NE_OWNER: 224 if (amdgpu_sync_same_dev(adev, f) && 225 fence_owner == owner) 226 return false; 227 break; 228 229 case AMDGPU_SYNC_EQ_OWNER: 230 if (amdgpu_sync_same_dev(adev, f) && 231 fence_owner != owner) 232 return false; 233 break; 234 235 case AMDGPU_SYNC_EXPLICIT: 236 return false; 237 } 238 239 WARN(debug_evictions && fence_owner == AMDGPU_FENCE_OWNER_KFD, 240 "Adding eviction fence to sync obj"); 241 return true; 242 } 243 244 /** 245 * amdgpu_sync_resv - sync to a reservation object 246 * 247 * @adev: amdgpu device 248 * @sync: sync object to add fences from reservation object to 249 * @resv: reservation object with embedded fence 250 * @mode: how owner affects which fences we sync to 251 * @owner: owner of the planned job submission 252 * 253 * Sync to the fence 254 */ 255 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, 256 struct dma_resv *resv, enum amdgpu_sync_mode mode, 257 void *owner) 258 { 259 struct dma_resv_list *flist; 260 struct dma_fence *f; 261 unsigned i; 262 int r = 0; 263 264 if (resv == NULL) 265 return -EINVAL; 266 267 /* always sync to the exclusive fence */ 268 f = dma_resv_excl_fence(resv); 269 dma_fence_chain_for_each(f, f) { 270 struct dma_fence_chain *chain = to_dma_fence_chain(f); 271 272 if (amdgpu_sync_test_fence(adev, mode, owner, chain ? 273 chain->fence : f)) { 274 r = amdgpu_sync_fence(sync, f); 275 dma_fence_put(f); 276 if (r) 277 return r; 278 break; 279 } 280 } 281 282 flist = dma_resv_shared_list(resv); 283 if (!flist) 284 return 0; 285 286 for (i = 0; i < flist->shared_count; ++i) { 287 f = rcu_dereference_protected(flist->shared[i], 288 dma_resv_held(resv)); 289 290 if (amdgpu_sync_test_fence(adev, mode, owner, f)) { 291 r = amdgpu_sync_fence(sync, f); 292 if (r) 293 return r; 294 } 295 } 296 return 0; 297 } 298 299 /** 300 * amdgpu_sync_peek_fence - get the next fence not signaled yet 301 * 302 * @sync: the sync object 303 * @ring: optional ring to use for test 304 * 305 * Returns the next fence not signaled yet without removing it from the sync 306 * object. 307 */ 308 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, 309 struct amdgpu_ring *ring) 310 { 311 struct amdgpu_sync_entry *e; 312 struct hlist_node *tmp; 313 int i; 314 315 hash_for_each_safe(sync->fences, i, tmp, e, node) { 316 struct dma_fence *f = e->fence; 317 struct drm_sched_fence *s_fence = to_drm_sched_fence(f); 318 319 if (dma_fence_is_signaled(f)) { 320 hash_del(&e->node); 321 dma_fence_put(f); 322 #ifdef __linux__ 323 kmem_cache_free(amdgpu_sync_slab, e); 324 #else 325 pool_put(&amdgpu_sync_slab, e); 326 #endif 327 continue; 328 } 329 if (ring && s_fence) { 330 /* For fences from the same ring it is sufficient 331 * when they are scheduled. 332 */ 333 if (s_fence->sched == &ring->sched) { 334 if (dma_fence_is_signaled(&s_fence->scheduled)) 335 continue; 336 337 return &s_fence->scheduled; 338 } 339 } 340 341 return f; 342 } 343 344 return NULL; 345 } 346 347 /** 348 * amdgpu_sync_get_fence - get the next fence from the sync object 349 * 350 * @sync: sync object to use 351 * 352 * Get and removes the next fence from the sync object not signaled yet. 353 */ 354 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync) 355 { 356 struct amdgpu_sync_entry *e; 357 struct hlist_node *tmp; 358 struct dma_fence *f; 359 int i; 360 hash_for_each_safe(sync->fences, i, tmp, e, node) { 361 362 f = e->fence; 363 364 hash_del(&e->node); 365 #ifdef __linux__ 366 kmem_cache_free(amdgpu_sync_slab, e); 367 #else 368 pool_put(&amdgpu_sync_slab, e); 369 #endif 370 371 if (!dma_fence_is_signaled(f)) 372 return f; 373 374 dma_fence_put(f); 375 } 376 return NULL; 377 } 378 379 /** 380 * amdgpu_sync_clone - clone a sync object 381 * 382 * @source: sync object to clone 383 * @clone: pointer to destination sync object 384 * 385 * Adds references to all unsignaled fences in @source to @clone. Also 386 * removes signaled fences from @source while at it. 387 */ 388 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone) 389 { 390 struct amdgpu_sync_entry *e; 391 struct hlist_node *tmp; 392 struct dma_fence *f; 393 int i, r; 394 395 hash_for_each_safe(source->fences, i, tmp, e, node) { 396 f = e->fence; 397 if (!dma_fence_is_signaled(f)) { 398 r = amdgpu_sync_fence(clone, f); 399 if (r) 400 return r; 401 } else { 402 hash_del(&e->node); 403 dma_fence_put(f); 404 #ifdef __linux__ 405 kmem_cache_free(amdgpu_sync_slab, e); 406 #else 407 pool_put(&amdgpu_sync_slab, e); 408 #endif 409 } 410 } 411 412 dma_fence_put(clone->last_vm_update); 413 clone->last_vm_update = dma_fence_get(source->last_vm_update); 414 415 return 0; 416 } 417 418 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr) 419 { 420 struct amdgpu_sync_entry *e; 421 struct hlist_node *tmp; 422 int i, r; 423 424 hash_for_each_safe(sync->fences, i, tmp, e, node) { 425 r = dma_fence_wait(e->fence, intr); 426 if (r) 427 return r; 428 429 hash_del(&e->node); 430 dma_fence_put(e->fence); 431 #ifdef __linux__ 432 kmem_cache_free(amdgpu_sync_slab, e); 433 #else 434 pool_put(&amdgpu_sync_slab, e); 435 #endif 436 } 437 438 return 0; 439 } 440 441 /** 442 * amdgpu_sync_free - free the sync object 443 * 444 * @sync: sync object to use 445 * 446 * Free the sync object. 447 */ 448 void amdgpu_sync_free(struct amdgpu_sync *sync) 449 { 450 struct amdgpu_sync_entry *e; 451 struct hlist_node *tmp; 452 unsigned i; 453 454 hash_for_each_safe(sync->fences, i, tmp, e, node) { 455 hash_del(&e->node); 456 dma_fence_put(e->fence); 457 #ifdef __linux__ 458 kmem_cache_free(amdgpu_sync_slab, e); 459 #else 460 pool_put(&amdgpu_sync_slab, e); 461 #endif 462 } 463 464 dma_fence_put(sync->last_vm_update); 465 } 466 467 /** 468 * amdgpu_sync_init - init sync object subsystem 469 * 470 * Allocate the slab allocator. 471 */ 472 int amdgpu_sync_init(void) 473 { 474 #ifdef __linux__ 475 amdgpu_sync_slab = kmem_cache_create( 476 "amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0, 477 SLAB_HWCACHE_ALIGN, NULL); 478 if (!amdgpu_sync_slab) 479 return -ENOMEM; 480 #else 481 pool_init(&amdgpu_sync_slab, sizeof(struct amdgpu_sync_entry), 482 CACHELINESIZE, IPL_TTY, 0, "amdgpu_sync", NULL); 483 #endif 484 485 return 0; 486 } 487 488 /** 489 * amdgpu_sync_fini - fini sync object subsystem 490 * 491 * Free the slab allocator. 492 */ 493 void amdgpu_sync_fini(void) 494 { 495 #ifdef __linux__ 496 kmem_cache_destroy(amdgpu_sync_slab); 497 #else 498 pool_destroy(&amdgpu_sync_slab); 499 #endif 500 } 501