1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright 2014 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: 29 * Christian König <christian.koenig@amd.com> 30 */ 31 32 #include <linux/dma-fence-chain.h> 33 34 #include "amdgpu.h" 35 #include "amdgpu_trace.h" 36 #include "amdgpu_amdkfd.h" 37 38 struct amdgpu_sync_entry { 39 struct hlist_node node; 40 struct dma_fence *fence; 41 }; 42 43 static struct pool amdgpu_sync_slab; 44 45 /** 46 * amdgpu_sync_create - zero init sync object 47 * 48 * @sync: sync object to initialize 49 * 50 * Just clear the sync object for now. 51 */ 52 void amdgpu_sync_create(struct amdgpu_sync *sync) 53 { 54 hash_init(sync->fences); 55 } 56 57 /** 58 * amdgpu_sync_same_dev - test if fence belong to us 59 * 60 * @adev: amdgpu device to use for the test 61 * @f: fence to test 62 * 63 * Test if the fence was issued by us. 64 */ 65 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, 66 struct dma_fence *f) 67 { 68 struct drm_sched_fence *s_fence = to_drm_sched_fence(f); 69 70 if (s_fence) { 71 struct amdgpu_ring *ring; 72 73 ring = container_of(s_fence->sched, struct amdgpu_ring, sched); 74 return ring->adev == adev; 75 } 76 77 return false; 78 } 79 80 /** 81 * amdgpu_sync_get_owner - extract the owner of a fence 82 * 83 * @f: fence get the owner from 84 * 85 * Extract who originally created the fence. 86 */ 87 static void *amdgpu_sync_get_owner(struct dma_fence *f) 88 { 89 struct drm_sched_fence *s_fence; 90 struct amdgpu_amdkfd_fence *kfd_fence; 91 92 if (!f) 93 return AMDGPU_FENCE_OWNER_UNDEFINED; 94 95 s_fence = to_drm_sched_fence(f); 96 if (s_fence) 97 return s_fence->owner; 98 99 kfd_fence = to_amdgpu_amdkfd_fence(f); 100 if (kfd_fence) 101 return AMDGPU_FENCE_OWNER_KFD; 102 103 return AMDGPU_FENCE_OWNER_UNDEFINED; 104 } 105 106 /** 107 * amdgpu_sync_keep_later - Keep the later fence 108 * 109 * @keep: existing fence to test 110 * @fence: new fence 111 * 112 * Either keep the existing fence or the new one, depending which one is later. 113 */ 114 static void amdgpu_sync_keep_later(struct dma_fence **keep, 115 struct dma_fence *fence) 116 { 117 if (*keep && dma_fence_is_later(*keep, fence)) 118 return; 119 120 dma_fence_put(*keep); 121 *keep = dma_fence_get(fence); 122 } 123 124 /** 125 * amdgpu_sync_add_later - add the fence to the hash 126 * 127 * @sync: sync object to add the fence to 128 * @f: fence to add 129 * 130 * Tries to add the fence to an existing hash entry. Returns true when an entry 131 * was found, false otherwise. 132 */ 133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f) 134 { 135 struct amdgpu_sync_entry *e; 136 137 hash_for_each_possible(sync->fences, e, node, f->context) { 138 if (unlikely(e->fence->context != f->context)) 139 continue; 140 141 amdgpu_sync_keep_later(&e->fence, f); 142 return true; 143 } 144 return false; 145 } 146 147 /** 148 * amdgpu_sync_fence - remember to sync to this fence 149 * 150 * @sync: sync object to add fence to 151 * @f: fence to sync to 152 * 153 * Add the fence to the sync object. 154 */ 155 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f) 156 { 157 struct amdgpu_sync_entry *e; 158 159 if (!f) 160 return 0; 161 162 if (amdgpu_sync_add_later(sync, f)) 163 return 0; 164 165 #ifdef __linux__ 166 e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL); 167 #else 168 e = pool_get(&amdgpu_sync_slab, PR_WAITOK); 169 #endif 170 if (!e) 171 return -ENOMEM; 172 173 hash_add(sync->fences, &e->node, f->context); 174 e->fence = dma_fence_get(f); 175 return 0; 176 } 177 178 /* Determine based on the owner and mode if we should sync to a fence or not */ 179 static bool amdgpu_sync_test_fence(struct amdgpu_device *adev, 180 enum amdgpu_sync_mode mode, 181 void *owner, struct dma_fence *f) 182 { 183 void *fence_owner = amdgpu_sync_get_owner(f); 184 185 /* Always sync to moves, no matter what */ 186 if (fence_owner == AMDGPU_FENCE_OWNER_UNDEFINED) 187 return true; 188 189 /* We only want to trigger KFD eviction fences on 190 * evict or move jobs. Skip KFD fences otherwise. 191 */ 192 if (fence_owner == AMDGPU_FENCE_OWNER_KFD && 193 owner != AMDGPU_FENCE_OWNER_UNDEFINED) 194 return false; 195 196 /* Never sync to VM updates either. */ 197 if (fence_owner == AMDGPU_FENCE_OWNER_VM && 198 owner != AMDGPU_FENCE_OWNER_UNDEFINED) 199 return false; 200 201 /* Ignore fences depending on the sync mode */ 202 switch (mode) { 203 case AMDGPU_SYNC_ALWAYS: 204 return true; 205 206 case AMDGPU_SYNC_NE_OWNER: 207 if (amdgpu_sync_same_dev(adev, f) && 208 fence_owner == owner) 209 return false; 210 break; 211 212 case AMDGPU_SYNC_EQ_OWNER: 213 if (amdgpu_sync_same_dev(adev, f) && 214 fence_owner != owner) 215 return false; 216 break; 217 218 case AMDGPU_SYNC_EXPLICIT: 219 return false; 220 } 221 222 WARN(debug_evictions && fence_owner == AMDGPU_FENCE_OWNER_KFD, 223 "Adding eviction fence to sync obj"); 224 return true; 225 } 226 227 /** 228 * amdgpu_sync_resv - sync to a reservation object 229 * 230 * @adev: amdgpu device 231 * @sync: sync object to add fences from reservation object to 232 * @resv: reservation object with embedded fence 233 * @mode: how owner affects which fences we sync to 234 * @owner: owner of the planned job submission 235 * 236 * Sync to the fence 237 */ 238 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, 239 struct dma_resv *resv, enum amdgpu_sync_mode mode, 240 void *owner) 241 { 242 struct dma_resv_iter cursor; 243 struct dma_fence *f; 244 int r; 245 246 if (resv == NULL) 247 return -EINVAL; 248 249 /* TODO: Use DMA_RESV_USAGE_READ here */ 250 dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, f) { 251 dma_fence_chain_for_each(f, f) { 252 struct dma_fence *tmp = dma_fence_chain_contained(f); 253 254 if (amdgpu_sync_test_fence(adev, mode, owner, tmp)) { 255 r = amdgpu_sync_fence(sync, f); 256 dma_fence_put(f); 257 if (r) 258 return r; 259 break; 260 } 261 } 262 } 263 return 0; 264 } 265 266 /** 267 * amdgpu_sync_peek_fence - get the next fence not signaled yet 268 * 269 * @sync: the sync object 270 * @ring: optional ring to use for test 271 * 272 * Returns the next fence not signaled yet without removing it from the sync 273 * object. 274 */ 275 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, 276 struct amdgpu_ring *ring) 277 { 278 struct amdgpu_sync_entry *e; 279 struct hlist_node *tmp; 280 int i; 281 282 hash_for_each_safe(sync->fences, i, tmp, e, node) { 283 struct dma_fence *f = e->fence; 284 struct drm_sched_fence *s_fence = to_drm_sched_fence(f); 285 286 if (dma_fence_is_signaled(f)) { 287 hash_del(&e->node); 288 dma_fence_put(f); 289 #ifdef __linux__ 290 kmem_cache_free(amdgpu_sync_slab, e); 291 #else 292 pool_put(&amdgpu_sync_slab, e); 293 #endif 294 continue; 295 } 296 if (ring && s_fence) { 297 /* For fences from the same ring it is sufficient 298 * when they are scheduled. 299 */ 300 if (s_fence->sched == &ring->sched) { 301 if (dma_fence_is_signaled(&s_fence->scheduled)) 302 continue; 303 304 return &s_fence->scheduled; 305 } 306 } 307 308 return f; 309 } 310 311 return NULL; 312 } 313 314 /** 315 * amdgpu_sync_get_fence - get the next fence from the sync object 316 * 317 * @sync: sync object to use 318 * 319 * Get and removes the next fence from the sync object not signaled yet. 320 */ 321 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync) 322 { 323 struct amdgpu_sync_entry *e; 324 struct hlist_node *tmp; 325 struct dma_fence *f; 326 int i; 327 328 hash_for_each_safe(sync->fences, i, tmp, e, node) { 329 330 f = e->fence; 331 332 hash_del(&e->node); 333 #ifdef __linux__ 334 kmem_cache_free(amdgpu_sync_slab, e); 335 #else 336 pool_put(&amdgpu_sync_slab, e); 337 #endif 338 339 if (!dma_fence_is_signaled(f)) 340 return f; 341 342 dma_fence_put(f); 343 } 344 return NULL; 345 } 346 347 /** 348 * amdgpu_sync_clone - clone a sync object 349 * 350 * @source: sync object to clone 351 * @clone: pointer to destination sync object 352 * 353 * Adds references to all unsignaled fences in @source to @clone. Also 354 * removes signaled fences from @source while at it. 355 */ 356 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone) 357 { 358 struct amdgpu_sync_entry *e; 359 struct hlist_node *tmp; 360 struct dma_fence *f; 361 int i, r; 362 363 hash_for_each_safe(source->fences, i, tmp, e, node) { 364 f = e->fence; 365 if (!dma_fence_is_signaled(f)) { 366 r = amdgpu_sync_fence(clone, f); 367 if (r) 368 return r; 369 } else { 370 hash_del(&e->node); 371 dma_fence_put(f); 372 #ifdef __linux__ 373 kmem_cache_free(amdgpu_sync_slab, e); 374 #else 375 pool_put(&amdgpu_sync_slab, e); 376 #endif 377 } 378 } 379 380 return 0; 381 } 382 383 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr) 384 { 385 struct amdgpu_sync_entry *e; 386 struct hlist_node *tmp; 387 int i, r; 388 389 hash_for_each_safe(sync->fences, i, tmp, e, node) { 390 r = dma_fence_wait(e->fence, intr); 391 if (r) 392 return r; 393 394 hash_del(&e->node); 395 dma_fence_put(e->fence); 396 #ifdef __linux__ 397 kmem_cache_free(amdgpu_sync_slab, e); 398 #else 399 pool_put(&amdgpu_sync_slab, e); 400 #endif 401 } 402 403 return 0; 404 } 405 406 /** 407 * amdgpu_sync_free - free the sync object 408 * 409 * @sync: sync object to use 410 * 411 * Free the sync object. 412 */ 413 void amdgpu_sync_free(struct amdgpu_sync *sync) 414 { 415 struct amdgpu_sync_entry *e; 416 struct hlist_node *tmp; 417 unsigned int i; 418 419 hash_for_each_safe(sync->fences, i, tmp, e, node) { 420 hash_del(&e->node); 421 dma_fence_put(e->fence); 422 #ifdef __linux__ 423 kmem_cache_free(amdgpu_sync_slab, e); 424 #else 425 pool_put(&amdgpu_sync_slab, e); 426 #endif 427 } 428 } 429 430 /** 431 * amdgpu_sync_init - init sync object subsystem 432 * 433 * Allocate the slab allocator. 434 */ 435 int amdgpu_sync_init(void) 436 { 437 #ifdef __linux__ 438 amdgpu_sync_slab = kmem_cache_create( 439 "amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0, 440 SLAB_HWCACHE_ALIGN, NULL); 441 if (!amdgpu_sync_slab) 442 return -ENOMEM; 443 #else 444 pool_init(&amdgpu_sync_slab, sizeof(struct amdgpu_sync_entry), 445 CACHELINESIZE, IPL_TTY, 0, "amdgpu_sync", NULL); 446 #endif 447 448 return 0; 449 } 450 451 /** 452 * amdgpu_sync_fini - fini sync object subsystem 453 * 454 * Free the slab allocator. 455 */ 456 void amdgpu_sync_fini(void) 457 { 458 #ifdef __linux__ 459 kmem_cache_destroy(amdgpu_sync_slab); 460 #else 461 pool_destroy(&amdgpu_sync_slab); 462 #endif 463 } 464