1 /* $OpenBSD: cy82c693.c,v 1.6 2008/06/26 05:42:17 ray Exp $ */ 2 /* $NetBSD: cy82c693.c,v 1.1 2000/06/06 03:07:39 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Common routines to read/write control registers on the Cypress 82c693 35 * hyperCache(tm) Stand-Alone PCI Peripheral Controller with USB. 36 */ 37 38 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 39 40 #include <sys/param.h> 41 #include <sys/device.h> 42 #include <sys/systm.h> 43 #include <sys/lock.h> 44 45 #include <machine/bus.h> 46 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <dev/pci/cy82c693reg.h> 51 #include <dev/pci/cy82c693var.h> 52 53 static struct cy82c693_handle cyhc_handle; 54 static int cyhc_initialized; 55 56 struct simplelock cyhc_slock; 57 58 #define CYHC_LOCK(s) \ 59 do { \ 60 s = splhigh(); \ 61 simple_lock(&cyhc_slock); \ 62 } while (0) 63 64 #define CYHC_UNLOCK(s) \ 65 do { \ 66 simple_unlock(&cyhc_slock); \ 67 splx(s); \ 68 } while (0) 69 70 const struct cy82c693_handle * 71 cy82c693_init(bus_space_tag_t iot) 72 { 73 bus_space_handle_t ioh; 74 int s; 75 int error; 76 77 simple_lock_init(&cyhc_slock); 78 79 CYHC_LOCK(s); 80 81 if (cyhc_initialized) { 82 CYHC_UNLOCK(s); 83 if (iot != cyhc_handle.cyhc_iot) 84 panic("cy82c693_init"); 85 return (&cyhc_handle); 86 } 87 88 if ((error = bus_space_map(iot, CYHC_CONFIG_ADDR, 2, 0, &ioh)) != 0) { 89 CYHC_UNLOCK(s); 90 printf("cy82c693_init: bus_space_map failed (%d)", error); 91 return (NULL); 92 } 93 94 cyhc_handle.cyhc_iot = iot; 95 cyhc_handle.cyhc_ioh = ioh; 96 97 cyhc_initialized = 1; 98 99 CYHC_UNLOCK(s); 100 101 return (&cyhc_handle); 102 } 103 104 u_int8_t 105 cy82c693_read(const struct cy82c693_handle *cyhc, int reg) 106 { 107 int s; 108 u_int8_t rv; 109 110 CYHC_LOCK(s); 111 112 if (cyhc_initialized == 0) { 113 CYHC_UNLOCK(s); 114 panic("cy82c693_read"); 115 } 116 117 bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 0, reg); 118 rv = bus_space_read_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 1); 119 120 CYHC_UNLOCK(s); 121 122 return (rv); 123 } 124 125 void 126 cy82c693_write(const struct cy82c693_handle *cyhc, int reg, u_int8_t val) 127 { 128 int s; 129 130 CYHC_LOCK(s); 131 132 if (cyhc_initialized == 0) { 133 CYHC_UNLOCK(s); 134 panic("cy82c693_write"); 135 } 136 137 bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 0, reg); 138 bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 1, val); 139 140 CYHC_UNLOCK(s); 141 } 142