xref: /openbsd-src/sys/dev/pci/ciss_pci.c (revision a28daedfc357b214be5c701aa8ba8adb29a7f1c2)
1 /*	$OpenBSD: ciss_pci.c,v 1.13 2008/11/17 06:56:56 brad Exp $	*/
2 
3 /*
4  * Copyright (c) 2005 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16  * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17  * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include <sys/param.h>
21 #include <sys/systm.h>
22 #include <sys/kernel.h>
23 #include <sys/malloc.h>
24 #include <sys/device.h>
25 
26 #include <dev/pci/pcidevs.h>
27 #include <dev/pci/pcivar.h>
28 
29 #include <machine/bus.h>
30 
31 #include <scsi/scsi_all.h>
32 #include <scsi/scsi_disk.h>
33 #include <scsi/scsiconf.h>
34 
35 #include <dev/ic/cissreg.h>
36 #include <dev/ic/cissvar.h>
37 
38 #define	CISS_BAR	0x10
39 
40 int	ciss_pci_match(struct device *, void *, void *);
41 void	ciss_pci_attach(struct device *, struct device *, void *);
42 
43 struct cfattach ciss_pci_ca = {
44 	sizeof(struct ciss_softc), ciss_pci_match, ciss_pci_attach
45 };
46 
47 const struct pci_matchid ciss_pci_devices[] = {
48 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA532 },
49 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5300 },
50 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5300_2 },
51 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5312 },
52 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5i },
53 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5i_2 },
54 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6i },
55 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA641 },
56 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA642 },
57 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6400 },
58 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6400EM },
59 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6422 },
60 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA64XX },
61 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200 },
62 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_1 },
63 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_2 },
64 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_3 },
65 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE500 },
66 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP212 },
67 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP410 },
68 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP410I },
69 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP411 },
70 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP600 },
71 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP711M },
72 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP712M },
73 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP800 },
74 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP812 },
75 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAV100 },
76 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_1 },
77 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_2 },
78 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_3 },
79 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_4 },
80 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_5 },
81 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_6 },
82 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_7 },
83 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_8 },
84 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_9 },
85 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_10 },
86 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_11 },
87 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_12 }
88 };
89 #define	CISS_PCI_NDEVS	sizeof(ciss_pci_devices)/sizeof(ciss_pci_devices[0])
90 
91 int
92 ciss_pci_match(struct device *parent, void *match, void *aux)
93 {
94 	struct pci_attach_args *pa = aux;
95 
96 	return pci_matchbyid(pa, ciss_pci_devices, CISS_PCI_NDEVS);
97 }
98 
99 void
100 ciss_pci_attach(struct device *parent, struct device *self, void *aux)
101 {
102 	struct ciss_softc *sc = (struct ciss_softc *)self;
103 	struct pci_attach_args *pa = aux;
104 	bus_size_t size, cfgsz;
105 	pci_intr_handle_t ih;
106 	const char *intrstr;
107 	int cfg_bar, memtype;
108 	pcireg_t reg;
109 
110 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, CISS_BAR);
111 	if (pci_mapreg_map(pa, CISS_BAR, memtype, 0,
112 	    &sc->iot, &sc->ioh, NULL, &size, 0)) {
113 		printf(": can't map controller mem space\n");
114 		return;
115 	}
116 	sc->dmat = pa->pa_dmat;
117 
118 	sc->iem = CISS_READYENA;
119 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
120 	if (PCI_VENDOR(reg) == PCI_VENDOR_COMPAQ &&
121 	    (PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5i ||
122 	     PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA532 ||
123 	     PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5312))
124 		sc->iem = CISS_READYENAB;
125 
126 	cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR);
127 	sc->cfgoff = bus_space_read_4(sc->iot, sc->ioh, CISS_CFG_OFF);
128 	if (cfg_bar != CISS_BAR) {
129 		if (pci_mapreg_map(pa, cfg_bar, PCI_MAPREG_TYPE_MEM, 0,
130 		    NULL, &sc->cfg_ioh, NULL, &cfgsz, 0)) {
131 			printf(": can't map controller config space\n");
132 			bus_space_unmap(sc->iot, sc->ioh, size);
133 			return;
134 		}
135 	} else {
136 		sc->cfg_ioh = sc->ioh;
137 		cfgsz = size;
138 	}
139 
140 	if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) {
141 		printf(": unfit config space\n");
142 		bus_space_unmap(sc->iot, sc->ioh, size);
143 		if (cfg_bar != CISS_BAR)
144 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
145 		return;
146 	}
147 
148 	/* disable interrupts until ready */
149 	bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
150 	    bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem);
151 
152 	if (pci_intr_map(pa, &ih)) {
153 		printf(": can't map interrupt\n");
154 		bus_space_unmap(sc->iot, sc->ioh, size);
155 		if (cfg_bar != CISS_BAR)
156 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
157 		return;
158 	}
159 	intrstr = pci_intr_string(pa->pa_pc, ih);
160 	sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc,
161 	    sc->sc_dev.dv_xname);
162 	if (!sc->sc_ih) {
163 		printf(": can't establish interrupt");
164 		if (intrstr)
165 			printf(" at %s", intrstr);
166 		printf("\n");
167 		bus_space_unmap(sc->iot, sc->ioh, size);
168 		if (cfg_bar != CISS_BAR)
169 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
170 	}
171 
172 	printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname);
173 
174 	if (ciss_attach(sc)) {
175 		pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
176 		sc->sc_ih = NULL;
177 		bus_space_unmap(sc->iot, sc->ioh, size);
178 		if (cfg_bar != CISS_BAR)
179 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
180 		return;
181 	}
182 
183 	/* enable interrupts now */
184 	bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
185 	    bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem);
186 }
187