xref: /openbsd-src/sys/dev/pci/ciss_pci.c (revision 50b7afb2c2c0993b0894d4e34bf857cb13ed9c80)
1 /*	$OpenBSD: ciss_pci.c,v 1.18 2013/08/25 02:15:10 jsg Exp $	*/
2 
3 /*
4  * Copyright (c) 2005 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16  * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17  * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include <sys/param.h>
21 #include <sys/systm.h>
22 #include <sys/kernel.h>
23 #include <sys/malloc.h>
24 #include <sys/device.h>
25 
26 #include <dev/pci/pcidevs.h>
27 #include <dev/pci/pcivar.h>
28 
29 #include <machine/bus.h>
30 
31 #include <scsi/scsi_all.h>
32 #include <scsi/scsi_disk.h>
33 #include <scsi/scsiconf.h>
34 
35 #include <dev/ic/cissreg.h>
36 #include <dev/ic/cissvar.h>
37 
38 #define	CISS_BAR	0x10
39 
40 int	ciss_pci_match(struct device *, void *, void *);
41 void	ciss_pci_attach(struct device *, struct device *, void *);
42 int	ciss_activate(struct device *, int);
43 
44 struct cfattach ciss_pci_ca = {
45 	sizeof(struct ciss_softc), ciss_pci_match, ciss_pci_attach,
46 	NULL, ciss_activate
47 };
48 
49 const struct pci_matchid ciss_pci_devices[] = {
50 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA532 },
51 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5300 },
52 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5300_2 },
53 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5312 },
54 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5i },
55 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA5i_2 },
56 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6i },
57 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA641 },
58 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA642 },
59 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6400 },
60 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6400EM },
61 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA6422 },
62 	{ PCI_VENDOR_COMPAQ,	PCI_PRODUCT_COMPAQ_CSA64XX },
63 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200 },
64 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_1 },
65 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_2 },
66 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_3 },
67 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE200I_4 },
68 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE500_1 },
69 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAE500_2 },
70 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP212 },
71 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP220I },
72 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP222 },
73 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP230I },
74 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP410 },
75 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP410I },
76 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP411 },
77 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP420 },
78 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP420I },
79 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP421 },
80 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP430 },
81 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP430I },
82 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP431 },
83 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP530 },
84 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP531 },
85 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP600 },
86 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP700M },
87 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP711M },
88 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP712M },
89 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP721M },
90 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP731M },
91 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP800 },
92 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP812 },
93 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP822 },
94 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP830 },
95 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAP830I },
96 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSAV100 },
97 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_1 },
98 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_2 },
99 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_3 },
100 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_4 },
101 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_5 },
102 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_6 },
103 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_7 },
104 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_8 },
105 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_9 },
106 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_10 },
107 	{ PCI_VENDOR_HP,	PCI_PRODUCT_HP_HPSA_11 }
108 };
109 
110 int
111 ciss_pci_match(struct device *parent, void *match, void *aux)
112 {
113 	struct pci_attach_args *pa = aux;
114 
115 	return pci_matchbyid(pa, ciss_pci_devices, nitems(ciss_pci_devices));
116 }
117 
118 void
119 ciss_pci_attach(struct device *parent, struct device *self, void *aux)
120 {
121 	struct ciss_softc *sc = (struct ciss_softc *)self;
122 	struct pci_attach_args *pa = aux;
123 	bus_size_t size, cfgsz;
124 	pci_intr_handle_t ih;
125 	const char *intrstr;
126 	int cfg_bar, memtype;
127 	pcireg_t reg;
128 
129 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, CISS_BAR);
130 	if (pci_mapreg_map(pa, CISS_BAR, memtype, 0,
131 	    &sc->iot, &sc->ioh, NULL, &size, 0)) {
132 		printf(": can't map controller mem space\n");
133 		return;
134 	}
135 	sc->dmat = pa->pa_dmat;
136 
137 	sc->iem = CISS_READYENA;
138 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
139 	if (PCI_VENDOR(reg) == PCI_VENDOR_COMPAQ &&
140 	    (PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5i ||
141 	     PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA532 ||
142 	     PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5312))
143 		sc->iem = CISS_READYENAB;
144 
145 	cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR);
146 	sc->cfgoff = bus_space_read_4(sc->iot, sc->ioh, CISS_CFG_OFF);
147 	if (cfg_bar != CISS_BAR) {
148 		if (pci_mapreg_map(pa, cfg_bar, PCI_MAPREG_TYPE_MEM, 0,
149 		    NULL, &sc->cfg_ioh, NULL, &cfgsz, 0)) {
150 			printf(": can't map controller config space\n");
151 			bus_space_unmap(sc->iot, sc->ioh, size);
152 			return;
153 		}
154 	} else {
155 		sc->cfg_ioh = sc->ioh;
156 		cfgsz = size;
157 	}
158 
159 	if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) {
160 		printf(": unfit config space\n");
161 		bus_space_unmap(sc->iot, sc->ioh, size);
162 		if (cfg_bar != CISS_BAR)
163 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
164 		return;
165 	}
166 
167 	/* disable interrupts until ready */
168 	bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
169 	    bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem);
170 
171 	if (pci_intr_map(pa, &ih)) {
172 		printf(": can't map interrupt\n");
173 		bus_space_unmap(sc->iot, sc->ioh, size);
174 		if (cfg_bar != CISS_BAR)
175 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
176 		return;
177 	}
178 	intrstr = pci_intr_string(pa->pa_pc, ih);
179 	sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc,
180 	    sc->sc_dev.dv_xname);
181 	if (!sc->sc_ih) {
182 		printf(": can't establish interrupt");
183 		if (intrstr)
184 			printf(" at %s", intrstr);
185 		printf("\n");
186 		bus_space_unmap(sc->iot, sc->ioh, size);
187 		if (cfg_bar != CISS_BAR)
188 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
189 	}
190 
191 	printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname);
192 
193 	if (ciss_attach(sc)) {
194 		pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
195 		sc->sc_ih = NULL;
196 		bus_space_unmap(sc->iot, sc->ioh, size);
197 		if (cfg_bar != CISS_BAR)
198 			bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
199 		return;
200 	}
201 
202 	/* enable interrupts now */
203 	bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
204 	    bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem);
205 }
206 
207 int
208 ciss_activate(struct device *self, int act)
209 {
210 	int ret = 0;
211 
212 	ret = config_activate_children(self, act);
213 
214 	switch (act) {
215 	case DVACT_POWERDOWN:
216 		ciss_shutdown(self);
217 		break;
218 	}
219 
220 	return (ret);
221 }
222