1 /* $OpenBSD: ciss_pci.c,v 1.16 2012/03/11 13:33:06 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN 16 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT 17 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/param.h> 21 #include <sys/systm.h> 22 #include <sys/kernel.h> 23 #include <sys/malloc.h> 24 #include <sys/device.h> 25 26 #include <dev/pci/pcidevs.h> 27 #include <dev/pci/pcivar.h> 28 29 #include <machine/bus.h> 30 31 #include <scsi/scsi_all.h> 32 #include <scsi/scsi_disk.h> 33 #include <scsi/scsiconf.h> 34 35 #include <dev/ic/cissreg.h> 36 #include <dev/ic/cissvar.h> 37 38 #define CISS_BAR 0x10 39 40 int ciss_pci_match(struct device *, void *, void *); 41 void ciss_pci_attach(struct device *, struct device *, void *); 42 43 struct cfattach ciss_pci_ca = { 44 sizeof(struct ciss_softc), ciss_pci_match, ciss_pci_attach 45 }; 46 47 const struct pci_matchid ciss_pci_devices[] = { 48 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA532 }, 49 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300 }, 50 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300_2 }, 51 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5312 }, 52 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5i }, 53 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5i_2 }, 54 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6i }, 55 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA641 }, 56 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA642 }, 57 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400 }, 58 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400EM }, 59 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6422 }, 60 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA64XX }, 61 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200 }, 62 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_1 }, 63 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_2 }, 64 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_3 }, 65 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_4 }, 66 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE500_1 }, 67 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE500_2 }, 68 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP212 }, 69 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP220I }, 70 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP222 }, 71 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP410 }, 72 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP410I }, 73 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP411 }, 74 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP420 }, 75 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP420I }, 76 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP421 }, 77 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP600 }, 78 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP700M }, 79 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP711M }, 80 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP712M }, 81 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP721M }, 82 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP800 }, 83 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP812 }, 84 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP822 }, 85 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAV100 }, 86 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_1 }, 87 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_2 }, 88 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_3 }, 89 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_4 }, 90 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_5 }, 91 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_6 }, 92 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_7 }, 93 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_8 }, 94 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_9 }, 95 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_10 }, 96 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_11 } 97 }; 98 99 int 100 ciss_pci_match(struct device *parent, void *match, void *aux) 101 { 102 struct pci_attach_args *pa = aux; 103 104 return pci_matchbyid(pa, ciss_pci_devices, nitems(ciss_pci_devices)); 105 } 106 107 void 108 ciss_pci_attach(struct device *parent, struct device *self, void *aux) 109 { 110 struct ciss_softc *sc = (struct ciss_softc *)self; 111 struct pci_attach_args *pa = aux; 112 bus_size_t size, cfgsz; 113 pci_intr_handle_t ih; 114 const char *intrstr; 115 int cfg_bar, memtype; 116 pcireg_t reg; 117 118 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, CISS_BAR); 119 if (pci_mapreg_map(pa, CISS_BAR, memtype, 0, 120 &sc->iot, &sc->ioh, NULL, &size, 0)) { 121 printf(": can't map controller mem space\n"); 122 return; 123 } 124 sc->dmat = pa->pa_dmat; 125 126 sc->iem = CISS_READYENA; 127 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 128 if (PCI_VENDOR(reg) == PCI_VENDOR_COMPAQ && 129 (PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5i || 130 PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA532 || 131 PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5312)) 132 sc->iem = CISS_READYENAB; 133 134 cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR); 135 sc->cfgoff = bus_space_read_4(sc->iot, sc->ioh, CISS_CFG_OFF); 136 if (cfg_bar != CISS_BAR) { 137 if (pci_mapreg_map(pa, cfg_bar, PCI_MAPREG_TYPE_MEM, 0, 138 NULL, &sc->cfg_ioh, NULL, &cfgsz, 0)) { 139 printf(": can't map controller config space\n"); 140 bus_space_unmap(sc->iot, sc->ioh, size); 141 return; 142 } 143 } else { 144 sc->cfg_ioh = sc->ioh; 145 cfgsz = size; 146 } 147 148 if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) { 149 printf(": unfit config space\n"); 150 bus_space_unmap(sc->iot, sc->ioh, size); 151 if (cfg_bar != CISS_BAR) 152 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); 153 return; 154 } 155 156 /* disable interrupts until ready */ 157 bus_space_write_4(sc->iot, sc->ioh, CISS_IMR, 158 bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem); 159 160 if (pci_intr_map(pa, &ih)) { 161 printf(": can't map interrupt\n"); 162 bus_space_unmap(sc->iot, sc->ioh, size); 163 if (cfg_bar != CISS_BAR) 164 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); 165 return; 166 } 167 intrstr = pci_intr_string(pa->pa_pc, ih); 168 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc, 169 sc->sc_dev.dv_xname); 170 if (!sc->sc_ih) { 171 printf(": can't establish interrupt"); 172 if (intrstr) 173 printf(" at %s", intrstr); 174 printf("\n"); 175 bus_space_unmap(sc->iot, sc->ioh, size); 176 if (cfg_bar != CISS_BAR) 177 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); 178 } 179 180 printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname); 181 182 if (ciss_attach(sc)) { 183 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 184 sc->sc_ih = NULL; 185 bus_space_unmap(sc->iot, sc->ioh, size); 186 if (cfg_bar != CISS_BAR) 187 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); 188 return; 189 } 190 191 /* enable interrupts now */ 192 bus_space_write_4(sc->iot, sc->ioh, CISS_IMR, 193 bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem); 194 } 195