xref: /openbsd-src/sys/dev/pci/ccp_pci.c (revision 8eadc5ec180d138c03464eee5b23b29a4079a186)
1 /*	$OpenBSD: ccp_pci.c,v 1.13 2024/09/04 07:45:08 jsg Exp $ */
2 
3 /*
4  * Copyright (c) 2018 David Gwynne <dlg@openbsd.org>
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #include <sys/param.h>
20 #include <sys/systm.h>
21 #include <sys/device.h>
22 #include <sys/timeout.h>
23 
24 #include <machine/bus.h>
25 
26 #include <dev/pci/pcidevs.h>
27 #include <dev/pci/pcivar.h>
28 
29 #include <dev/ic/ccpvar.h>
30 #include <dev/ic/pspvar.h>
31 
32 #include "psp.h"
33 
34 #define CCP_PCI_BAR	0x18
35 
36 int	ccp_pci_match(struct device *, void *, void *);
37 void	ccp_pci_attach(struct device *, struct device *, void *);
38 
39 void	ccp_pci_intr_map(struct ccp_softc *, struct pci_attach_args *);
40 void	ccp_pci_psp_attach(struct ccp_softc *, struct pci_attach_args *);
41 
42 const struct cfattach ccp_pci_ca = {
43 	sizeof(struct ccp_softc),
44 	ccp_pci_match,
45 	ccp_pci_attach,
46 };
47 
48 static const struct pci_matchid ccp_pci_devices[] = {
49 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_16_CCP },
50 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_17_CCP_1 },
51 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_17_CCP_2 },
52 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_17_1X_CCP },
53 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_17_3X_CCP },
54 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_17_90_CCP },
55 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_19_1X_PSP },
56 };
57 
58 int
59 ccp_pci_match(struct device *parent, void *match, void *aux)
60 {
61 	return (pci_matchbyid(aux, ccp_pci_devices, nitems(ccp_pci_devices)));
62 }
63 
64 void
65 ccp_pci_attach(struct device *parent, struct device *self, void *aux)
66 {
67 	struct ccp_softc *sc = (struct ccp_softc *)self;
68 	struct pci_attach_args *pa = aux;
69 	pcireg_t memtype;
70 
71 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, CCP_PCI_BAR);
72 	if (PCI_MAPREG_TYPE(memtype) != PCI_MAPREG_TYPE_MEM) {
73 		printf(": wrong memory type\n");
74 		return;
75 	}
76 
77 	if (pci_mapreg_map(pa, CCP_PCI_BAR, memtype, 0,
78 	    &sc->sc_iot, &sc->sc_ioh, NULL, NULL, 0) != 0) {
79 		printf(": cannot map registers\n");
80 		return;
81 	}
82 
83 	ccp_pci_intr_map(sc, pa);
84 
85 	ccp_attach(sc);
86 
87 	ccp_pci_psp_attach(sc, pa);
88 }
89 
90 void
91 ccp_pci_intr_map(struct ccp_softc *sc, struct pci_attach_args *pa)
92 {
93 #if NPSP > 0
94 	pci_intr_handle_t ih;
95 	const char *intrstr = NULL;
96 
97 	/* clear and disable interrupts */
98 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, PSP_REG_INTEN, 0);
99 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, PSP_REG_INTSTS, -1);
100 
101 	if (pci_intr_map_msix(pa, 0, &ih) != 0 &&
102 	    pci_intr_map_msi(pa, &ih) != 0 && pci_intr_map(pa, &ih) != 0) {
103 		printf(": couldn't map interrupt\n");
104 		return;
105 	}
106 
107 	intrstr = pci_intr_string(pa->pa_pc, ih);
108 	sc->sc_irqh = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, psp_sev_intr,
109 	    sc, sc->sc_dev.dv_xname);
110 	if (sc->sc_irqh != NULL)
111 		printf(": %s", intrstr);
112 #endif
113 }
114 
115 void
116 ccp_pci_psp_attach(struct ccp_softc *sc, struct pci_attach_args *pa)
117 {
118 #if NPSP > 0
119 	struct psp_attach_args arg;
120 	struct device *self = (struct device *)sc;
121 
122 	memset(&arg, 0, sizeof(arg));
123 	arg.iot = sc->sc_iot;
124 	arg.ioh = sc->sc_ioh;
125 	arg.dmat = pa->pa_dmat;
126 	arg.capabilities = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
127 	    PSP_REG_CAPABILITIES);
128 
129 	sc->sc_psp = config_found_sm(self, &arg, pspprint, pspsubmatch);
130 	if (sc->sc_psp == NULL) {
131 		pci_intr_disestablish(pa->pa_pc, sc->sc_irqh);
132 		return;
133 	}
134 
135 	/* enable interrupts */
136 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, PSP_REG_INTEN, -1);
137 #endif
138 }
139