1 /* $OpenBSD: cac_pci.c,v 1.15 2014/12/19 22:44:58 guenther Exp $ */ 2 /* $NetBSD: cac_pci.c,v 1.10 2001/01/10 16:48:04 ad Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Andrew Doran. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI front-end for cac(4) driver. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/queue.h> 42 #include <sys/endian.h> 43 44 #include <machine/bus.h> 45 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pcivar.h> 48 49 #include <scsi/scsi_all.h> 50 #include <scsi/scsi_disk.h> 51 #include <scsi/scsiconf.h> 52 53 #include <dev/ic/cacreg.h> 54 #include <dev/ic/cacvar.h> 55 56 void cac_pci_attach(struct device *, struct device *, void *); 57 const struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *); 58 int cac_pci_match(struct device *, void *, void *); 59 int cac_activate(struct device *, int); 60 61 struct cac_ccb *cac_pci_l0_completed(struct cac_softc *); 62 int cac_pci_l0_fifo_full(struct cac_softc *); 63 void cac_pci_l0_intr_enable(struct cac_softc *, int); 64 int cac_pci_l0_intr_pending(struct cac_softc *); 65 void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *); 66 67 struct cfattach cac_pci_ca = { 68 sizeof(struct cac_softc), cac_pci_match, cac_pci_attach 69 }; 70 71 static const struct cac_linkage cac_pci_l0 = { 72 cac_pci_l0_completed, 73 cac_pci_l0_fifo_full, 74 cac_pci_l0_intr_enable, 75 cac_pci_l0_intr_pending, 76 cac_pci_l0_submit 77 }; 78 79 #define CT_STARTFW 0x01 /* Need to start controller firmware */ 80 81 static const 82 struct cac_pci_type { 83 int ct_subsysid; 84 int ct_flags; 85 const struct cac_linkage *ct_linkage; 86 char *ct_typestr; 87 } cac_pci_type[] = { 88 { 0x40300e11, 0, &cac_l0, "SMART-2/P" }, 89 { 0x40310e11, 0, &cac_l0, "SMART-2SL" }, 90 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" }, 91 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" }, 92 { 0x40340e11, 0, &cac_l0, "Smart Array 221" }, 93 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" }, 94 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" }, 95 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" }, 96 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" }, 97 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" }, 98 }; 99 100 static const 101 struct cac_pci_product { 102 u_short cp_vendor; 103 u_short cp_product; 104 } cac_pci_product[] = { 105 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P }, 106 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 }, 107 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 }, 108 }; 109 110 const struct cac_pci_type * 111 cac_pci_findtype(pa) 112 struct pci_attach_args *pa; 113 { 114 const struct cac_pci_type *ct; 115 const struct cac_pci_product *cp; 116 pcireg_t subsysid; 117 int i; 118 119 cp = cac_pci_product; 120 i = 0; 121 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) { 122 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor && 123 PCI_PRODUCT(pa->pa_id) == cp->cp_product) 124 break; 125 cp++; 126 i++; 127 } 128 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) 129 return (NULL); 130 131 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 132 ct = cac_pci_type; 133 i = 0; 134 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) { 135 if (subsysid == ct->ct_subsysid) 136 break; 137 ct++; 138 i++; 139 } 140 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) 141 return (NULL); 142 143 return (ct); 144 } 145 146 int 147 cac_pci_match(parent, match, aux) 148 struct device *parent; 149 void *match, *aux; 150 { 151 152 return (cac_pci_findtype(aux) != NULL); 153 } 154 155 void 156 cac_pci_attach(parent, self, aux) 157 struct device *parent; 158 struct device *self; 159 void *aux; 160 { 161 struct pci_attach_args *pa; 162 const struct cac_pci_type *ct; 163 struct cac_softc *sc; 164 pci_chipset_tag_t pc; 165 pci_intr_handle_t ih; 166 const char *intrstr; 167 pcireg_t reg; 168 bus_size_t size; 169 int memr, ior, i; 170 171 sc = (struct cac_softc *)self; 172 pa = (struct pci_attach_args *)aux; 173 pc = pa->pa_pc; 174 ct = cac_pci_findtype(pa); 175 176 /* 177 * Map the PCI register window. 178 */ 179 memr = -1; 180 ior = -1; 181 182 for (i = 0x10; i <= 0x14; i += 4) { 183 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 184 185 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 186 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 187 ior = i; 188 } else { 189 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 190 memr = i; 191 } 192 } 193 194 if (memr != -1) { 195 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 196 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0)) 197 memr = -1; 198 else 199 ior = -1; 200 } 201 if (ior != -1) 202 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 203 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0)) 204 ior = -1; 205 if (memr == -1 && ior == -1) { 206 printf(": can't map i/o or memory space\n"); 207 return; 208 } 209 210 sc->sc_dmat = pa->pa_dmat; 211 212 /* Map and establish the interrupt. */ 213 if (pci_intr_map(pa, &ih)) { 214 printf(": can't map interrupt\n"); 215 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size); 216 return; 217 } 218 intrstr = pci_intr_string(pc, ih); 219 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, 220 sc, sc->sc_dv.dv_xname); 221 if (sc->sc_ih == NULL) { 222 printf(": can't establish interrupt"); 223 if (intrstr != NULL) 224 printf(" at %s", intrstr); 225 printf("\n"); 226 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size); 227 return; 228 } 229 230 printf(": %s, %s\n", intrstr, ct->ct_typestr); 231 232 /* Now attach to the bus-independent code. */ 233 sc->sc_cl = ct->ct_linkage; 234 cac_init(sc, (ct->ct_flags & CT_STARTFW) != 0); 235 } 236 237 int 238 cac_activate(struct device *self, int act) 239 { 240 struct cac_softc *sc = (struct cac_softc *)self; 241 int ret = 0; 242 243 ret = config_activate_children(self, act); 244 245 switch (act) { 246 case DVACT_POWERDOWN: 247 cac_flush(sc); 248 break; 249 } 250 251 return (ret); 252 } 253 254 255 void 256 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 257 { 258 259 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0, 260 sc->sc_dmamap->dm_mapsize, 261 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 262 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr); 263 } 264 265 struct cac_ccb * 266 cac_pci_l0_completed(struct cac_softc *sc) 267 { 268 struct cac_ccb *ccb; 269 u_int32_t off; 270 271 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU) 272 return (NULL); 273 274 cac_outl(sc, CAC_42REG_DONE_FIFO, 0); 275 off = (off & ~3) - sc->sc_ccbs_paddr; 276 ccb = (struct cac_ccb *)(sc->sc_ccbs + off); 277 278 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0, 279 sc->sc_dmamap->dm_mapsize, 280 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 281 282 return (ccb); 283 } 284 285 int 286 cac_pci_l0_intr_pending(struct cac_softc *sc) 287 { 288 289 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0); 290 } 291 292 void 293 cac_pci_l0_intr_enable(struct cac_softc *sc, int state) 294 { 295 296 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */ 297 } 298 299 int 300 cac_pci_l0_fifo_full(struct cac_softc *sc) 301 { 302 303 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0); 304 } 305