1 /* $OpenBSD: cac_pci.c,v 1.16 2019/12/31 00:16:03 jsg Exp $ */ 2 /* $NetBSD: cac_pci.c,v 1.10 2001/01/10 16:48:04 ad Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Andrew Doran. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI front-end for cac(4) driver. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/queue.h> 42 #include <sys/endian.h> 43 #include <sys/sensors.h> 44 45 #include <machine/bus.h> 46 47 #include <dev/pci/pcidevs.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <scsi/scsi_all.h> 51 #include <scsi/scsi_disk.h> 52 #include <scsi/scsiconf.h> 53 54 #include <dev/ic/cacreg.h> 55 #include <dev/ic/cacvar.h> 56 57 void cac_pci_attach(struct device *, struct device *, void *); 58 const struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *); 59 int cac_pci_match(struct device *, void *, void *); 60 int cac_activate(struct device *, int); 61 62 struct cac_ccb *cac_pci_l0_completed(struct cac_softc *); 63 int cac_pci_l0_fifo_full(struct cac_softc *); 64 void cac_pci_l0_intr_enable(struct cac_softc *, int); 65 int cac_pci_l0_intr_pending(struct cac_softc *); 66 void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *); 67 68 struct cfattach cac_pci_ca = { 69 sizeof(struct cac_softc), cac_pci_match, cac_pci_attach 70 }; 71 72 static const struct cac_linkage cac_pci_l0 = { 73 cac_pci_l0_completed, 74 cac_pci_l0_fifo_full, 75 cac_pci_l0_intr_enable, 76 cac_pci_l0_intr_pending, 77 cac_pci_l0_submit 78 }; 79 80 #define CT_STARTFW 0x01 /* Need to start controller firmware */ 81 82 static const 83 struct cac_pci_type { 84 int ct_subsysid; 85 int ct_flags; 86 const struct cac_linkage *ct_linkage; 87 char *ct_typestr; 88 } cac_pci_type[] = { 89 { 0x40300e11, 0, &cac_l0, "SMART-2/P" }, 90 { 0x40310e11, 0, &cac_l0, "SMART-2SL" }, 91 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" }, 92 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" }, 93 { 0x40340e11, 0, &cac_l0, "Smart Array 221" }, 94 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" }, 95 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" }, 96 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" }, 97 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" }, 98 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" }, 99 }; 100 101 static const 102 struct cac_pci_product { 103 u_short cp_vendor; 104 u_short cp_product; 105 } cac_pci_product[] = { 106 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P }, 107 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 }, 108 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 }, 109 }; 110 111 const struct cac_pci_type * 112 cac_pci_findtype(pa) 113 struct pci_attach_args *pa; 114 { 115 const struct cac_pci_type *ct; 116 const struct cac_pci_product *cp; 117 pcireg_t subsysid; 118 int i; 119 120 cp = cac_pci_product; 121 i = 0; 122 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) { 123 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor && 124 PCI_PRODUCT(pa->pa_id) == cp->cp_product) 125 break; 126 cp++; 127 i++; 128 } 129 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) 130 return (NULL); 131 132 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 133 ct = cac_pci_type; 134 i = 0; 135 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) { 136 if (subsysid == ct->ct_subsysid) 137 break; 138 ct++; 139 i++; 140 } 141 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) 142 return (NULL); 143 144 return (ct); 145 } 146 147 int 148 cac_pci_match(parent, match, aux) 149 struct device *parent; 150 void *match, *aux; 151 { 152 153 return (cac_pci_findtype(aux) != NULL); 154 } 155 156 void 157 cac_pci_attach(parent, self, aux) 158 struct device *parent; 159 struct device *self; 160 void *aux; 161 { 162 struct pci_attach_args *pa; 163 const struct cac_pci_type *ct; 164 struct cac_softc *sc; 165 pci_chipset_tag_t pc; 166 pci_intr_handle_t ih; 167 const char *intrstr; 168 pcireg_t reg; 169 bus_size_t size; 170 int memr, ior, i; 171 172 sc = (struct cac_softc *)self; 173 pa = (struct pci_attach_args *)aux; 174 pc = pa->pa_pc; 175 ct = cac_pci_findtype(pa); 176 177 /* 178 * Map the PCI register window. 179 */ 180 memr = -1; 181 ior = -1; 182 183 for (i = 0x10; i <= 0x14; i += 4) { 184 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 185 186 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 187 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 188 ior = i; 189 } else { 190 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 191 memr = i; 192 } 193 } 194 195 if (memr != -1) { 196 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 197 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0)) 198 memr = -1; 199 else 200 ior = -1; 201 } 202 if (ior != -1) 203 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 204 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0)) 205 ior = -1; 206 if (memr == -1 && ior == -1) { 207 printf(": can't map i/o or memory space\n"); 208 return; 209 } 210 211 sc->sc_dmat = pa->pa_dmat; 212 213 /* Map and establish the interrupt. */ 214 if (pci_intr_map(pa, &ih)) { 215 printf(": can't map interrupt\n"); 216 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size); 217 return; 218 } 219 intrstr = pci_intr_string(pc, ih); 220 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, 221 sc, sc->sc_dv.dv_xname); 222 if (sc->sc_ih == NULL) { 223 printf(": can't establish interrupt"); 224 if (intrstr != NULL) 225 printf(" at %s", intrstr); 226 printf("\n"); 227 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size); 228 return; 229 } 230 231 printf(": %s, %s\n", intrstr, ct->ct_typestr); 232 233 /* Now attach to the bus-independent code. */ 234 sc->sc_cl = ct->ct_linkage; 235 cac_init(sc, (ct->ct_flags & CT_STARTFW) != 0); 236 } 237 238 int 239 cac_activate(struct device *self, int act) 240 { 241 struct cac_softc *sc = (struct cac_softc *)self; 242 int ret = 0; 243 244 ret = config_activate_children(self, act); 245 246 switch (act) { 247 case DVACT_POWERDOWN: 248 cac_flush(sc); 249 break; 250 } 251 252 return (ret); 253 } 254 255 256 void 257 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 258 { 259 260 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0, 261 sc->sc_dmamap->dm_mapsize, 262 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 263 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr); 264 } 265 266 struct cac_ccb * 267 cac_pci_l0_completed(struct cac_softc *sc) 268 { 269 struct cac_ccb *ccb; 270 u_int32_t off; 271 272 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU) 273 return (NULL); 274 275 cac_outl(sc, CAC_42REG_DONE_FIFO, 0); 276 off = (off & ~3) - sc->sc_ccbs_paddr; 277 ccb = (struct cac_ccb *)(sc->sc_ccbs + off); 278 279 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0, 280 sc->sc_dmamap->dm_mapsize, 281 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 282 283 return (ccb); 284 } 285 286 int 287 cac_pci_l0_intr_pending(struct cac_softc *sc) 288 { 289 290 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0); 291 } 292 293 void 294 cac_pci_l0_intr_enable(struct cac_softc *sc, int state) 295 { 296 297 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */ 298 } 299 300 int 301 cac_pci_l0_fifo_full(struct cac_softc *sc) 302 { 303 304 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0); 305 } 306