1 /* $OpenBSD: autri.c,v 1.41 2016/09/19 06:46:44 ratchov Exp $ */ 2 3 /* 4 * Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Trident 4DWAVE-DX/NX, SiS 7018, ALi M5451 Sound Driver 30 * 31 * The register information is taken from the ALSA driver. 32 * 33 * Documentation links: 34 * - ftp://ftp.alsa-project.org/pub/manuals/trident/ 35 */ 36 37 #include "midi.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/fcntl.h> 43 #include <sys/malloc.h> 44 #include <sys/device.h> 45 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <sys/audioio.h> 51 #include <dev/audio_if.h> 52 #include <dev/midi_if.h> 53 #include <dev/ic/ac97.h> 54 #include <dev/ic/mpuvar.h> 55 56 #include <machine/bus.h> 57 #include <machine/intr.h> 58 59 #include <dev/pci/autrireg.h> 60 #include <dev/pci/autrivar.h> 61 62 #ifdef AUDIO_DEBUG 63 # define DPRINTF(x) if (autridebug) printf x 64 # define DPRINTFN(n,x) if (autridebug > (n)) printf x 65 int autridebug = 0; 66 #else 67 # define DPRINTF(x) 68 # define DPRINTFN(n,x) 69 #endif 70 71 int autri_match(struct device *, void *, void *); 72 void autri_attach(struct device *, struct device *, void *); 73 int autri_activate(struct device *, int); 74 int autri_intr(void *); 75 76 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 77 #define KERNADDR(p) ((void *)((p)->addr)) 78 79 int autri_allocmem(struct autri_softc *, size_t, size_t, struct autri_dma *); 80 int autri_freemem(struct autri_softc *, struct autri_dma *); 81 82 #define TWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x)) 83 #define TWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x)) 84 #define TWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x)) 85 #define TREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r)) 86 #define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r)) 87 #define TREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r)) 88 89 static __inline void autri_reg_set_1(struct autri_softc *, int, uint8_t); 90 static __inline void autri_reg_clear_1(struct autri_softc *, int, uint8_t); 91 static __inline void autri_reg_set_4(struct autri_softc *, int, uint32_t); 92 static __inline void autri_reg_clear_4(struct autri_softc *, int, uint32_t); 93 94 int autri_attach_codec(void *sc, struct ac97_codec_if *); 95 int autri_read_codec(void *sc, u_int8_t a, u_int16_t *d); 96 int autri_write_codec(void *sc, u_int8_t a, u_int16_t d); 97 void autri_reset_codec(void *sc); 98 enum ac97_host_flags autri_flags_codec(void *); 99 100 int autri_init(void *sc); 101 struct autri_dma *autri_find_dma(struct autri_softc *, void *); 102 void autri_setup_channel(struct autri_softc *sc,int mode, 103 struct audio_params *param); 104 void autri_enable_interrupt(struct autri_softc *sc, int ch); 105 void autri_disable_interrupt(struct autri_softc *sc, int ch); 106 void autri_startch(struct autri_softc *sc, int ch, int ch_intr); 107 void autri_stopch(struct autri_softc *sc, int ch, int ch_intr); 108 void autri_enable_loop_interrupt(void *sc); 109 #if 0 110 void autri_disable_loop_interrupt(void *sc); 111 #endif 112 113 struct cfdriver autri_cd = { 114 NULL, "autri", DV_DULL 115 }; 116 117 struct cfattach autri_ca = { 118 sizeof(struct autri_softc), autri_match, autri_attach, NULL, 119 autri_activate 120 }; 121 122 int autri_open(void *, int); 123 void autri_close(void *); 124 int autri_set_params(void *, int, int, struct audio_params *, 125 struct audio_params *); 126 int autri_round_blocksize(void *, int); 127 int autri_trigger_output(void *, void *, void *, int, void (*)(void *), 128 void *, struct audio_params *); 129 int autri_trigger_input(void *, void *, void *, int, void (*)(void *), 130 void *, struct audio_params *); 131 int autri_halt_output(void *); 132 int autri_halt_input(void *); 133 int autri_mixer_set_port(void *, mixer_ctrl_t *); 134 int autri_mixer_get_port(void *, mixer_ctrl_t *); 135 void *autri_malloc(void *, int, size_t, int, int); 136 void autri_free(void *, void *, int); 137 int autri_get_props(void *); 138 int autri_query_devinfo(void *addr, mixer_devinfo_t *dip); 139 140 int autri_get_portnum_by_name(struct autri_softc *, char *, char *, char *); 141 142 struct audio_hw_if autri_hw_if = { 143 autri_open, 144 autri_close, 145 autri_set_params, 146 autri_round_blocksize, 147 NULL, /* commit_settings */ 148 NULL, /* init_output */ 149 NULL, /* init_input */ 150 NULL, /* start_output */ 151 NULL, /* start_input */ 152 autri_halt_output, 153 autri_halt_input, 154 NULL, /* speaker_ctl */ 155 NULL, /* setfd */ 156 autri_mixer_set_port, 157 autri_mixer_get_port, 158 autri_query_devinfo, 159 autri_malloc, 160 autri_free, 161 NULL, 162 autri_get_props, 163 autri_trigger_output, 164 autri_trigger_input 165 }; 166 167 #if NMIDI > 0 168 void autri_midi_close(void *); 169 void autri_midi_getinfo(void *, struct midi_info *); 170 int autri_midi_open(void *, int, void (*)(void *, int), 171 void (*)(void *), void *); 172 int autri_midi_output(void *, int); 173 174 struct midi_hw_if autri_midi_hw_if = { 175 autri_midi_open, 176 autri_midi_close, 177 autri_midi_output, 178 NULL, /* flush */ 179 autri_midi_getinfo, 180 NULL, /* ioctl */ 181 }; 182 #endif 183 184 /* 185 * register set/clear bit 186 */ 187 static __inline void 188 autri_reg_set_1(struct autri_softc *sc, int no, uint8_t mask) 189 { 190 bus_space_write_1(sc->memt, sc->memh, no, 191 (bus_space_read_1(sc->memt, sc->memh, no) | mask)); 192 } 193 194 static __inline void 195 autri_reg_clear_1(struct autri_softc *sc, int no, uint8_t mask) 196 { 197 bus_space_write_1(sc->memt, sc->memh, no, 198 (bus_space_read_1(sc->memt, sc->memh, no) & ~mask)); 199 } 200 201 static __inline void 202 autri_reg_set_4(struct autri_softc *sc, int no, uint32_t mask) 203 { 204 bus_space_write_4(sc->memt, sc->memh, no, 205 (bus_space_read_4(sc->memt, sc->memh, no) | mask)); 206 } 207 208 static __inline void 209 autri_reg_clear_4(struct autri_softc *sc, int no, uint32_t mask) 210 { 211 bus_space_write_4(sc->memt, sc->memh, no, 212 (bus_space_read_4(sc->memt, sc->memh, no) & ~mask)); 213 } 214 215 /* 216 * AC97 codec 217 */ 218 int 219 autri_attach_codec(void *sc_, struct ac97_codec_if *codec_if) 220 { 221 struct autri_codec_softc *sc = sc_; 222 223 DPRINTF(("autri_attach_codec()\n")); 224 225 sc->codec_if = codec_if; 226 return 0; 227 } 228 229 int 230 autri_read_codec(void *sc_, u_int8_t index, u_int16_t *data) 231 { 232 struct autri_codec_softc *codec = sc_; 233 struct autri_softc *sc = codec->sc; 234 u_int32_t status, addr, cmd, busy; 235 u_int16_t count; 236 237 /*DPRINTF(("sc->sc->type : 0x%X",sc->sc->type));*/ 238 239 switch (sc->sc_devid) { 240 case AUTRI_DEVICE_ID_4DWAVE_DX: 241 addr = AUTRI_DX_ACR1; 242 cmd = AUTRI_DX_ACR1_CMD_READ; 243 busy = AUTRI_DX_ACR1_BUSY_READ; 244 break; 245 case AUTRI_DEVICE_ID_4DWAVE_NX: 246 addr = AUTRI_NX_ACR2; 247 cmd = AUTRI_NX_ACR2_CMD_READ; 248 busy = AUTRI_NX_ACR2_BUSY_READ | AUTRI_NX_ACR2_RECV_WAIT; 249 break; 250 case AUTRI_DEVICE_ID_SIS_7018: 251 addr = AUTRI_SIS_ACRD; 252 cmd = AUTRI_SIS_ACRD_CMD_READ; 253 busy = AUTRI_SIS_ACRD_BUSY_READ | AUTRI_SIS_ACRD_AUDIO_BUSY; 254 break; 255 case AUTRI_DEVICE_ID_ALI_M5451: 256 if (sc->sc_revision > 0x01) 257 addr = AUTRI_ALI_ACWR; 258 else 259 addr = AUTRI_ALI_ACRD; 260 cmd = AUTRI_ALI_ACRD_CMD_READ; 261 busy = AUTRI_ALI_ACRD_BUSY_READ; 262 break; 263 default: 264 printf("%s: autri_read_codec : unknown device\n", 265 sc->sc_dev.dv_xname); 266 return -1; 267 } 268 269 /* wait for 'Ready to Read' */ 270 for (count=0; count < 0xffff; count++) { 271 if ((TREAD4(sc, addr) & busy) == 0) 272 break; 273 DELAY(1); 274 } 275 276 if (count == 0xffff) { 277 printf("%s: Codec timeout. Busy reading AC97 codec.\n", 278 sc->sc_dev.dv_xname); 279 return -1; 280 } 281 282 /* send Read Command to AC97 */ 283 TWRITE4(sc, addr, (index & 0x7f) | cmd); 284 285 /* wait for 'Returned data is available' */ 286 for (count=0; count < 0xffff; count++) { 287 status = TREAD4(sc, addr); 288 if ((status & busy) == 0) 289 break; 290 DELAY(1); 291 } 292 293 if (count == 0xffff) { 294 printf("%s: Codec timeout. Busy reading AC97 codec.\n", 295 sc->sc_dev.dv_xname); 296 return -1; 297 } 298 299 *data = (status >> 16) & 0x0000ffff; 300 /*DPRINTF(("autri_read_codec(0x%X) return 0x%X\n",reg,*data));*/ 301 return 0; 302 } 303 304 int 305 autri_write_codec(void *sc_, u_int8_t index, u_int16_t data) 306 { 307 struct autri_codec_softc *codec = sc_; 308 struct autri_softc *sc = codec->sc; 309 u_int32_t addr, cmd, busy; 310 u_int16_t count; 311 312 /*DPRINTF(("autri_write_codec(0x%X,0x%X)\n",index,data));*/ 313 314 switch (sc->sc_devid) { 315 case AUTRI_DEVICE_ID_4DWAVE_DX: 316 addr = AUTRI_DX_ACR0; 317 cmd = AUTRI_DX_ACR0_CMD_WRITE; 318 busy = AUTRI_DX_ACR0_BUSY_WRITE; 319 break; 320 case AUTRI_DEVICE_ID_4DWAVE_NX: 321 addr = AUTRI_NX_ACR1; 322 cmd = AUTRI_NX_ACR1_CMD_WRITE; 323 busy = AUTRI_NX_ACR1_BUSY_WRITE; 324 break; 325 case AUTRI_DEVICE_ID_SIS_7018: 326 addr = AUTRI_SIS_ACWR; 327 cmd = AUTRI_SIS_ACWR_CMD_WRITE; 328 busy = AUTRI_SIS_ACWR_BUSY_WRITE | AUTRI_SIS_ACWR_AUDIO_BUSY; 329 break; 330 case AUTRI_DEVICE_ID_ALI_M5451: 331 addr = AUTRI_ALI_ACWR; 332 cmd = AUTRI_ALI_ACWR_CMD_WRITE; 333 if (sc->sc_revision > 0x01) 334 cmd |= 0x0100; 335 busy = AUTRI_ALI_ACWR_BUSY_WRITE; 336 break; 337 default: 338 printf("%s: autri_write_codec : unknown device.\n", 339 sc->sc_dev.dv_xname); 340 return -1; 341 } 342 343 /* wait for 'Ready to Write' */ 344 for (count=0; count < 0xffff; count++) { 345 if ((TREAD4(sc, addr) & busy) == 0) 346 break; 347 DELAY(1); 348 } 349 350 if (count == 0xffff) { 351 printf("%s: Codec timeout. Busy writing AC97 codec\n", 352 sc->sc_dev.dv_xname); 353 return -1; 354 } 355 356 /* send Write Command to AC97 */ 357 TWRITE4(sc, addr, (data << 16) | (index & 0x7f) | cmd); 358 359 return 0; 360 } 361 362 void 363 autri_reset_codec(void *sc_) 364 { 365 struct autri_codec_softc *codec = sc_; 366 struct autri_softc *sc = codec->sc; 367 u_int32_t reg, ready; 368 int addr, count = 200; 369 370 DPRINTF(("autri_reset_codec(codec=%p,sc=%p)\n",codec,sc)); 371 DPRINTF(("sc->sc_devid=%X\n",sc->sc_devid)); 372 373 switch (sc->sc_devid) { 374 case AUTRI_DEVICE_ID_4DWAVE_DX: 375 /* warm reset AC97 codec */ 376 autri_reg_set_4(sc, AUTRI_DX_ACR2, 1); 377 delay(100); 378 /* release reset */ 379 autri_reg_clear_4(sc, AUTRI_DX_ACR2, 1); 380 delay(100); 381 382 addr = AUTRI_DX_ACR2; 383 ready = AUTRI_DX_ACR2_CODEC_READY; 384 break; 385 case AUTRI_DEVICE_ID_4DWAVE_NX: 386 /* warm reset AC97 codec */ 387 autri_reg_set_4(sc, AUTRI_NX_ACR0, 1); 388 delay(100); 389 /* release reset */ 390 autri_reg_clear_4(sc, AUTRI_NX_ACR0, 1); 391 delay(100); 392 393 addr = AUTRI_NX_ACR0; 394 ready = AUTRI_NX_ACR0_CODEC_READY; 395 break; 396 case AUTRI_DEVICE_ID_SIS_7018: 397 /* warm reset AC97 codec */ 398 autri_reg_set_4(sc, AUTRI_SIS_SCTRL, 2); 399 delay(1000); 400 /* release reset (warm & cold) */ 401 autri_reg_clear_4(sc, AUTRI_SIS_SCTRL, 3); 402 delay(2000); 403 404 addr = AUTRI_SIS_SCTRL; 405 ready = AUTRI_SIS_SCTRL_CODEC_READY; 406 break; 407 case AUTRI_DEVICE_ID_ALI_M5451: 408 /* warm reset AC97 codec */ 409 autri_reg_set_4(sc, AUTRI_ALI_SCTRL, 1); 410 delay(100); 411 /* release reset (warm & cold) */ 412 autri_reg_clear_4(sc, AUTRI_ALI_SCTRL, 3); 413 delay(100); 414 415 addr = AUTRI_ALI_SCTRL; 416 ready = AUTRI_ALI_SCTRL_CODEC_READY; 417 break; 418 } 419 420 /* wait for 'Codec Ready' */ 421 while (count--) { 422 reg = TREAD4(sc, addr); 423 if (reg & ready) 424 break; 425 delay(1000); 426 } 427 428 if (count == 0) 429 printf("%s: Codec timeout. AC97 is not ready for operation.\n", 430 sc->sc_dev.dv_xname); 431 } 432 433 enum ac97_host_flags 434 autri_flags_codec(void *v) 435 { 436 struct autri_codec_softc *sc = v; 437 438 return (sc->flags); 439 } 440 441 /* 442 * 443 */ 444 const struct pci_matchid autri_devices[] = { 445 { PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_4DWAVE_NX }, 446 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7018 }, 447 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5451 } 448 }; 449 450 int 451 autri_match(struct device *parent, void *match, void *aux) 452 { 453 struct pci_attach_args *pa = aux; 454 455 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_TRIDENT && 456 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_TRIDENT_4DWAVE_DX) { 457 /* 458 * IBM makes a pcn network card and improperly 459 * sets the vendor and product ID's. Avoid matching. 460 */ 461 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_NETWORK) 462 return (0); 463 else 464 return (1); 465 } 466 467 return (pci_matchbyid((struct pci_attach_args *)aux, autri_devices, 468 nitems(autri_devices))); 469 } 470 471 void 472 autri_attach(struct device *parent, struct device *self, void *aux) 473 { 474 struct autri_softc *sc = (struct autri_softc *)self; 475 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 476 pci_chipset_tag_t pc = pa->pa_pc; 477 struct autri_codec_softc *codec; 478 bus_size_t iosize; 479 pci_intr_handle_t ih; 480 char const *intrstr; 481 mixer_ctrl_t ctl; 482 int i, r; 483 484 sc->sc_devid = pa->pa_id; 485 sc->sc_class = pa->pa_class; 486 sc->sc_revision = PCI_REVISION(pa->pa_class); 487 488 /* map register to memory */ 489 if (pci_mapreg_map(pa, AUTRI_PCI_MEMORY_BASE, 490 PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, &iosize, 0)) { 491 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname); 492 return; 493 } 494 495 /* map and establish the interrupt */ 496 if (pci_intr_map(pa, &ih)) { 497 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 498 bus_space_unmap(sc->memt, sc->memh, iosize); 499 return; 500 } 501 intrstr = pci_intr_string(pc, ih); 502 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO | IPL_MPSAFE, 503 autri_intr, sc, sc->sc_dev.dv_xname); 504 if (sc->sc_ih == NULL) { 505 printf("%s: couldn't establish interrupt", 506 sc->sc_dev.dv_xname); 507 if (intrstr != NULL) 508 printf(" at %s", intrstr); 509 printf("\n"); 510 bus_space_unmap(sc->memt, sc->memh, iosize); 511 return; 512 } 513 printf(": %s\n", intrstr); 514 515 sc->sc_dmatag = pa->pa_dmat; 516 sc->sc_pc = pc; 517 sc->sc_pt = pa->pa_tag; 518 519 /* initialize the device */ 520 autri_init(sc); 521 522 /* attach AC97 codec */ 523 codec = &sc->sc_codec; 524 memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev)); 525 codec->sc = sc; 526 527 codec->host_if.arg = codec; 528 codec->host_if.attach = autri_attach_codec; 529 codec->host_if.reset = autri_reset_codec; 530 codec->host_if.read = autri_read_codec; 531 codec->host_if.write = autri_write_codec; 532 codec->host_if.flags = autri_flags_codec; 533 codec->flags = AC97_HOST_DONT_READ | AC97_HOST_SWAPPED_CHANNELS; 534 if (sc->sc_dev.dv_cfdata->cf_flags & 0x0001) 535 codec->flags &= ~AC97_HOST_SWAPPED_CHANNELS; 536 537 if ((r = ac97_attach(&codec->host_if)) != 0) { 538 printf("%s: can't attach codec (error 0x%X)\n", 539 sc->sc_dev.dv_xname, r); 540 pci_intr_disestablish(pc, sc->sc_ih); 541 bus_space_unmap(sc->memt, sc->memh, iosize); 542 return; 543 } 544 545 /* disable mutes */ 546 for (i = 0; i < 4; i++) { 547 static struct { 548 char *class, *device; 549 } d[] = { 550 { AudioCoutputs, AudioNmaster}, 551 { AudioCinputs, AudioNdac}, 552 { AudioCinputs, AudioNcd}, 553 { AudioCrecord, AudioNvolume}, 554 }; 555 556 ctl.type = AUDIO_MIXER_ENUM; 557 ctl.un.ord = 0; 558 559 #if 0 560 ctl.dev = sc->sc_codec.codec_if->vtbl->get_portnum_by_name(sc->sc_codec.codec_if, 561 d[i].class, d[i].device, AudioNmute); 562 #endif 563 ctl.dev = autri_get_portnum_by_name(sc,d[i].class, 564 d[i].device, AudioNmute); 565 autri_mixer_set_port(sc, &ctl); 566 } 567 568 /* set a reasonable default volume */ 569 ctl.type = AUDIO_MIXER_VALUE; 570 ctl.un.value.num_channels = 2; 571 ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 572 ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 127; 573 574 ctl.dev = autri_get_portnum_by_name(sc,AudioCoutputs,AudioNmaster,NULL); 575 autri_mixer_set_port(sc, &ctl); 576 577 audio_attach_mi(&autri_hw_if, sc, &sc->sc_dev); 578 579 #if NMIDI > 0 580 midi_attach_mi(&autri_midi_hw_if, sc, &sc->sc_dev); 581 #endif 582 } 583 584 int 585 autri_activate(struct device *self, int act) 586 { 587 struct autri_softc *sc = (struct autri_softc *)self; 588 int rv = 0; 589 590 switch (act) { 591 case DVACT_RESUME: 592 autri_init(sc); 593 ac97_resume(&sc->sc_codec.host_if, sc->sc_codec.codec_if); 594 rv = config_activate_children(self, act); 595 break; 596 default: 597 rv = config_activate_children(self, act); 598 break; 599 } 600 return (rv); 601 } 602 603 int 604 autri_init(void *sc_) 605 { 606 struct autri_softc *sc = sc_; 607 pcireg_t reg; 608 609 pci_chipset_tag_t pc = sc->sc_pc; 610 pcitag_t pt = sc->sc_pt; 611 612 DPRINTF(("in autri_init()\n")); 613 DPRINTFN(5,("pci_conf_read(0x40) : 0x%X\n",pci_conf_read(pc,pt,0x40))); 614 DPRINTFN(5,("pci_conf_read(0x44) : 0x%X\n",pci_conf_read(pc,pt,0x44))); 615 616 switch (sc->sc_devid) { 617 case AUTRI_DEVICE_ID_4DWAVE_DX: 618 /* disable Legacy Control */ 619 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 620 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 621 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 622 delay(100); 623 /* audio engine reset */ 624 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 625 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00040000); 626 delay(100); 627 /* release reset */ 628 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 629 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 630 delay(100); 631 /* DAC on */ 632 autri_reg_set_4(sc,AUTRI_DX_ACR2,0x02); 633 break; 634 case AUTRI_DEVICE_ID_4DWAVE_NX: 635 /* disable Legacy Control */ 636 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 637 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 638 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 639 delay(100); 640 /* audio engine reset */ 641 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 642 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00010000); 643 delay(100); 644 /* release reset */ 645 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 646 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00010000); 647 delay(100); 648 /* DAC on */ 649 autri_reg_set_4(sc,AUTRI_NX_ACR0,0x02); 650 break; 651 case AUTRI_DEVICE_ID_SIS_7018: 652 /* disable Legacy Control */ 653 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 654 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 655 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 656 delay(100); 657 /* reset Digital Controller */ 658 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 659 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 660 delay(100); 661 /* release reset */ 662 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 663 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 664 delay(100); 665 /* disable AC97 GPIO interrupt */ 666 TWRITE1(sc, AUTRI_SIS_ACGPIO, 0); 667 /* enable 64 channel mode */ 668 autri_reg_set_4(sc, AUTRI_LFO_GC_CIR, BANK_B_EN); 669 break; 670 case AUTRI_DEVICE_ID_ALI_M5451: 671 /* disable Legacy Control */ 672 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 673 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 674 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 675 delay(100); 676 /* reset Digital Controller */ 677 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 678 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 679 delay(100); 680 /* release reset */ 681 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 682 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 683 delay(100); 684 /* enable PCM input */ 685 autri_reg_set_4(sc, AUTRI_ALI_GCONTROL, AUTRI_ALI_GCONTROL_PCM_IN); 686 break; 687 } 688 689 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 690 sc->sc_play.ch = 0; 691 sc->sc_play.ch_intr = 1; 692 sc->sc_rec.ch = 2; 693 sc->sc_rec.ch_intr = 3; 694 } else { 695 sc->sc_play.ch = 0x20; 696 sc->sc_play.ch_intr = 0x21; 697 sc->sc_rec.ch = 0x22; 698 sc->sc_rec.ch_intr = 0x23; 699 } 700 701 /* clear channel status */ 702 TWRITE4(sc, AUTRI_STOP_A, 0xffffffff); 703 TWRITE4(sc, AUTRI_STOP_B, 0xffffffff); 704 705 /* disable channel interrupt */ 706 TWRITE4(sc, AUTRI_AINTEN_A, 0); 707 TWRITE4(sc, AUTRI_AINTEN_B, 0); 708 709 #if 0 710 /* TLB */ 711 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 712 TWRITE4(sc,AUTRI_NX_TLBC,0); 713 } 714 #endif 715 716 autri_enable_loop_interrupt(sc); 717 718 DPRINTF(("out autri_init()\n")); 719 return 0; 720 } 721 722 void 723 autri_enable_loop_interrupt(void *sc_) 724 { 725 struct autri_softc *sc = sc_; 726 u_int32_t reg; 727 728 /*reg = (ENDLP_IE | MIDLP_IE);*/ 729 reg = ENDLP_IE; 730 #if 0 731 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 732 reg |= BANK_B_EN; 733 #endif 734 autri_reg_set_4(sc,AUTRI_LFO_GC_CIR,reg); 735 } 736 737 #if 0 738 void 739 autri_disable_loop_interrupt(void *sc_) 740 { 741 struct autri_softc *sc = sc_; 742 u_int32_t reg; 743 744 reg = (ENDLP_IE | MIDLP_IE); 745 autri_reg_clear_4(sc,AUTRI_LFO_GC_CIR,reg); 746 } 747 #endif 748 749 int 750 autri_intr(void *p) 751 { 752 struct autri_softc *sc = p; 753 u_int32_t intsrc; 754 u_int32_t mask, active[2]; 755 int ch, endch; 756 /* 757 u_int32_t reg; 758 u_int32_t cso,eso; 759 */ 760 761 mtx_enter(&audio_lock); 762 intsrc = TREAD4(sc,AUTRI_MISCINT); 763 if ((intsrc & (ADDRESS_IRQ|MPU401_IRQ)) == 0) { 764 mtx_leave(&audio_lock); 765 return 0; 766 } 767 768 if (intsrc & ADDRESS_IRQ) { 769 770 active[0] = TREAD4(sc,AUTRI_AIN_A); 771 active[1] = TREAD4(sc,AUTRI_AIN_B); 772 773 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 774 endch = 32; 775 } else { 776 endch = 64; 777 } 778 779 for (ch=0; ch<endch; ch++) { 780 mask = 1 << (ch & 0x1f); 781 if (active[(ch & 0x20) ? 1 : 0] & mask) { 782 783 /* clear interrupt */ 784 TWRITE4(sc, (ch & 0x20) ? AUTRI_AIN_B : AUTRI_AIN_A, mask); 785 /* disable interrupt */ 786 autri_reg_clear_4(sc,(ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 787 #if 0 788 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 789 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | ch); 790 791 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 792 cso = TREAD4(sc, 0xe0) & 0x00ffffff; 793 eso = TREAD4(sc, 0xe8) & 0x00ffffff; 794 } else { 795 cso = (TREAD4(sc, 0xe0) >> 16) & 0x0000ffff; 796 eso = (TREAD4(sc, 0xe8) >> 16) & 0x0000ffff; 797 } 798 /*printf("cso=%d, eso=%d\n",cso,eso);*/ 799 #endif 800 if (ch == sc->sc_play.ch_intr) { 801 if (sc->sc_play.intr) 802 sc->sc_play.intr(sc->sc_play.intr_arg); 803 } 804 805 if (ch == sc->sc_rec.ch_intr) { 806 if (sc->sc_rec.intr) 807 sc->sc_rec.intr(sc->sc_rec.intr_arg); 808 } 809 810 /* enable interrupt */ 811 autri_reg_set_4(sc, (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 812 } 813 } 814 } 815 816 if (intsrc & MPU401_IRQ) { 817 /* XXX */ 818 } 819 820 autri_reg_set_4(sc,AUTRI_MISCINT, 821 ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW); 822 mtx_leave(&audio_lock); 823 return 1; 824 } 825 826 /* 827 * 828 */ 829 830 int 831 autri_allocmem(struct autri_softc *sc, size_t size, size_t align, 832 struct autri_dma *p) 833 { 834 int error; 835 836 p->size = size; 837 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 838 p->segs, nitems(p->segs), &p->nsegs, BUS_DMA_NOWAIT); 839 if (error) 840 return (error); 841 842 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 843 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 844 if (error) 845 goto free; 846 847 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 848 0, BUS_DMA_NOWAIT, &p->map); 849 if (error) 850 goto unmap; 851 852 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 853 BUS_DMA_NOWAIT); 854 if (error) 855 goto destroy; 856 return (0); 857 858 destroy: 859 bus_dmamap_destroy(sc->sc_dmatag, p->map); 860 unmap: 861 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 862 free: 863 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 864 return (error); 865 } 866 867 int 868 autri_freemem(struct autri_softc *sc, struct autri_dma *p) 869 { 870 bus_dmamap_unload(sc->sc_dmatag, p->map); 871 bus_dmamap_destroy(sc->sc_dmatag, p->map); 872 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 873 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 874 return 0; 875 } 876 877 int 878 autri_open(void *addr, int flags) 879 { 880 DPRINTF(("autri_open()\n")); 881 DPRINTFN(5,("MISCINT : 0x%08X\n", 882 TREAD4((struct autri_softc *)addr, AUTRI_MISCINT))); 883 DPRINTFN(5,("LFO_GC_CIR : 0x%08X\n", 884 TREAD4((struct autri_softc *)addr, AUTRI_LFO_GC_CIR))); 885 return 0; 886 } 887 888 void 889 autri_close(void *addr) 890 { 891 DPRINTF(("autri_close()\n")); 892 } 893 894 int 895 autri_set_params(void *addr, int setmode, int usemode, struct audio_params *play, 896 struct audio_params *rec) 897 { 898 struct audio_params *p; 899 int mode; 900 901 for (mode = AUMODE_RECORD; mode != -1; 902 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 903 if ((setmode & mode) == 0) 904 continue; 905 p = mode == AUMODE_PLAY ? play : rec; 906 p->sample_rate = 48000; 907 if (p->precision != 8) 908 p->precision = 16; 909 if (p->channels != 1) 910 p->channels = 2; 911 p->encoding = p->precision == 16 ? 912 AUDIO_ENCODING_SLINEAR_LE : AUDIO_ENCODING_ULINEAR_LE; 913 p->bps = AUDIO_BPS(p->precision); 914 p->msb = 1; 915 } 916 917 return 0; 918 } 919 920 int 921 autri_round_blocksize(void *addr, int block) 922 { 923 return ((block + 3) & -4); 924 } 925 926 int 927 autri_halt_output(void *addr) 928 { 929 struct autri_softc *sc = addr; 930 931 DPRINTF(("autri_halt_output()\n")); 932 mtx_enter(&audio_lock); 933 sc->sc_play.intr = NULL; 934 autri_stopch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 935 autri_disable_interrupt(sc, sc->sc_play.ch_intr); 936 mtx_leave(&audio_lock); 937 return 0; 938 } 939 940 int 941 autri_halt_input(void *addr) 942 { 943 struct autri_softc *sc = addr; 944 945 DPRINTF(("autri_halt_input()\n")); 946 mtx_enter(&audio_lock); 947 sc->sc_rec.intr = NULL; 948 autri_stopch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 949 autri_disable_interrupt(sc, sc->sc_rec.ch_intr); 950 mtx_leave(&audio_lock); 951 return 0; 952 } 953 954 int 955 autri_mixer_set_port(void *addr, mixer_ctrl_t *cp) 956 { 957 struct autri_softc *sc = addr; 958 959 return (sc->sc_codec.codec_if->vtbl->mixer_set_port( 960 sc->sc_codec.codec_if, cp)); 961 } 962 963 int 964 autri_mixer_get_port(void *addr, mixer_ctrl_t *cp) 965 { 966 struct autri_softc *sc = addr; 967 968 return (sc->sc_codec.codec_if->vtbl->mixer_get_port( 969 sc->sc_codec.codec_if, cp)); 970 } 971 972 int 973 autri_query_devinfo(void *addr, mixer_devinfo_t *dip) 974 { 975 struct autri_softc *sc = addr; 976 977 return (sc->sc_codec.codec_if->vtbl->query_devinfo( 978 sc->sc_codec.codec_if, dip)); 979 } 980 981 int 982 autri_get_portnum_by_name(struct autri_softc *sc, char *class, char *device, 983 char *qualifier) 984 { 985 return (sc->sc_codec.codec_if->vtbl->get_portnum_by_name( 986 sc->sc_codec.codec_if, class, device, qualifier)); 987 } 988 989 void * 990 autri_malloc(void *addr, int direction, size_t size, int pool, int flags) 991 { 992 struct autri_softc *sc = addr; 993 struct autri_dma *p; 994 int error; 995 996 p = malloc(sizeof(*p), pool, flags); 997 if (!p) 998 return NULL; 999 1000 #if 0 1001 error = autri_allocmem(sc, size, 16, p); 1002 #endif 1003 error = autri_allocmem(sc, size, 0x10000, p); 1004 if (error) { 1005 free(p, pool, 0); 1006 return NULL; 1007 } 1008 1009 p->next = sc->sc_dmas; 1010 sc->sc_dmas = p; 1011 return KERNADDR(p); 1012 } 1013 1014 void 1015 autri_free(void *addr, void *ptr, int pool) 1016 { 1017 struct autri_softc *sc = addr; 1018 struct autri_dma **pp, *p; 1019 1020 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1021 if (KERNADDR(p) == ptr) { 1022 autri_freemem(sc, p); 1023 *pp = p->next; 1024 free(p, pool, 0); 1025 return; 1026 } 1027 } 1028 } 1029 1030 struct autri_dma * 1031 autri_find_dma(struct autri_softc *sc, void *addr) 1032 { 1033 struct autri_dma *p; 1034 1035 for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next) 1036 ; 1037 1038 return p; 1039 } 1040 1041 int 1042 autri_get_props(void *addr) 1043 { 1044 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1045 AUDIO_PROP_FULLDUPLEX); 1046 } 1047 1048 void 1049 autri_setup_channel(struct autri_softc *sc, int mode, struct audio_params *param) 1050 { 1051 int i, ch, channel; 1052 u_int32_t reg, cr[5]; 1053 u_int32_t cso, eso; 1054 u_int32_t delta, dch[2], ctrl; 1055 u_int32_t alpha_fms, fm_vol, attribute; 1056 1057 u_int32_t dmaaddr, dmalen; 1058 int factor, rvol, cvol; 1059 struct autri_chstatus *chst; 1060 1061 ctrl = AUTRI_CTRL_LOOPMODE; 1062 switch (param->encoding) { 1063 case AUDIO_ENCODING_SLINEAR_BE: 1064 case AUDIO_ENCODING_SLINEAR_LE: 1065 ctrl |= AUTRI_CTRL_SIGNED; 1066 break; 1067 } 1068 1069 factor = 0; 1070 if (param->precision == 16) { 1071 ctrl |= AUTRI_CTRL_16BIT; 1072 factor++; 1073 } 1074 1075 if (param->channels == 2) { 1076 ctrl |= AUTRI_CTRL_STEREO; 1077 factor++; 1078 } 1079 1080 delta = (u_int32_t)param->sample_rate; 1081 if (delta < 4000) 1082 delta = 4000; 1083 if (delta > 48000) 1084 delta = 48000; 1085 1086 attribute = 0; 1087 1088 dch[1] = ((delta << 12) / 48000) & 0x0000ffff; 1089 if (mode == AUMODE_PLAY) { 1090 chst = &sc->sc_play; 1091 dch[0] = ((delta << 12) / 48000) & 0x0000ffff; 1092 ctrl |= AUTRI_CTRL_WAVEVOL; 1093 /* 1094 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) 1095 ctrl |= 0x80000000; 1096 */ 1097 } else { 1098 chst = &sc->sc_rec; 1099 dch[0] = ((48000 << 12) / delta) & 0x0000ffff; 1100 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) { 1101 ctrl |= AUTRI_CTRL_MUTE_SIS; 1102 attribute = AUTRI_ATTR_PCMREC_SIS; 1103 if (delta != 48000) 1104 attribute |= AUTRI_ATTR_ENASRC_SIS; 1105 } 1106 ctrl |= AUTRI_CTRL_MUTE; 1107 } 1108 1109 dmaaddr = DMAADDR(chst->dma); 1110 cso = alpha_fms = 0; 1111 rvol = cvol = 0x7f; 1112 fm_vol = 0x0 | ((rvol & 0x7f) << 7) | (cvol & 0x7f); 1113 1114 for (ch=0; ch<2; ch++) { 1115 1116 if (ch == 0) 1117 dmalen = (chst->length >> factor); 1118 else { 1119 /* channel for interrupt */ 1120 dmalen = (chst->blksize >> factor); 1121 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 1122 ctrl |= AUTRI_CTRL_MUTE_SIS; 1123 else 1124 ctrl |= AUTRI_CTRL_MUTE; 1125 attribute = 0; 1126 } 1127 1128 eso = dmalen - 1; 1129 1130 switch (sc->sc_devid) { 1131 case AUTRI_DEVICE_ID_4DWAVE_DX: 1132 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1133 cr[1] = dmaaddr; 1134 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1135 cr[3] = fm_vol; 1136 cr[4] = ctrl; 1137 break; 1138 case AUTRI_DEVICE_ID_4DWAVE_NX: 1139 cr[0] = (dch[ch] << 24) | (cso & 0x00ffffff); 1140 cr[1] = dmaaddr; 1141 cr[2] = ((dch[ch] << 16) & 0xff000000) | (eso & 0x00ffffff); 1142 cr[3] = (alpha_fms << 16) | (fm_vol & 0x0000ffff); 1143 cr[4] = ctrl; 1144 break; 1145 case AUTRI_DEVICE_ID_SIS_7018: 1146 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1147 cr[1] = dmaaddr; 1148 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1149 cr[3] = attribute; 1150 cr[4] = ctrl; 1151 break; 1152 case AUTRI_DEVICE_ID_ALI_M5451: 1153 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1154 cr[1] = dmaaddr; 1155 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1156 cr[3] = 0; 1157 cr[4] = ctrl; 1158 break; 1159 } 1160 1161 /* write channel data */ 1162 channel = (ch == 0) ? chst->ch : chst->ch_intr; 1163 1164 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 1165 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | channel); 1166 1167 for (i=0; i<5; i++) { 1168 TWRITE4(sc, AUTRI_ARAM_CR + i*sizeof(cr[0]), cr[i]); 1169 DPRINTFN(5,("cr[%d] : 0x%08X\n", i, cr[i])); 1170 } 1171 1172 /* Bank A only */ 1173 if (channel < 0x20) { 1174 TWRITE4(sc, AUTRI_EBUF1, AUTRI_EMOD_STILL); 1175 TWRITE4(sc, AUTRI_EBUF2, AUTRI_EMOD_STILL); 1176 } 1177 } 1178 1179 } 1180 1181 int 1182 autri_trigger_output(void *addr, void *start, void *end, int blksize, 1183 void (*intr)(void *), void *arg, struct audio_params *param) 1184 { 1185 struct autri_softc *sc = addr; 1186 struct autri_dma *p; 1187 1188 DPRINTFN(5,("autri_trigger_output: sc=%p start=%p end=%p " 1189 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1190 1191 sc->sc_play.intr = intr; 1192 sc->sc_play.intr_arg = arg; 1193 sc->sc_play.offset = 0; 1194 sc->sc_play.blksize = blksize; 1195 sc->sc_play.length = (char *)end - (char *)start; 1196 1197 p = autri_find_dma(sc, start); 1198 if (!p) { 1199 printf("autri_trigger_output: bad addr %p\n", start); 1200 return (EINVAL); 1201 } 1202 1203 sc->sc_play.dma = p; 1204 1205 /* */ 1206 mtx_enter(&audio_lock); 1207 autri_setup_channel(sc, AUMODE_PLAY, param); 1208 1209 /* volume set to no attenuation */ 1210 TWRITE4(sc, AUTRI_MUSICVOL_WAVEVOL, 0); 1211 1212 /* enable interrupt */ 1213 autri_enable_interrupt(sc, sc->sc_play.ch_intr); 1214 1215 /* start channel */ 1216 autri_startch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 1217 mtx_leave(&audio_lock); 1218 return 0; 1219 } 1220 1221 int 1222 autri_trigger_input(void *addr, void *start, void *end, int blksize, void (*intr)(void *), void *arg, struct audio_params *param) 1223 { 1224 struct autri_softc *sc = addr; 1225 struct autri_dma *p; 1226 1227 DPRINTFN(5,("autri_trigger_input: sc=%p start=%p end=%p " 1228 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1229 1230 sc->sc_rec.intr = intr; 1231 sc->sc_rec.intr_arg = arg; 1232 sc->sc_rec.offset = 0; 1233 sc->sc_rec.blksize = blksize; 1234 sc->sc_rec.length = (char *)end - (char *)start; 1235 1236 /* */ 1237 p = autri_find_dma(sc, start); 1238 if (!p) { 1239 printf("autri_trigger_input: bad addr %p\n", start); 1240 return (EINVAL); 1241 } 1242 1243 sc->sc_rec.dma = p; 1244 mtx_enter(&audio_lock); 1245 1246 /* */ 1247 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 1248 autri_reg_set_4(sc, AUTRI_NX_ACR0, AUTRI_NX_ACR0_PSB_CAPTURE); 1249 TWRITE1(sc, AUTRI_NX_RCI3, AUTRI_NX_RCI3_ENABLE | sc->sc_rec.ch); 1250 } 1251 1252 #if 0 1253 /* 4DWAVE only allows capturing at a 48KHz rate */ 1254 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_DX || 1255 sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) 1256 param->sample_rate = 48000; 1257 #endif 1258 1259 autri_setup_channel(sc, AUMODE_RECORD, param); 1260 1261 /* enable interrupt */ 1262 autri_enable_interrupt(sc, sc->sc_rec.ch_intr); 1263 1264 /* start channel */ 1265 autri_startch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 1266 mtx_leave(&audio_lock); 1267 return 0; 1268 } 1269 1270 #if 0 1271 int 1272 autri_halt(struct autri_softc *sc) 1273 { 1274 DPRINTF(("autri_halt().\n")); 1275 /*autri_stopch(sc);*/ 1276 autri_disable_interrupt(sc, sc->sc_play.channel); 1277 autri_disable_interrupt(sc, sc->sc_rec.channel); 1278 return 0; 1279 } 1280 #endif 1281 1282 void 1283 autri_enable_interrupt(struct autri_softc *sc, int ch) 1284 { 1285 int reg; 1286 1287 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1288 ch &= 0x1f; 1289 1290 autri_reg_set_4(sc, reg, 1 << ch); 1291 } 1292 1293 void 1294 autri_disable_interrupt(struct autri_softc *sc, int ch) 1295 { 1296 int reg; 1297 1298 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1299 ch &= 0x1f; 1300 1301 autri_reg_clear_4(sc, reg, 1 << ch); 1302 } 1303 1304 void 1305 autri_startch(struct autri_softc *sc, int ch, int ch_intr) 1306 { 1307 int reg; 1308 u_int32_t chmask; 1309 1310 reg = (ch & 0x20) ? AUTRI_START_B : AUTRI_START_A; 1311 ch &= 0x1f; 1312 chmask = (1 << ch) | (1 << ch_intr); 1313 1314 autri_reg_set_4(sc, reg, chmask); 1315 } 1316 1317 void 1318 autri_stopch(struct autri_softc *sc, int ch, int ch_intr) 1319 { 1320 int reg; 1321 u_int32_t chmask; 1322 1323 reg = (ch & 0x20) ? AUTRI_STOP_B : AUTRI_STOP_A; 1324 ch &= 0x1f; 1325 chmask = (1 << ch) | (1 << ch_intr); 1326 1327 autri_reg_set_4(sc, reg, chmask); 1328 } 1329 1330 #if NMIDI > 0 1331 int 1332 autri_midi_open(void *addr, int flags, void (*iintr)(void *, int), 1333 void (*ointr)(void *), void *arg) 1334 { 1335 struct autri_softc *sc = addr; 1336 1337 DPRINTF(("autri_midi_open()\n")); 1338 1339 DPRINTFN(5,("MPUR1 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR1))); 1340 DPRINTFN(5,("MPUR2 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR2))); 1341 1342 sc->sc_iintr = iintr; 1343 sc->sc_ointr = ointr; 1344 sc->sc_arg = arg; 1345 1346 if (flags & FREAD) 1347 autri_reg_clear_1(sc, AUTRI_MPUR2, AUTRI_MIDIIN_ENABLE_INTR); 1348 1349 if (flags & FWRITE) 1350 autri_reg_set_1(sc, AUTRI_MPUR2, AUTRI_MIDIOUT_CONNECT); 1351 1352 return (0); 1353 } 1354 1355 void 1356 autri_midi_close(void *addr) 1357 { 1358 struct autri_softc *sc = addr; 1359 1360 DPRINTF(("autri_midi_close()\n")); 1361 1362 tsleep(sc, PWAIT, "autri", hz/10); /* give uart a chance to drain */ 1363 1364 sc->sc_iintr = NULL; 1365 sc->sc_ointr = NULL; 1366 } 1367 1368 int 1369 autri_midi_output(void *addr, int d) 1370 { 1371 struct autri_softc *sc = addr; 1372 1373 if ((TREAD1(sc, AUTRI_MPUR1) & AUTRI_MIDIOUT_READY) != 0) { 1374 TWRITE1(sc, AUTRI_MPUR0, d); 1375 return 0; 1376 } 1377 return 1; 1378 } 1379 1380 void 1381 autri_midi_getinfo(void *addr, struct midi_info *mi) 1382 { 1383 mi->name = "4DWAVE MIDI UART"; 1384 mi->props = MIDI_PROP_CAN_INPUT; 1385 } 1386 1387 #endif 1388