1 /* $OpenBSD: autri.c,v 1.30 2011/07/03 15:47:16 matthew Exp $ */ 2 3 /* 4 * Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Trident 4DWAVE-DX/NX, SiS 7018, ALi M5451 Sound Driver 30 * 31 * The register information is taken from the ALSA driver. 32 * 33 * Documentation links: 34 * - ftp://ftp.alsa-project.org/pub/manuals/trident/ 35 */ 36 37 #include "midi.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/fcntl.h> 43 #include <sys/malloc.h> 44 #include <sys/device.h> 45 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <sys/audioio.h> 51 #include <dev/audio_if.h> 52 #include <dev/midi_if.h> 53 #include <dev/mulaw.h> 54 #include <dev/auconv.h> 55 #include <dev/ic/ac97.h> 56 #include <dev/ic/mpuvar.h> 57 58 #include <machine/bus.h> 59 #include <machine/intr.h> 60 61 #include <dev/pci/autrireg.h> 62 #include <dev/pci/autrivar.h> 63 64 #ifdef AUDIO_DEBUG 65 # define DPRINTF(x) if (autridebug) printf x 66 # define DPRINTFN(n,x) if (autridebug > (n)) printf x 67 int autridebug = 0; 68 #else 69 # define DPRINTF(x) 70 # define DPRINTFN(n,x) 71 #endif 72 73 int autri_match(struct device *, void *, void *); 74 void autri_attach(struct device *, struct device *, void *); 75 int autri_activate(struct device *, int); 76 int autri_intr(void *); 77 78 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 79 #define KERNADDR(p) ((void *)((p)->addr)) 80 81 int autri_allocmem(struct autri_softc *, size_t, size_t, struct autri_dma *); 82 int autri_freemem(struct autri_softc *, struct autri_dma *); 83 84 #define TWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x)) 85 #define TWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x)) 86 #define TWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x)) 87 #define TREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r)) 88 #define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r)) 89 #define TREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r)) 90 91 static __inline void autri_reg_set_1(struct autri_softc *, int, uint8_t); 92 static __inline void autri_reg_clear_1(struct autri_softc *, int, uint8_t); 93 static __inline void autri_reg_set_4(struct autri_softc *, int, uint32_t); 94 static __inline void autri_reg_clear_4(struct autri_softc *, int, uint32_t); 95 96 int autri_attach_codec(void *sc, struct ac97_codec_if *); 97 int autri_read_codec(void *sc, u_int8_t a, u_int16_t *d); 98 int autri_write_codec(void *sc, u_int8_t a, u_int16_t d); 99 void autri_reset_codec(void *sc); 100 enum ac97_host_flags autri_flags_codec(void *); 101 102 int autri_init(void *sc); 103 struct autri_dma *autri_find_dma(struct autri_softc *, void *); 104 void autri_setup_channel(struct autri_softc *sc,int mode, 105 struct audio_params *param); 106 void autri_enable_interrupt(struct autri_softc *sc, int ch); 107 void autri_disable_interrupt(struct autri_softc *sc, int ch); 108 void autri_startch(struct autri_softc *sc, int ch, int ch_intr); 109 void autri_stopch(struct autri_softc *sc, int ch, int ch_intr); 110 void autri_enable_loop_interrupt(void *sc); 111 #if 0 112 void autri_disable_loop_interrupt(void *sc); 113 #endif 114 115 struct cfdriver autri_cd = { 116 NULL, "autri", DV_DULL 117 }; 118 119 struct cfattach autri_ca = { 120 sizeof(struct autri_softc), autri_match, autri_attach, NULL, 121 autri_activate 122 }; 123 124 int autri_open(void *, int); 125 void autri_close(void *); 126 int autri_query_encoding(void *, struct audio_encoding *); 127 int autri_set_params(void *, int, int, struct audio_params *, 128 struct audio_params *); 129 int autri_round_blocksize(void *, int); 130 int autri_trigger_output(void *, void *, void *, int, void (*)(void *), 131 void *, struct audio_params *); 132 int autri_trigger_input(void *, void *, void *, int, void (*)(void *), 133 void *, struct audio_params *); 134 int autri_halt_output(void *); 135 int autri_halt_input(void *); 136 int autri_getdev(void *, struct audio_device *); 137 int autri_mixer_set_port(void *, mixer_ctrl_t *); 138 int autri_mixer_get_port(void *, mixer_ctrl_t *); 139 void *autri_malloc(void *, int, size_t, int, int); 140 void autri_free(void *, void *, int); 141 paddr_t autri_mappage(void *, void *, off_t, int); 142 int autri_get_props(void *); 143 int autri_query_devinfo(void *addr, mixer_devinfo_t *dip); 144 145 int autri_get_portnum_by_name(struct autri_softc *, char *, char *, char *); 146 147 struct audio_hw_if autri_hw_if = { 148 autri_open, 149 autri_close, 150 NULL, /* drain */ 151 autri_query_encoding, 152 autri_set_params, 153 autri_round_blocksize, 154 NULL, /* commit_settings */ 155 NULL, /* init_output */ 156 NULL, /* init_input */ 157 NULL, /* start_output */ 158 NULL, /* start_input */ 159 autri_halt_output, 160 autri_halt_input, 161 NULL, /* speaker_ctl */ 162 autri_getdev, 163 NULL, /* setfd */ 164 autri_mixer_set_port, 165 autri_mixer_get_port, 166 autri_query_devinfo, 167 autri_malloc, 168 autri_free, 169 NULL, 170 autri_mappage, 171 autri_get_props, 172 autri_trigger_output, 173 autri_trigger_input, 174 NULL 175 }; 176 177 #if NMIDI > 0 178 void autri_midi_close(void *); 179 void autri_midi_getinfo(void *, struct midi_info *); 180 int autri_midi_open(void *, int, void (*)(void *, int), 181 void (*)(void *), void *); 182 int autri_midi_output(void *, int); 183 184 struct midi_hw_if autri_midi_hw_if = { 185 autri_midi_open, 186 autri_midi_close, 187 autri_midi_output, 188 NULL, /* flush */ 189 autri_midi_getinfo, 190 NULL, /* ioctl */ 191 }; 192 #endif 193 194 /* 195 * register set/clear bit 196 */ 197 static __inline void 198 autri_reg_set_1(sc, no, mask) 199 struct autri_softc *sc; 200 int no; 201 uint8_t mask; 202 { 203 bus_space_write_1(sc->memt, sc->memh, no, 204 (bus_space_read_1(sc->memt, sc->memh, no) | mask)); 205 } 206 207 static __inline void 208 autri_reg_clear_1(sc, no, mask) 209 struct autri_softc *sc; 210 int no; 211 uint8_t mask; 212 { 213 bus_space_write_1(sc->memt, sc->memh, no, 214 (bus_space_read_1(sc->memt, sc->memh, no) & ~mask)); 215 } 216 217 static __inline void 218 autri_reg_set_4(sc, no, mask) 219 struct autri_softc *sc; 220 int no; 221 uint32_t mask; 222 { 223 bus_space_write_4(sc->memt, sc->memh, no, 224 (bus_space_read_4(sc->memt, sc->memh, no) | mask)); 225 } 226 227 static __inline void 228 autri_reg_clear_4(sc, no, mask) 229 struct autri_softc *sc; 230 int no; 231 uint32_t mask; 232 { 233 bus_space_write_4(sc->memt, sc->memh, no, 234 (bus_space_read_4(sc->memt, sc->memh, no) & ~mask)); 235 } 236 237 /* 238 * AC97 codec 239 */ 240 int 241 autri_attach_codec(sc_, codec_if) 242 void *sc_; 243 struct ac97_codec_if *codec_if; 244 { 245 struct autri_codec_softc *sc = sc_; 246 247 DPRINTF(("autri_attach_codec()\n")); 248 249 sc->codec_if = codec_if; 250 return 0; 251 } 252 253 int 254 autri_read_codec(sc_, index, data) 255 void *sc_; 256 u_int8_t index; 257 u_int16_t *data; 258 { 259 struct autri_codec_softc *codec = sc_; 260 struct autri_softc *sc = codec->sc; 261 u_int32_t status, addr, cmd, busy; 262 u_int16_t count; 263 264 /*DPRINTF(("sc->sc->type : 0x%X",sc->sc->type));*/ 265 266 switch (sc->sc_devid) { 267 case AUTRI_DEVICE_ID_4DWAVE_DX: 268 addr = AUTRI_DX_ACR1; 269 cmd = AUTRI_DX_ACR1_CMD_READ; 270 busy = AUTRI_DX_ACR1_BUSY_READ; 271 break; 272 case AUTRI_DEVICE_ID_4DWAVE_NX: 273 addr = AUTRI_NX_ACR2; 274 cmd = AUTRI_NX_ACR2_CMD_READ; 275 busy = AUTRI_NX_ACR2_BUSY_READ | AUTRI_NX_ACR2_RECV_WAIT; 276 break; 277 case AUTRI_DEVICE_ID_SIS_7018: 278 addr = AUTRI_SIS_ACRD; 279 cmd = AUTRI_SIS_ACRD_CMD_READ; 280 busy = AUTRI_SIS_ACRD_BUSY_READ | AUTRI_SIS_ACRD_AUDIO_BUSY; 281 break; 282 case AUTRI_DEVICE_ID_ALI_M5451: 283 if (sc->sc_revision > 0x01) 284 addr = AUTRI_ALI_ACWR; 285 else 286 addr = AUTRI_ALI_ACRD; 287 cmd = AUTRI_ALI_ACRD_CMD_READ; 288 busy = AUTRI_ALI_ACRD_BUSY_READ; 289 break; 290 default: 291 printf("%s: autri_read_codec : unknown device\n", 292 sc->sc_dev.dv_xname); 293 return -1; 294 } 295 296 /* wait for 'Ready to Read' */ 297 for (count=0; count < 0xffff; count++) { 298 if ((TREAD4(sc, addr) & busy) == 0) 299 break; 300 DELAY(1); 301 } 302 303 if (count == 0xffff) { 304 printf("%s: Codec timeout. Busy reading AC97 codec.\n", 305 sc->sc_dev.dv_xname); 306 return -1; 307 } 308 309 /* send Read Command to AC97 */ 310 TWRITE4(sc, addr, (index & 0x7f) | cmd); 311 312 /* wait for 'Returned data is available' */ 313 for (count=0; count < 0xffff; count++) { 314 status = TREAD4(sc, addr); 315 if ((status & busy) == 0) 316 break; 317 DELAY(1); 318 } 319 320 if (count == 0xffff) { 321 printf("%s: Codec timeout. Busy reading AC97 codec.\n", 322 sc->sc_dev.dv_xname); 323 return -1; 324 } 325 326 *data = (status >> 16) & 0x0000ffff; 327 /*DPRINTF(("autri_read_codec(0x%X) return 0x%X\n",reg,*data));*/ 328 return 0; 329 } 330 331 int 332 autri_write_codec(sc_, index, data) 333 void *sc_; 334 u_int8_t index; 335 u_int16_t data; 336 { 337 struct autri_codec_softc *codec = sc_; 338 struct autri_softc *sc = codec->sc; 339 u_int32_t addr, cmd, busy; 340 u_int16_t count; 341 342 /*DPRINTF(("autri_write_codec(0x%X,0x%X)\n",index,data));*/ 343 344 switch (sc->sc_devid) { 345 case AUTRI_DEVICE_ID_4DWAVE_DX: 346 addr = AUTRI_DX_ACR0; 347 cmd = AUTRI_DX_ACR0_CMD_WRITE; 348 busy = AUTRI_DX_ACR0_BUSY_WRITE; 349 break; 350 case AUTRI_DEVICE_ID_4DWAVE_NX: 351 addr = AUTRI_NX_ACR1; 352 cmd = AUTRI_NX_ACR1_CMD_WRITE; 353 busy = AUTRI_NX_ACR1_BUSY_WRITE; 354 break; 355 case AUTRI_DEVICE_ID_SIS_7018: 356 addr = AUTRI_SIS_ACWR; 357 cmd = AUTRI_SIS_ACWR_CMD_WRITE; 358 busy = AUTRI_SIS_ACWR_BUSY_WRITE | AUTRI_SIS_ACWR_AUDIO_BUSY; 359 break; 360 case AUTRI_DEVICE_ID_ALI_M5451: 361 addr = AUTRI_ALI_ACWR; 362 cmd = AUTRI_ALI_ACWR_CMD_WRITE; 363 if (sc->sc_revision > 0x01) 364 cmd |= 0x0100; 365 busy = AUTRI_ALI_ACWR_BUSY_WRITE; 366 break; 367 default: 368 printf("%s: autri_write_codec : unknown device.\n", 369 sc->sc_dev.dv_xname); 370 return -1; 371 } 372 373 /* wait for 'Ready to Write' */ 374 for (count=0; count < 0xffff; count++) { 375 if ((TREAD4(sc, addr) & busy) == 0) 376 break; 377 DELAY(1); 378 } 379 380 if (count == 0xffff) { 381 printf("%s: Codec timeout. Busy writing AC97 codec\n", 382 sc->sc_dev.dv_xname); 383 return -1; 384 } 385 386 /* send Write Command to AC97 */ 387 TWRITE4(sc, addr, (data << 16) | (index & 0x7f) | cmd); 388 389 return 0; 390 } 391 392 void 393 autri_reset_codec(sc_) 394 void *sc_; 395 { 396 struct autri_codec_softc *codec = sc_; 397 struct autri_softc *sc = codec->sc; 398 u_int32_t reg, ready; 399 int addr, count = 200; 400 401 DPRINTF(("autri_reset_codec(codec=%p,sc=%p)\n",codec,sc)); 402 DPRINTF(("sc->sc_devid=%X\n",sc->sc_devid)); 403 404 switch (sc->sc_devid) { 405 case AUTRI_DEVICE_ID_4DWAVE_DX: 406 /* warm reset AC97 codec */ 407 autri_reg_set_4(sc, AUTRI_DX_ACR2, 1); 408 delay(100); 409 /* release reset */ 410 autri_reg_clear_4(sc, AUTRI_DX_ACR2, 1); 411 delay(100); 412 413 addr = AUTRI_DX_ACR2; 414 ready = AUTRI_DX_ACR2_CODEC_READY; 415 break; 416 case AUTRI_DEVICE_ID_4DWAVE_NX: 417 /* warm reset AC97 codec */ 418 autri_reg_set_4(sc, AUTRI_NX_ACR0, 1); 419 delay(100); 420 /* release reset */ 421 autri_reg_clear_4(sc, AUTRI_NX_ACR0, 1); 422 delay(100); 423 424 addr = AUTRI_NX_ACR0; 425 ready = AUTRI_NX_ACR0_CODEC_READY; 426 break; 427 case AUTRI_DEVICE_ID_SIS_7018: 428 /* warm reset AC97 codec */ 429 autri_reg_set_4(sc, AUTRI_SIS_SCTRL, 2); 430 delay(1000); 431 /* release reset (warm & cold) */ 432 autri_reg_clear_4(sc, AUTRI_SIS_SCTRL, 3); 433 delay(2000); 434 435 addr = AUTRI_SIS_SCTRL; 436 ready = AUTRI_SIS_SCTRL_CODEC_READY; 437 break; 438 case AUTRI_DEVICE_ID_ALI_M5451: 439 /* warm reset AC97 codec */ 440 autri_reg_set_4(sc, AUTRI_ALI_SCTRL, 1); 441 delay(100); 442 /* release reset (warm & cold) */ 443 autri_reg_clear_4(sc, AUTRI_ALI_SCTRL, 3); 444 delay(100); 445 446 addr = AUTRI_ALI_SCTRL; 447 ready = AUTRI_ALI_SCTRL_CODEC_READY; 448 break; 449 } 450 451 /* wait for 'Codec Ready' */ 452 while (count--) { 453 reg = TREAD4(sc, addr); 454 if (reg & ready) 455 break; 456 delay(1000); 457 } 458 459 if (count == 0) 460 printf("%s: Codec timeout. AC97 is not ready for operation.\n", 461 sc->sc_dev.dv_xname); 462 } 463 464 enum ac97_host_flags 465 autri_flags_codec(void *v) 466 { 467 struct autri_codec_softc *sc = v; 468 469 return (sc->flags); 470 } 471 472 /* 473 * 474 */ 475 const struct pci_matchid autri_devices[] = { 476 { PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_4DWAVE_NX }, 477 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7018 }, 478 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5451 } 479 }; 480 481 int 482 autri_match(parent, match, aux) 483 struct device *parent; 484 void *match; 485 void *aux; 486 { 487 struct pci_attach_args *pa = aux; 488 489 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_TRIDENT && 490 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_TRIDENT_4DWAVE_DX) { 491 /* 492 * IBM makes a pcn network card and improperly 493 * sets the vendor and product ID's. Avoid matching. 494 */ 495 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_NETWORK) 496 return (0); 497 else 498 return (1); 499 } 500 501 return (pci_matchbyid((struct pci_attach_args *)aux, autri_devices, 502 nitems(autri_devices))); 503 } 504 505 void 506 autri_attach(parent, self, aux) 507 struct device *parent; 508 struct device *self; 509 void *aux; 510 { 511 struct autri_softc *sc = (struct autri_softc *)self; 512 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 513 pci_chipset_tag_t pc = pa->pa_pc; 514 struct autri_codec_softc *codec; 515 bus_size_t iosize; 516 pci_intr_handle_t ih; 517 char const *intrstr; 518 mixer_ctrl_t ctl; 519 int i, r; 520 521 sc->sc_devid = pa->pa_id; 522 sc->sc_class = pa->pa_class; 523 sc->sc_revision = PCI_REVISION(pa->pa_class); 524 525 /* map register to memory */ 526 if (pci_mapreg_map(pa, AUTRI_PCI_MEMORY_BASE, 527 PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, &iosize, 0)) { 528 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname); 529 return; 530 } 531 532 /* map and establish the interrupt */ 533 if (pci_intr_map(pa, &ih)) { 534 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 535 bus_space_unmap(sc->memt, sc->memh, iosize); 536 return; 537 } 538 intrstr = pci_intr_string(pc, ih); 539 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, autri_intr, sc, 540 sc->sc_dev.dv_xname); 541 if (sc->sc_ih == NULL) { 542 printf("%s: couldn't establish interrupt", 543 sc->sc_dev.dv_xname); 544 if (intrstr != NULL) 545 printf(" at %s", intrstr); 546 printf("\n"); 547 bus_space_unmap(sc->memt, sc->memh, iosize); 548 return; 549 } 550 printf(": %s\n", intrstr); 551 552 sc->sc_dmatag = pa->pa_dmat; 553 sc->sc_pc = pc; 554 sc->sc_pt = pa->pa_tag; 555 556 /* initialize the device */ 557 autri_init(sc); 558 559 /* attach AC97 codec */ 560 codec = &sc->sc_codec; 561 memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev)); 562 codec->sc = sc; 563 564 codec->host_if.arg = codec; 565 codec->host_if.attach = autri_attach_codec; 566 codec->host_if.reset = autri_reset_codec; 567 codec->host_if.read = autri_read_codec; 568 codec->host_if.write = autri_write_codec; 569 codec->host_if.flags = autri_flags_codec; 570 codec->flags = AC97_HOST_DONT_READ | AC97_HOST_SWAPPED_CHANNELS; 571 if (sc->sc_dev.dv_cfdata->cf_flags & 0x0001) 572 codec->flags &= ~AC97_HOST_SWAPPED_CHANNELS; 573 574 if ((r = ac97_attach(&codec->host_if)) != 0) { 575 printf("%s: can't attach codec (error 0x%X)\n", 576 sc->sc_dev.dv_xname, r); 577 pci_intr_disestablish(pc, sc->sc_ih); 578 bus_space_unmap(sc->memt, sc->memh, iosize); 579 return; 580 } 581 582 /* disable mutes */ 583 for (i = 0; i < 4; i++) { 584 static struct { 585 char *class, *device; 586 } d[] = { 587 { AudioCoutputs, AudioNmaster}, 588 { AudioCinputs, AudioNdac}, 589 { AudioCinputs, AudioNcd}, 590 { AudioCrecord, AudioNvolume}, 591 }; 592 593 ctl.type = AUDIO_MIXER_ENUM; 594 ctl.un.ord = 0; 595 596 #if 0 597 ctl.dev = sc->sc_codec.codec_if->vtbl->get_portnum_by_name(sc->sc_codec.codec_if, 598 d[i].class, d[i].device, AudioNmute); 599 #endif 600 ctl.dev = autri_get_portnum_by_name(sc,d[i].class, 601 d[i].device, AudioNmute); 602 autri_mixer_set_port(sc, &ctl); 603 } 604 605 /* set a reasonable default volume */ 606 ctl.type = AUDIO_MIXER_VALUE; 607 ctl.un.value.num_channels = 2; 608 ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 609 ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 127; 610 611 ctl.dev = autri_get_portnum_by_name(sc,AudioCoutputs,AudioNmaster,NULL); 612 autri_mixer_set_port(sc, &ctl); 613 614 audio_attach_mi(&autri_hw_if, sc, &sc->sc_dev); 615 616 #if NMIDI > 0 617 midi_attach_mi(&autri_midi_hw_if, sc, &sc->sc_dev); 618 #endif 619 } 620 621 int 622 autri_activate(struct device *self, int act) 623 { 624 struct autri_softc *sc = (struct autri_softc *)self; 625 int rv = 0; 626 627 switch (act) { 628 case DVACT_QUIESCE: 629 rv = config_activate_children(self, act); 630 break; 631 case DVACT_SUSPEND: 632 break; 633 case DVACT_RESUME: 634 autri_init(sc); 635 ac97_resume(&sc->sc_codec.host_if, sc->sc_codec.codec_if); 636 rv = config_activate_children(self, act); 637 break; 638 case DVACT_DEACTIVATE: 639 break; 640 } 641 return (rv); 642 } 643 644 int 645 autri_init(sc_) 646 void *sc_; 647 { 648 struct autri_softc *sc = sc_; 649 pcireg_t reg; 650 651 pci_chipset_tag_t pc = sc->sc_pc; 652 pcitag_t pt = sc->sc_pt; 653 654 DPRINTF(("in autri_init()\n")); 655 DPRINTFN(5,("pci_conf_read(0x40) : 0x%X\n",pci_conf_read(pc,pt,0x40))); 656 DPRINTFN(5,("pci_conf_read(0x44) : 0x%X\n",pci_conf_read(pc,pt,0x44))); 657 658 switch (sc->sc_devid) { 659 case AUTRI_DEVICE_ID_4DWAVE_DX: 660 /* disable Legacy Control */ 661 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 662 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 663 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 664 delay(100); 665 /* audio engine reset */ 666 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 667 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00040000); 668 delay(100); 669 /* release reset */ 670 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 671 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 672 delay(100); 673 /* DAC on */ 674 autri_reg_set_4(sc,AUTRI_DX_ACR2,0x02); 675 break; 676 case AUTRI_DEVICE_ID_4DWAVE_NX: 677 /* disable Legacy Control */ 678 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 679 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 680 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 681 delay(100); 682 /* audio engine reset */ 683 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 684 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00010000); 685 delay(100); 686 /* release reset */ 687 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 688 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00010000); 689 delay(100); 690 /* DAC on */ 691 autri_reg_set_4(sc,AUTRI_NX_ACR0,0x02); 692 break; 693 case AUTRI_DEVICE_ID_SIS_7018: 694 /* disable Legacy Control */ 695 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 696 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 697 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 698 delay(100); 699 /* reset Digital Controller */ 700 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 701 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 702 delay(100); 703 /* release reset */ 704 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 705 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 706 delay(100); 707 /* disable AC97 GPIO interrupt */ 708 TWRITE1(sc, AUTRI_SIS_ACGPIO, 0); 709 /* enable 64 channel mode */ 710 autri_reg_set_4(sc, AUTRI_LFO_GC_CIR, BANK_B_EN); 711 break; 712 case AUTRI_DEVICE_ID_ALI_M5451: 713 /* disable Legacy Control */ 714 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 715 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 716 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 717 delay(100); 718 /* reset Digital Controller */ 719 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 720 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 721 delay(100); 722 /* release reset */ 723 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 724 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 725 delay(100); 726 /* enable PCM input */ 727 autri_reg_set_4(sc, AUTRI_ALI_GCONTROL, AUTRI_ALI_GCONTROL_PCM_IN); 728 break; 729 } 730 731 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 732 sc->sc_play.ch = 0; 733 sc->sc_play.ch_intr = 1; 734 sc->sc_rec.ch = 31; 735 sc->sc_rec.ch_intr = 2; 736 } else { 737 sc->sc_play.ch = 0x20; 738 sc->sc_play.ch_intr = 0x21; 739 sc->sc_rec.ch = 0x22; 740 sc->sc_rec.ch_intr = 0x23; 741 } 742 743 /* clear channel status */ 744 TWRITE4(sc, AUTRI_STOP_A, 0xffffffff); 745 TWRITE4(sc, AUTRI_STOP_B, 0xffffffff); 746 747 /* disable channel interrupt */ 748 TWRITE4(sc, AUTRI_AINTEN_A, 0); 749 TWRITE4(sc, AUTRI_AINTEN_B, 0); 750 751 #if 0 752 /* TLB */ 753 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 754 TWRITE4(sc,AUTRI_NX_TLBC,0); 755 } 756 #endif 757 758 autri_enable_loop_interrupt(sc); 759 760 DPRINTF(("out autri_init()\n")); 761 return 0; 762 } 763 764 void 765 autri_enable_loop_interrupt(sc_) 766 void *sc_; 767 { 768 struct autri_softc *sc = sc_; 769 u_int32_t reg; 770 771 /*reg = (ENDLP_IE | MIDLP_IE);*/ 772 reg = ENDLP_IE; 773 #if 0 774 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 775 reg |= BANK_B_EN; 776 #endif 777 autri_reg_set_4(sc,AUTRI_LFO_GC_CIR,reg); 778 } 779 780 #if 0 781 void 782 autri_disable_loop_interrupt(sc_) 783 void *sc_; 784 { 785 struct autri_softc *sc = sc_; 786 u_int32_t reg; 787 788 reg = (ENDLP_IE | MIDLP_IE); 789 autri_reg_clear_4(sc,AUTRI_LFO_GC_CIR,reg); 790 } 791 #endif 792 793 int 794 autri_intr(p) 795 void *p; 796 { 797 struct autri_softc *sc = p; 798 u_int32_t intsrc; 799 u_int32_t mask, active[2]; 800 int ch, endch; 801 /* 802 u_int32_t reg; 803 u_int32_t cso,eso; 804 */ 805 806 intsrc = TREAD4(sc,AUTRI_MISCINT); 807 if ((intsrc & (ADDRESS_IRQ|MPU401_IRQ)) == 0) 808 return 0; 809 810 if (intsrc & ADDRESS_IRQ) { 811 812 active[0] = TREAD4(sc,AUTRI_AIN_A); 813 active[1] = TREAD4(sc,AUTRI_AIN_B); 814 815 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 816 endch = 32; 817 } else { 818 endch = 64; 819 } 820 821 for (ch=0; ch<endch; ch++) { 822 mask = 1 << (ch & 0x1f); 823 if (active[(ch & 0x20) ? 1 : 0] & mask) { 824 825 /* clear interrupt */ 826 TWRITE4(sc, (ch & 0x20) ? AUTRI_AIN_B : AUTRI_AIN_A, mask); 827 /* disable interrupt */ 828 autri_reg_clear_4(sc,(ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 829 #if 0 830 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 831 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | ch); 832 833 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 834 cso = TREAD4(sc, 0xe0) & 0x00ffffff; 835 eso = TREAD4(sc, 0xe8) & 0x00ffffff; 836 } else { 837 cso = (TREAD4(sc, 0xe0) >> 16) & 0x0000ffff; 838 eso = (TREAD4(sc, 0xe8) >> 16) & 0x0000ffff; 839 } 840 /*printf("cso=%d, eso=%d\n",cso,eso);*/ 841 #endif 842 if (ch == sc->sc_play.ch_intr) { 843 if (sc->sc_play.intr) 844 sc->sc_play.intr(sc->sc_play.intr_arg); 845 } 846 847 if (ch == sc->sc_rec.ch_intr) { 848 if (sc->sc_rec.intr) 849 sc->sc_rec.intr(sc->sc_rec.intr_arg); 850 } 851 852 /* enable interrupt */ 853 autri_reg_set_4(sc, (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 854 } 855 } 856 } 857 858 if (intsrc & MPU401_IRQ) { 859 /* XXX */ 860 } 861 862 autri_reg_set_4(sc,AUTRI_MISCINT, 863 ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW); 864 865 return 1; 866 } 867 868 /* 869 * 870 */ 871 872 int 873 autri_allocmem(sc, size, align, p) 874 struct autri_softc *sc; 875 size_t size; 876 size_t align; 877 struct autri_dma *p; 878 { 879 int error; 880 881 p->size = size; 882 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 883 p->segs, nitems(p->segs), &p->nsegs, BUS_DMA_NOWAIT); 884 if (error) 885 return (error); 886 887 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 888 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 889 if (error) 890 goto free; 891 892 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 893 0, BUS_DMA_NOWAIT, &p->map); 894 if (error) 895 goto unmap; 896 897 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 898 BUS_DMA_NOWAIT); 899 if (error) 900 goto destroy; 901 return (0); 902 903 destroy: 904 bus_dmamap_destroy(sc->sc_dmatag, p->map); 905 unmap: 906 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 907 free: 908 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 909 return (error); 910 } 911 912 int 913 autri_freemem(sc, p) 914 struct autri_softc *sc; 915 struct autri_dma *p; 916 { 917 bus_dmamap_unload(sc->sc_dmatag, p->map); 918 bus_dmamap_destroy(sc->sc_dmatag, p->map); 919 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 920 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 921 return 0; 922 } 923 924 int 925 autri_open(addr, flags) 926 void *addr; 927 int flags; 928 { 929 DPRINTF(("autri_open()\n")); 930 DPRINTFN(5,("MISCINT : 0x%08X\n", 931 TREAD4((struct autri_softc *)addr, AUTRI_MISCINT))); 932 DPRINTFN(5,("LFO_GC_CIR : 0x%08X\n", 933 TREAD4((struct autri_softc *)addr, AUTRI_LFO_GC_CIR))); 934 return 0; 935 } 936 937 void 938 autri_close(addr) 939 void *addr; 940 { 941 DPRINTF(("autri_close()\n")); 942 } 943 944 int 945 autri_query_encoding(addr, fp) 946 void *addr; 947 struct audio_encoding *fp; 948 { 949 switch (fp->index) { 950 case 0: 951 strlcpy(fp->name, AudioEulinear, sizeof fp->name); 952 fp->encoding = AUDIO_ENCODING_ULINEAR; 953 fp->precision = 8; 954 fp->flags = 0; 955 break; 956 case 1: 957 strlcpy(fp->name, AudioEmulaw, sizeof fp->name); 958 fp->encoding = AUDIO_ENCODING_ULAW; 959 fp->precision = 8; 960 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 961 break; 962 case 2: 963 strlcpy(fp->name, AudioEalaw, sizeof fp->name); 964 fp->encoding = AUDIO_ENCODING_ALAW; 965 fp->precision = 8; 966 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 967 break; 968 case 3: 969 strlcpy(fp->name, AudioEslinear, sizeof fp->name); 970 fp->encoding = AUDIO_ENCODING_SLINEAR; 971 fp->precision = 8; 972 fp->flags = 0; 973 break; 974 case 4: 975 strlcpy(fp->name, AudioEslinear_le, sizeof fp->name); 976 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 977 fp->precision = 16; 978 fp->flags = 0; 979 break; 980 case 5: 981 strlcpy(fp->name, AudioEulinear_le, sizeof fp->name); 982 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 983 fp->precision = 16; 984 fp->flags = 0; 985 break; 986 case 6: 987 strlcpy(fp->name, AudioEslinear_be, sizeof fp->name); 988 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 989 fp->precision = 16; 990 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 991 break; 992 case 7: 993 strlcpy(fp->name, AudioEulinear_be, sizeof fp->name); 994 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 995 fp->precision = 16; 996 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 997 break; 998 default: 999 return (EINVAL); 1000 } 1001 fp->bps = AUDIO_BPS(fp->precision); 1002 fp->msb = 1; 1003 1004 return 0; 1005 } 1006 1007 int 1008 autri_set_params(addr, setmode, usemode, play, rec) 1009 void *addr; 1010 int setmode, usemode; 1011 struct audio_params *play, *rec; 1012 { 1013 struct audio_params *p; 1014 int mode; 1015 1016 for (mode = AUMODE_RECORD; mode != -1; 1017 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1018 if ((setmode & mode) == 0) 1019 continue; 1020 1021 p = mode == AUMODE_PLAY ? play : rec; 1022 if (p->sample_rate < 4000) 1023 p->sample_rate = 4000; 1024 if (p->sample_rate > 48000) 1025 p->sample_rate = 48000; 1026 if (p->precision > 16) 1027 p->precision = 16; 1028 if (p->channels > 2) 1029 p->channels = 2; 1030 p->factor = 1; 1031 p->sw_code = 0; 1032 switch (p->encoding) { 1033 case AUDIO_ENCODING_SLINEAR_BE: 1034 case AUDIO_ENCODING_ULINEAR_BE: 1035 if (p->precision == 16) 1036 p->sw_code = swap_bytes; 1037 break; 1038 case AUDIO_ENCODING_SLINEAR_LE: 1039 case AUDIO_ENCODING_ULINEAR_LE: 1040 break; 1041 case AUDIO_ENCODING_ULAW: 1042 if (mode == AUMODE_PLAY) 1043 p->sw_code = mulaw_to_ulinear8; 1044 else 1045 p->sw_code = ulinear8_to_mulaw; 1046 1047 break; 1048 case AUDIO_ENCODING_ALAW: 1049 if (mode == AUMODE_PLAY) 1050 p->sw_code = alaw_to_ulinear8; 1051 else 1052 p->sw_code = ulinear8_to_alaw; 1053 1054 break; 1055 default: 1056 return (EINVAL); 1057 } 1058 p->bps = AUDIO_BPS(p->precision); 1059 p->msb = 1; 1060 } 1061 1062 return 0; 1063 } 1064 1065 int 1066 autri_round_blocksize(addr, block) 1067 void *addr; 1068 int block; 1069 { 1070 return ((block + 3) & -4); 1071 } 1072 1073 int 1074 autri_halt_output(addr) 1075 void *addr; 1076 { 1077 struct autri_softc *sc = addr; 1078 1079 DPRINTF(("autri_halt_output()\n")); 1080 1081 sc->sc_play.intr = NULL; 1082 autri_stopch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 1083 autri_disable_interrupt(sc, sc->sc_play.ch_intr); 1084 1085 return 0; 1086 } 1087 1088 int 1089 autri_halt_input(addr) 1090 void *addr; 1091 { 1092 struct autri_softc *sc = addr; 1093 1094 DPRINTF(("autri_halt_input()\n")); 1095 1096 sc->sc_rec.intr = NULL; 1097 autri_stopch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 1098 autri_disable_interrupt(sc, sc->sc_rec.ch_intr); 1099 1100 return 0; 1101 } 1102 1103 int 1104 autri_getdev(addr, retp) 1105 void *addr; 1106 struct audio_device *retp; 1107 { 1108 struct autri_softc *sc = addr; 1109 1110 DPRINTF(("autri_getdev().\n")); 1111 1112 strncpy(retp->name, "Trident 4DWAVE", sizeof(retp->name)); 1113 snprintf(retp->version, sizeof(retp->version), "0x%02x", 1114 PCI_REVISION(sc->sc_class)); 1115 1116 switch (sc->sc_devid) { 1117 case AUTRI_DEVICE_ID_4DWAVE_DX: 1118 strncpy(retp->config, "4DWAVE-DX", sizeof(retp->config)); 1119 break; 1120 case AUTRI_DEVICE_ID_4DWAVE_NX: 1121 strncpy(retp->config, "4DWAVE-NX", sizeof(retp->config)); 1122 break; 1123 case AUTRI_DEVICE_ID_SIS_7018: 1124 strncpy(retp->config, "SiS 7018", sizeof(retp->config)); 1125 break; 1126 case AUTRI_DEVICE_ID_ALI_M5451: 1127 strncpy(retp->config, "ALi M5451", sizeof(retp->config)); 1128 break; 1129 default: 1130 strncpy(retp->config, "unknown", sizeof(retp->config)); 1131 } 1132 1133 return 0; 1134 } 1135 1136 int 1137 autri_mixer_set_port(addr, cp) 1138 void *addr; 1139 mixer_ctrl_t *cp; 1140 { 1141 struct autri_softc *sc = addr; 1142 1143 return (sc->sc_codec.codec_if->vtbl->mixer_set_port( 1144 sc->sc_codec.codec_if, cp)); 1145 } 1146 1147 int 1148 autri_mixer_get_port(addr, cp) 1149 void *addr; 1150 mixer_ctrl_t *cp; 1151 { 1152 struct autri_softc *sc = addr; 1153 1154 return (sc->sc_codec.codec_if->vtbl->mixer_get_port( 1155 sc->sc_codec.codec_if, cp)); 1156 } 1157 1158 int 1159 autri_query_devinfo(addr, dip) 1160 void *addr; 1161 mixer_devinfo_t *dip; 1162 { 1163 struct autri_softc *sc = addr; 1164 1165 return (sc->sc_codec.codec_if->vtbl->query_devinfo( 1166 sc->sc_codec.codec_if, dip)); 1167 } 1168 1169 int 1170 autri_get_portnum_by_name(sc, class, device, qualifier) 1171 struct autri_softc *sc; 1172 char *class, *device, *qualifier; 1173 { 1174 return (sc->sc_codec.codec_if->vtbl->get_portnum_by_name( 1175 sc->sc_codec.codec_if, class, device, qualifier)); 1176 } 1177 1178 void * 1179 autri_malloc(addr, direction, size, pool, flags) 1180 void *addr; 1181 int direction; 1182 size_t size; 1183 int pool, flags; 1184 { 1185 struct autri_softc *sc = addr; 1186 struct autri_dma *p; 1187 int error; 1188 1189 p = malloc(sizeof(*p), pool, flags); 1190 if (!p) 1191 return NULL; 1192 1193 #if 0 1194 error = autri_allocmem(sc, size, 16, p); 1195 #endif 1196 error = autri_allocmem(sc, size, 0x10000, p); 1197 if (error) { 1198 free(p, pool); 1199 return NULL; 1200 } 1201 1202 p->next = sc->sc_dmas; 1203 sc->sc_dmas = p; 1204 return KERNADDR(p); 1205 } 1206 1207 void 1208 autri_free(addr, ptr, pool) 1209 void *addr; 1210 void *ptr; 1211 int pool; 1212 { 1213 struct autri_softc *sc = addr; 1214 struct autri_dma **pp, *p; 1215 1216 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1217 if (KERNADDR(p) == ptr) { 1218 autri_freemem(sc, p); 1219 *pp = p->next; 1220 free(p, pool); 1221 return; 1222 } 1223 } 1224 } 1225 1226 struct autri_dma * 1227 autri_find_dma(sc, addr) 1228 struct autri_softc *sc; 1229 void *addr; 1230 { 1231 struct autri_dma *p; 1232 1233 for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next) 1234 ; 1235 1236 return p; 1237 } 1238 1239 paddr_t 1240 autri_mappage(addr, mem, off, prot) 1241 void *addr; 1242 void *mem; 1243 off_t off; 1244 int prot; 1245 { 1246 struct autri_softc *sc = addr; 1247 struct autri_dma *p; 1248 1249 if (off < 0) 1250 return (-1); 1251 1252 p = autri_find_dma(sc, mem); 1253 if (!p) 1254 return (-1); 1255 1256 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1257 off, prot, BUS_DMA_WAITOK)); 1258 } 1259 1260 int 1261 autri_get_props(addr) 1262 void *addr; 1263 { 1264 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1265 AUDIO_PROP_FULLDUPLEX); 1266 } 1267 1268 void 1269 autri_setup_channel(sc, mode, param) 1270 struct autri_softc *sc; 1271 int mode; 1272 struct audio_params *param; 1273 { 1274 int i, ch, channel; 1275 u_int32_t reg, cr[5]; 1276 u_int32_t cso, eso; 1277 u_int32_t delta, dch[2], ctrl; 1278 u_int32_t alpha_fms, fm_vol, attribute; 1279 1280 u_int32_t dmaaddr, dmalen; 1281 int factor, rvol, cvol; 1282 struct autri_chstatus *chst; 1283 1284 ctrl = AUTRI_CTRL_LOOPMODE; 1285 switch (param->encoding) { 1286 case AUDIO_ENCODING_SLINEAR_BE: 1287 case AUDIO_ENCODING_SLINEAR_LE: 1288 ctrl |= AUTRI_CTRL_SIGNED; 1289 break; 1290 } 1291 1292 factor = 0; 1293 if (param->precision == 16) { 1294 ctrl |= AUTRI_CTRL_16BIT; 1295 factor++; 1296 } 1297 1298 if (param->channels == 2) { 1299 ctrl |= AUTRI_CTRL_STEREO; 1300 factor++; 1301 } 1302 1303 delta = (u_int32_t)param->sample_rate; 1304 if (delta < 4000) 1305 delta = 4000; 1306 if (delta > 48000) 1307 delta = 48000; 1308 1309 attribute = 0; 1310 1311 dch[1] = ((delta << 12) / 48000) & 0x0000ffff; 1312 if (mode == AUMODE_PLAY) { 1313 chst = &sc->sc_play; 1314 dch[0] = ((delta << 12) / 48000) & 0x0000ffff; 1315 ctrl |= AUTRI_CTRL_WAVEVOL; 1316 /* 1317 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) 1318 ctrl |= 0x80000000; 1319 */ 1320 } else { 1321 chst = &sc->sc_rec; 1322 dch[0] = ((48000 << 12) / delta) & 0x0000ffff; 1323 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) { 1324 ctrl |= AUTRI_CTRL_MUTE_SIS; 1325 attribute = AUTRI_ATTR_PCMREC_SIS; 1326 if (delta != 48000) 1327 attribute |= AUTRI_ATTR_ENASRC_SIS; 1328 } 1329 ctrl |= AUTRI_CTRL_MUTE; 1330 } 1331 1332 dmaaddr = DMAADDR(chst->dma); 1333 cso = alpha_fms = 0; 1334 rvol = cvol = 0x7f; 1335 fm_vol = 0x0 | ((rvol & 0x7f) << 7) | (cvol & 0x7f); 1336 1337 for (ch=0; ch<2; ch++) { 1338 1339 if (ch == 0) 1340 dmalen = (chst->length >> factor); 1341 else { 1342 /* channel for interrupt */ 1343 dmalen = (chst->blksize >> factor); 1344 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 1345 ctrl |= AUTRI_CTRL_MUTE_SIS; 1346 else 1347 ctrl |= AUTRI_CTRL_MUTE; 1348 attribute = 0; 1349 } 1350 1351 eso = dmalen - 1; 1352 1353 switch (sc->sc_devid) { 1354 case AUTRI_DEVICE_ID_4DWAVE_DX: 1355 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1356 cr[1] = dmaaddr; 1357 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1358 cr[3] = fm_vol; 1359 cr[4] = ctrl; 1360 break; 1361 case AUTRI_DEVICE_ID_4DWAVE_NX: 1362 cr[0] = (dch[ch] << 24) | (cso & 0x00ffffff); 1363 cr[1] = dmaaddr; 1364 cr[2] = ((dch[ch] << 16) & 0xff000000) | (eso & 0x00ffffff); 1365 cr[3] = (alpha_fms << 16) | (fm_vol & 0x0000ffff); 1366 cr[4] = ctrl; 1367 break; 1368 case AUTRI_DEVICE_ID_SIS_7018: 1369 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1370 cr[1] = dmaaddr; 1371 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1372 cr[3] = attribute; 1373 cr[4] = ctrl; 1374 break; 1375 case AUTRI_DEVICE_ID_ALI_M5451: 1376 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1377 cr[1] = dmaaddr; 1378 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1379 cr[3] = 0; 1380 cr[4] = ctrl; 1381 break; 1382 } 1383 1384 /* write channel data */ 1385 channel = (ch == 0) ? chst->ch : chst->ch_intr; 1386 1387 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 1388 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | channel); 1389 1390 for (i=0; i<5; i++) { 1391 TWRITE4(sc, AUTRI_ARAM_CR + i*sizeof(cr[0]), cr[i]); 1392 DPRINTFN(5,("cr[%d] : 0x%08X\n", i, cr[i])); 1393 } 1394 1395 /* Bank A only */ 1396 if (channel < 0x20) { 1397 TWRITE4(sc, AUTRI_EBUF1, AUTRI_EMOD_STILL); 1398 TWRITE4(sc, AUTRI_EBUF2, AUTRI_EMOD_STILL); 1399 } 1400 } 1401 1402 } 1403 1404 int 1405 autri_trigger_output(addr, start, end, blksize, intr, arg, param) 1406 void *addr; 1407 void *start, *end; 1408 int blksize; 1409 void (*intr)(void *); 1410 void *arg; 1411 struct audio_params *param; 1412 { 1413 struct autri_softc *sc = addr; 1414 struct autri_dma *p; 1415 1416 DPRINTFN(5,("autri_trigger_output: sc=%p start=%p end=%p " 1417 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1418 1419 sc->sc_play.intr = intr; 1420 sc->sc_play.intr_arg = arg; 1421 sc->sc_play.offset = 0; 1422 sc->sc_play.blksize = blksize; 1423 sc->sc_play.length = (char *)end - (char *)start; 1424 1425 p = autri_find_dma(sc, start); 1426 if (!p) { 1427 printf("autri_trigger_output: bad addr %p\n", start); 1428 return (EINVAL); 1429 } 1430 1431 sc->sc_play.dma = p; 1432 1433 /* */ 1434 autri_setup_channel(sc, AUMODE_PLAY, param); 1435 1436 /* volume set to no attenuation */ 1437 TWRITE4(sc, AUTRI_MUSICVOL_WAVEVOL, 0); 1438 1439 /* enable interrupt */ 1440 autri_enable_interrupt(sc, sc->sc_play.ch_intr); 1441 1442 /* start channel */ 1443 autri_startch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 1444 1445 return 0; 1446 } 1447 1448 int 1449 autri_trigger_input(addr, start, end, blksize, intr, arg, param) 1450 void *addr; 1451 void *start, *end; 1452 int blksize; 1453 void (*intr)(void *); 1454 void *arg; 1455 struct audio_params *param; 1456 { 1457 struct autri_softc *sc = addr; 1458 struct autri_dma *p; 1459 1460 DPRINTFN(5,("autri_trigger_input: sc=%p start=%p end=%p " 1461 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1462 1463 sc->sc_rec.intr = intr; 1464 sc->sc_rec.intr_arg = arg; 1465 sc->sc_rec.offset = 0; 1466 sc->sc_rec.blksize = blksize; 1467 sc->sc_rec.length = (char *)end - (char *)start; 1468 1469 /* */ 1470 p = autri_find_dma(sc, start); 1471 if (!p) { 1472 printf("autri_trigger_input: bad addr %p\n", start); 1473 return (EINVAL); 1474 } 1475 1476 sc->sc_rec.dma = p; 1477 1478 /* */ 1479 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 1480 autri_reg_set_4(sc, AUTRI_NX_ACR0, AUTRI_NX_ACR0_PSB_CAPTURE); 1481 TWRITE1(sc, AUTRI_NX_RCI3, AUTRI_NX_RCI3_ENABLE | sc->sc_rec.ch); 1482 } 1483 1484 #if 0 1485 /* 4DWAVE only allows capturing at a 48KHz rate */ 1486 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_DX || 1487 sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) 1488 param->sample_rate = 48000; 1489 #endif 1490 1491 autri_setup_channel(sc, AUMODE_RECORD, param); 1492 1493 /* enable interrupt */ 1494 autri_enable_interrupt(sc, sc->sc_rec.ch_intr); 1495 1496 /* start channel */ 1497 autri_startch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 1498 1499 return 0; 1500 } 1501 1502 #if 0 1503 int 1504 autri_halt(sc) 1505 struct autri_softc *sc; 1506 { 1507 DPRINTF(("autri_halt().\n")); 1508 /*autri_stopch(sc);*/ 1509 autri_disable_interrupt(sc, sc->sc_play.channel); 1510 autri_disable_interrupt(sc, sc->sc_rec.channel); 1511 return 0; 1512 } 1513 #endif 1514 1515 void 1516 autri_enable_interrupt(sc, ch) 1517 struct autri_softc *sc; 1518 int ch; 1519 { 1520 int reg; 1521 1522 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1523 ch &= 0x1f; 1524 1525 autri_reg_set_4(sc, reg, 1 << ch); 1526 } 1527 1528 void 1529 autri_disable_interrupt(sc, ch) 1530 struct autri_softc *sc; 1531 int ch; 1532 { 1533 int reg; 1534 1535 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1536 ch &= 0x1f; 1537 1538 autri_reg_clear_4(sc, reg, 1 << ch); 1539 } 1540 1541 void 1542 autri_startch(sc, ch, ch_intr) 1543 struct autri_softc *sc; 1544 int ch, ch_intr; 1545 { 1546 int reg; 1547 u_int32_t chmask; 1548 1549 reg = (ch & 0x20) ? AUTRI_START_B : AUTRI_START_A; 1550 ch &= 0x1f; 1551 chmask = (1 << ch) | (1 << ch_intr); 1552 1553 autri_reg_set_4(sc, reg, chmask); 1554 } 1555 1556 void 1557 autri_stopch(sc, ch, ch_intr) 1558 struct autri_softc *sc; 1559 int ch, ch_intr; 1560 { 1561 int reg; 1562 u_int32_t chmask; 1563 1564 reg = (ch & 0x20) ? AUTRI_STOP_B : AUTRI_STOP_A; 1565 ch &= 0x1f; 1566 chmask = (1 << ch) | (1 << ch_intr); 1567 1568 autri_reg_set_4(sc, reg, chmask); 1569 } 1570 1571 #if NMIDI > 0 1572 int 1573 autri_midi_open(void *addr, int flags, 1574 void (*iintr)(void *, int), 1575 void (*ointr)(void *), 1576 void *arg) 1577 { 1578 struct autri_softc *sc = addr; 1579 1580 DPRINTF(("autri_midi_open()\n")); 1581 1582 DPRINTFN(5,("MPUR1 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR1))); 1583 DPRINTFN(5,("MPUR2 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR2))); 1584 1585 sc->sc_iintr = iintr; 1586 sc->sc_ointr = ointr; 1587 sc->sc_arg = arg; 1588 1589 if (flags & FREAD) 1590 autri_reg_clear_1(sc, AUTRI_MPUR2, AUTRI_MIDIIN_ENABLE_INTR); 1591 1592 if (flags & FWRITE) 1593 autri_reg_set_1(sc, AUTRI_MPUR2, AUTRI_MIDIOUT_CONNECT); 1594 1595 return (0); 1596 } 1597 1598 void 1599 autri_midi_close(void *addr) 1600 { 1601 struct autri_softc *sc = addr; 1602 1603 DPRINTF(("autri_midi_close()\n")); 1604 1605 tsleep(sc, PWAIT, "autri", hz/10); /* give uart a chance to drain */ 1606 1607 sc->sc_iintr = NULL; 1608 sc->sc_ointr = NULL; 1609 } 1610 1611 int 1612 autri_midi_output(void *addr, int d) 1613 { 1614 struct autri_softc *sc = addr; 1615 int x; 1616 1617 for (x = 0; x != MIDI_BUSY_WAIT; x++) { 1618 if ((TREAD1(sc, AUTRI_MPUR1) & AUTRI_MIDIOUT_READY) == 0) { 1619 TWRITE1(sc, AUTRI_MPUR0, d); 1620 return (0); 1621 } 1622 delay(MIDI_BUSY_DELAY); 1623 } 1624 return (EIO); 1625 } 1626 1627 void 1628 autri_midi_getinfo(void *addr, struct midi_info *mi) 1629 { 1630 mi->name = "4DWAVE MIDI UART"; 1631 mi->props = MIDI_PROP_CAN_INPUT; 1632 } 1633 1634 #endif 1635