xref: /openbsd-src/sys/dev/pci/auixpreg.h (revision 9200ee76509af840715772765e9cec397aef98b2)
1*9200ee76Sjsg /* $OpenBSD: auixpreg.h,v 1.2 2020/06/27 00:33:59 jsg Exp $ */
223c72d4eSmickey /* $NetBSD: auixpreg.h,v 1.2 2005/01/12 00:28:03 reinoud Exp $ */
323c72d4eSmickey 
423c72d4eSmickey /*
523c72d4eSmickey  * Copyright (c) 2004, 2005 Reinoud Zandijk <reinoud@netbsd.org>
623c72d4eSmickey  * All rights reserved.
723c72d4eSmickey  *
823c72d4eSmickey  * Redistribution and use in source and binary forms, with or without
923c72d4eSmickey  * modification, are permitted provided that the following conditions
1023c72d4eSmickey  * are met:
1123c72d4eSmickey  * 1. Redistributions of source code must retain the above copyright
1223c72d4eSmickey  *    notice, this list of conditions and the following disclaimer.
1323c72d4eSmickey  * 2. The name of the author may not be used to endorse or promote products
1423c72d4eSmickey  *    derived from this software without specific prior written permission.
1523c72d4eSmickey  *
1623c72d4eSmickey  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1723c72d4eSmickey  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1823c72d4eSmickey  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1923c72d4eSmickey  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2023c72d4eSmickey  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
2123c72d4eSmickey  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2223c72d4eSmickey  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
2323c72d4eSmickey  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
2423c72d4eSmickey  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2523c72d4eSmickey  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2623c72d4eSmickey  * SUCH DAMAGE.
2723c72d4eSmickey  */
2823c72d4eSmickey 
2923c72d4eSmickey /*
3023c72d4eSmickey  * NetBSD audio driver for ATI IXP-{150,200,...} audio driver hardware.
3123c72d4eSmickey  *
3223c72d4eSmickey  * Thanks are due to Takashi Iwai for the constants.
3323c72d4eSmickey  */
3423c72d4eSmickey 
3523c72d4eSmickey 
3623c72d4eSmickey #define ATI_IXP_CODECS 3
3723c72d4eSmickey 
3823c72d4eSmickey 
3923c72d4eSmickey typedef struct atiixp_dma_desc {
4023c72d4eSmickey 	u_int32_t	addr;		/* DMA buffer address */
4123c72d4eSmickey 	u_int16_t	status;		/* status bits; function unknown */
4223c72d4eSmickey 	u_int16_t	size;		/* size of this DMA packet in dwords */
4323c72d4eSmickey 	u_int32_t	next;		/* phys pointer to next packet descriptor */
4423c72d4eSmickey } __packed atiixp_dma_desc_t;
4523c72d4eSmickey 
4623c72d4eSmickey 
4723c72d4eSmickey #define ATI_REG_ISR			0x00		/* interrupt source */
4823c72d4eSmickey #define  ATI_REG_ISR_IN_XRUN		(1U<<0)
4923c72d4eSmickey #define  ATI_REG_ISR_IN_STATUS		(1U<<1)
5023c72d4eSmickey #define  ATI_REG_ISR_OUT_XRUN		(1U<<2)
5123c72d4eSmickey #define  ATI_REG_ISR_OUT_STATUS		(1U<<3)
5223c72d4eSmickey #define  ATI_REG_ISR_SPDF_XRUN		(1U<<4)
5323c72d4eSmickey #define  ATI_REG_ISR_SPDF_STATUS	(1U<<5)
5423c72d4eSmickey #define  ATI_REG_ISR_PHYS_INTR		(1U<<8)
5523c72d4eSmickey #define  ATI_REG_ISR_PHYS_MISMATCH	(1U<<9)
5623c72d4eSmickey #define  ATI_REG_ISR_CODEC0_NOT_READY	(1U<<10)
5723c72d4eSmickey #define  ATI_REG_ISR_CODEC1_NOT_READY	(1U<<11)
5823c72d4eSmickey #define  ATI_REG_ISR_CODEC2_NOT_READY	(1U<<12)
5923c72d4eSmickey #define  ATI_REG_ISR_NEW_FRAME		(1U<<13)
6023c72d4eSmickey 
6123c72d4eSmickey #define ATI_REG_IER			0x04		/* interrupt enable */
6223c72d4eSmickey #define  ATI_REG_IER_IN_XRUN_EN		(1U<<0)
6323c72d4eSmickey #define  ATI_REG_IER_IO_STATUS_EN	(1U<<1)
6423c72d4eSmickey #define  ATI_REG_IER_OUT_XRUN_EN	(1U<<2)
6523c72d4eSmickey #define  ATI_REG_IER_OUT_XRUN_COND	(1U<<3)
6623c72d4eSmickey #define  ATI_REG_IER_SPDF_XRUN_EN	(1U<<4)
6723c72d4eSmickey #define  ATI_REG_IER_SPDF_STATUS_EN	(1U<<5)
6823c72d4eSmickey #define  ATI_REG_IER_PHYS_INTR_EN	(1U<<8)
6923c72d4eSmickey #define  ATI_REG_IER_PHYS_MISMATCH_EN	(1U<<9)
7023c72d4eSmickey #define  ATI_REG_IER_CODEC0_INTR_EN	(1U<<10)
7123c72d4eSmickey #define  ATI_REG_IER_CODEC1_INTR_EN	(1U<<11)
7223c72d4eSmickey #define  ATI_REG_IER_CODEC2_INTR_EN	(1U<<12)
7323c72d4eSmickey #define  ATI_REG_IER_NEW_FRAME_EN	(1U<<13)	/* (RO) */
7423c72d4eSmickey #define  ATI_REG_IER_SET_BUS_BUSY	(1U<<14)	/* (WO) audio is running */
7523c72d4eSmickey 
7623c72d4eSmickey #define ATI_REG_CMD			0x08		/* command */
7723c72d4eSmickey #define  ATI_REG_CMD_POWERDOWN		(1U<<0)
7823c72d4eSmickey #define  ATI_REG_CMD_RECEIVE_EN		(1U<<1)
7923c72d4eSmickey #define  ATI_REG_CMD_SEND_EN		(1U<<2)
8023c72d4eSmickey #define  ATI_REG_CMD_STATUS_MEM		(1U<<3)
8123c72d4eSmickey #define  ATI_REG_CMD_SPDF_OUT_EN	(1U<<4)
8223c72d4eSmickey #define  ATI_REG_CMD_SPDF_STATUS_MEM	(1U<<5)
8323c72d4eSmickey #define  ATI_REG_CMD_SPDF_THRESHOLD	(3U<<6)
8423c72d4eSmickey #define  ATI_REG_CMD_SPDF_THRESHOLD_SHIFT	6
8523c72d4eSmickey #define  ATI_REG_CMD_IN_DMA_EN		(1U<<8)
8623c72d4eSmickey #define  ATI_REG_CMD_OUT_DMA_EN		(1U<<9)
8723c72d4eSmickey #define  ATI_REG_CMD_SPDF_DMA_EN	(1U<<10)
8823c72d4eSmickey #define  ATI_REG_CMD_SPDF_OUT_STOPPED	(1U<<11)
8923c72d4eSmickey #define  ATI_REG_CMD_SPDF_CONFIG_MASK	(7U<<12)
9023c72d4eSmickey #define   ATI_REG_CMD_SPDF_CONFIG_34	(1U<<12)
9123c72d4eSmickey #define   ATI_REG_CMD_SPDF_CONFIG_78	(2U<<12)
9223c72d4eSmickey #define   ATI_REG_CMD_SPDF_CONFIG_69	(3U<<12)
9323c72d4eSmickey #define   ATI_REG_CMD_SPDF_CONFIG_01	(4U<<12)
9423c72d4eSmickey #define  ATI_REG_CMD_INTERLEAVE_SPDF	(1U<<16)
9523c72d4eSmickey #define  ATI_REG_CMD_AUDIO_PRESENT	(1U<<20)
9623c72d4eSmickey #define  ATI_REG_CMD_INTERLEAVE_IN	(1U<<21)
9723c72d4eSmickey #define  ATI_REG_CMD_INTERLEAVE_OUT	(1U<<22)
9823c72d4eSmickey #define  ATI_REG_CMD_LOOPBACK_EN	(1U<<23)
9923c72d4eSmickey #define  ATI_REG_CMD_PACKED_DIS		(1U<<24)
10023c72d4eSmickey #define  ATI_REG_CMD_BURST_EN		(1U<<25)
10123c72d4eSmickey #define  ATI_REG_CMD_PANIC_EN		(1U<<26)
10223c72d4eSmickey #define  ATI_REG_CMD_MODEM_PRESENT	(1U<<27)
10323c72d4eSmickey #define  ATI_REG_CMD_ACLINK_ACTIVE	(1U<<28)
10423c72d4eSmickey #define  ATI_REG_CMD_AC_SOFT_RESET	(1U<<29)
10523c72d4eSmickey #define  ATI_REG_CMD_AC_SYNC		(1U<<30)
10623c72d4eSmickey #define  ATI_REG_CMD_AC_RESET		(1U<<31)
10723c72d4eSmickey 
10823c72d4eSmickey #define ATI_REG_PHYS_OUT_ADDR		0x0c
10923c72d4eSmickey #define  ATI_REG_PHYS_OUT_CODEC_MASK	(3U<<0)
11023c72d4eSmickey #define  ATI_REG_PHYS_OUT_RW		(1U<<2)
11123c72d4eSmickey #define  ATI_REG_PHYS_OUT_ADDR_EN	(1U<<8)
11223c72d4eSmickey #define  ATI_REG_PHYS_OUT_ADDR_SHIFT	9
11323c72d4eSmickey #define  ATI_REG_PHYS_OUT_DATA_SHIFT	16
11423c72d4eSmickey 
11523c72d4eSmickey #define ATI_REG_PHYS_IN_ADDR		0x10
11623c72d4eSmickey #define  ATI_REG_PHYS_IN_READ_FLAG	(1U<<8)
11723c72d4eSmickey #define  ATI_REG_PHYS_IN_ADDR_SHIFT	9
11823c72d4eSmickey #define  ATI_REG_PHYS_IN_DATA_SHIFT	16
11923c72d4eSmickey 
12023c72d4eSmickey #define ATI_REG_SLOTREQ			0x14
12123c72d4eSmickey 
12223c72d4eSmickey #define ATI_REG_COUNTER			0x18
12323c72d4eSmickey #define  ATI_REG_COUNTER_SLOT		(3U<<0)		/* slot # */
12423c72d4eSmickey #define  ATI_REG_COUNTER_BITCLOCK	(31U<<8)
12523c72d4eSmickey 
12623c72d4eSmickey #define ATI_REG_IN_FIFO_THRESHOLD	0x1c
12723c72d4eSmickey 
12823c72d4eSmickey #define ATI_REG_IN_DMA_LINKPTR		0x20
12923c72d4eSmickey #define ATI_REG_IN_DMA_DT_START		0x24		/* RO */
13023c72d4eSmickey #define ATI_REG_IN_DMA_DT_NEXT		0x28		/* RO */
13123c72d4eSmickey #define ATI_REG_IN_DMA_DT_CUR		0x2c		/* RO */
13223c72d4eSmickey #define ATI_REG_IN_DMA_DT_SIZE		0x30
13323c72d4eSmickey 
13423c72d4eSmickey #define ATI_REG_OUT_DMA_SLOT		0x34
13523c72d4eSmickey #define  ATI_REG_OUT_DMA_SLOT_BIT(x)	(1U << ((x) - 3))
13623c72d4eSmickey #define  ATI_REG_OUT_DMA_SLOT_MASK	0x1ff
13723c72d4eSmickey #define  ATI_REG_OUT_DMA_THRESHOLD_MASK	0xf800
13823c72d4eSmickey #define  ATI_REG_OUT_DMA_THRESHOLD_SHIFT	11
13923c72d4eSmickey 
14023c72d4eSmickey #define ATI_REG_OUT_DMA_LINKPTR		0x38
14123c72d4eSmickey #define ATI_REG_OUT_DMA_DT_START	0x3c		/* RO */
14223c72d4eSmickey #define ATI_REG_OUT_DMA_DT_NEXT		0x40		/* RO */
14323c72d4eSmickey #define ATI_REG_OUT_DMA_DT_CUR		0x44		/* RO */
14423c72d4eSmickey #define ATI_REG_OUT_DMA_DT_SIZE		0x48
14523c72d4eSmickey 
14623c72d4eSmickey #define ATI_REG_SPDF_CMD		0x4c
14723c72d4eSmickey #define  ATI_REG_SPDF_CMD_LFSR		(1U<<4)
14823c72d4eSmickey #define  ATI_REG_SPDF_CMD_SINGLE_CH	(1U<<5)
14923c72d4eSmickey #define  ATI_REG_SPDF_CMD_LFSR_ACC	(0xff<<8)	/* RO */
15023c72d4eSmickey 
15123c72d4eSmickey #define ATI_REG_SPDF_DMA_LINKPTR	0x50
15223c72d4eSmickey #define ATI_REG_SPDF_DMA_DT_START	0x54		/* RO */
15323c72d4eSmickey #define ATI_REG_SPDF_DMA_DT_NEXT	0x58		/* RO */
15423c72d4eSmickey #define ATI_REG_SPDF_DMA_DT_CUR		0x5c		/* RO */
15523c72d4eSmickey #define ATI_REG_SPDF_DMA_DT_SIZE	0x60
15623c72d4eSmickey 
15723c72d4eSmickey #define ATI_REG_MODEM_MIRROR		0x7c
15823c72d4eSmickey #define ATI_REG_AUDIO_MIRROR		0x80
15923c72d4eSmickey 
16023c72d4eSmickey #define ATI_REG_6CH_REORDER		0x84		/* reorder slots for 6ch */
16123c72d4eSmickey #define  ATI_REG_6CH_REORDER_EN		(1U<<0)		/* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
16223c72d4eSmickey 
16323c72d4eSmickey #define ATI_REG_FIFO_FLUSH		0x88
16423c72d4eSmickey #define  ATI_REG_FIFO_OUT_FLUSH		(1U<<0)
16523c72d4eSmickey #define  ATI_REG_FIFO_IN_FLUSH		(1U<<1)
16623c72d4eSmickey 
16723c72d4eSmickey /* LINKPTR */
16823c72d4eSmickey #define  ATI_REG_LINKPTR_EN		(1U<<0)
16923c72d4eSmickey 
17023c72d4eSmickey /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
17123c72d4eSmickey #define  ATI_REG_DMA_DT_SIZE		(0xffffU<<0)
17223c72d4eSmickey #define  ATI_REG_DMA_FIFO_USED		(0x1fU<<16)
17323c72d4eSmickey #define  ATI_REG_DMA_FIFO_FREE		(0x1fU<<21)
17423c72d4eSmickey #define  ATI_REG_DMA_STATE		(7U<<26)
175