1 /* $OpenBSD: arc.c,v 1.78 2009/02/16 21:19:07 miod Exp $ */ 2 3 /* 4 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include "bio.h" 20 21 #include <sys/param.h> 22 #include <sys/systm.h> 23 #include <sys/buf.h> 24 #include <sys/kernel.h> 25 #include <sys/malloc.h> 26 #include <sys/device.h> 27 #include <sys/proc.h> 28 #include <sys/rwlock.h> 29 30 #include <machine/bus.h> 31 32 #include <dev/pci/pcireg.h> 33 #include <dev/pci/pcivar.h> 34 #include <dev/pci/pcidevs.h> 35 36 #include <scsi/scsi_all.h> 37 #include <scsi/scsiconf.h> 38 39 #include <sys/sensors.h> 40 #if NBIO > 0 41 #include <sys/ioctl.h> 42 #include <dev/biovar.h> 43 #endif 44 45 #ifdef ARC_DEBUG 46 #define ARC_D_INIT (1<<0) 47 #define ARC_D_RW (1<<1) 48 #define ARC_D_DB (1<<2) 49 50 int arcdebug = 0; 51 52 #define DPRINTF(p...) do { if (arcdebug) printf(p); } while (0) 53 #define DNPRINTF(n, p...) do { if ((n) & arcdebug) printf(p); } while (0) 54 55 #else 56 #define DPRINTF(p...) /* p */ 57 #define DNPRINTF(n, p...) /* n, p */ 58 #endif 59 60 /* Areca boards using the Intel IOP are Revision A (RA) */ 61 62 #define ARC_RA_PCI_BAR PCI_MAPREG_START 63 64 #define ARC_RA_INB_MSG0 0x0010 65 #define ARC_RA_INB_MSG0_NOP (0x00000000) 66 #define ARC_RA_INB_MSG0_GET_CONFIG (0x00000001) 67 #define ARC_RA_INB_MSG0_SET_CONFIG (0x00000002) 68 #define ARC_RA_INB_MSG0_ABORT_CMD (0x00000003) 69 #define ARC_RA_INB_MSG0_STOP_BGRB (0x00000004) 70 #define ARC_RA_INB_MSG0_FLUSH_CACHE (0x00000005) 71 #define ARC_RA_INB_MSG0_START_BGRB (0x00000006) 72 #define ARC_RA_INB_MSG0_CHK331PENDING (0x00000007) 73 #define ARC_RA_INB_MSG0_SYNC_TIMER (0x00000008) 74 #define ARC_RA_INB_MSG1 0x0014 75 #define ARC_RA_OUTB_ADDR0 0x0018 76 #define ARC_RA_OUTB_ADDR1 0x001c 77 #define ARC_RA_OUTB_ADDR1_FIRMWARE_OK (1<<31) 78 #define ARC_RA_INB_DOORBELL 0x0020 79 #define ARC_RA_INB_DOORBELL_WRITE_OK (1<<0) 80 #define ARC_RA_INB_DOORBELL_READ_OK (1<<1) 81 #define ARC_RA_OUTB_DOORBELL 0x002c 82 #define ARC_RA_OUTB_DOORBELL_WRITE_OK (1<<0) 83 #define ARC_RA_OUTB_DOORBELL_READ_OK (1<<1) 84 #define ARC_RA_INTRSTAT 0x0030 85 #define ARC_RA_INTRSTAT_MSG0 (1<<0) 86 #define ARC_RA_INTRSTAT_MSG1 (1<<1) 87 #define ARC_RA_INTRSTAT_DOORBELL (1<<2) 88 #define ARC_RA_INTRSTAT_POSTQUEUE (1<<3) 89 #define ARC_RA_INTRSTAT_PCI (1<<4) 90 #define ARC_RA_INTRMASK 0x0034 91 #define ARC_RA_INTRMASK_MSG0 (1<<0) 92 #define ARC_RA_INTRMASK_MSG1 (1<<1) 93 #define ARC_RA_INTRMASK_DOORBELL (1<<2) 94 #define ARC_RA_INTRMASK_POSTQUEUE (1<<3) 95 #define ARC_RA_INTRMASK_PCI (1<<4) 96 #define ARC_RA_POST_QUEUE 0x0040 97 #define ARC_RA_POST_QUEUE_ADDR_SHIFT 5 98 #define ARC_RA_POST_QUEUE_IAMBIOS (1<<30) 99 #define ARC_RA_POST_QUEUE_BIGFRAME (1<<31) 100 #define ARC_RA_REPLY_QUEUE 0x0044 101 #define ARC_RA_REPLY_QUEUE_ADDR_SHIFT 5 102 #define ARC_RA_REPLY_QUEUE_ERR (1<<28) 103 #define ARC_RA_REPLY_QUEUE_IAMBIOS (1<<30) 104 #define ARC_RA_MSGBUF 0x0a00 105 #define ARC_RA_MSGBUF_LEN 1024 106 #define ARC_RA_IOC_WBUF_LEN 0x0e00 107 #define ARC_RA_IOC_WBUF 0x0e04 108 #define ARC_RA_IOC_RBUF_LEN 0x0f00 109 #define ARC_RA_IOC_RBUF 0x0f04 110 #define ARC_RA_IOC_RWBUF_MAXLEN 124 /* for both RBUF and WBUF */ 111 112 /* Areca boards using the Marvel IOP are Revision B (RB) */ 113 114 #define ARC_RB_DRV2IOP_DOORBELL 0x00020400 115 #define ARC_RB_DRV2IOP_DOORBELL_MASK 0x00020404 116 #define ARC_RB_IOP2DRV_DOORBELL 0x00020408 117 #define ARC_RB_IOP2DRV_DOORBELL_FIRMWARE_OK (1<<31) 118 #define ARC_RB_IOP2DRV_DOORBELL_MASK 0x0002040c 119 120 struct arc_msg_firmware_info { 121 u_int32_t signature; 122 #define ARC_FWINFO_SIGNATURE_GET_CONFIG (0x87974060) 123 u_int32_t request_len; 124 u_int32_t queue_len; 125 u_int32_t sdram_size; 126 u_int32_t sata_ports; 127 u_int8_t vendor[40]; 128 u_int8_t model[8]; 129 u_int8_t fw_version[16]; 130 u_int8_t device_map[16]; 131 } __packed; 132 133 struct arc_msg_scsicmd { 134 u_int8_t bus; 135 u_int8_t target; 136 u_int8_t lun; 137 u_int8_t function; 138 139 u_int8_t cdb_len; 140 u_int8_t sgl_len; 141 u_int8_t flags; 142 #define ARC_MSG_SCSICMD_FLAG_SGL_BSIZE_512 (1<<0) 143 #define ARC_MSG_SCSICMD_FLAG_FROM_BIOS (1<<1) 144 #define ARC_MSG_SCSICMD_FLAG_WRITE (1<<2) 145 #define ARC_MSG_SCSICMD_FLAG_SIMPLEQ (0x00) 146 #define ARC_MSG_SCSICMD_FLAG_HEADQ (0x08) 147 #define ARC_MSG_SCSICMD_FLAG_ORDERQ (0x10) 148 u_int8_t reserved; 149 150 u_int32_t context; 151 u_int32_t data_len; 152 153 #define ARC_MSG_CDBLEN 16 154 u_int8_t cdb[ARC_MSG_CDBLEN]; 155 156 u_int8_t status; 157 #define ARC_MSG_STATUS_SELTIMEOUT 0xf0 158 #define ARC_MSG_STATUS_ABORTED 0xf1 159 #define ARC_MSG_STATUS_INIT_FAIL 0xf2 160 #define ARC_MSG_SENSELEN 15 161 u_int8_t sense_data[ARC_MSG_SENSELEN]; 162 163 /* followed by an sgl */ 164 } __packed; 165 166 struct arc_sge { 167 u_int32_t sg_hdr; 168 #define ARC_SGE_64BIT (1<<24) 169 u_int32_t sg_lo_addr; 170 u_int32_t sg_hi_addr; 171 } __packed; 172 173 #define ARC_MAX_TARGET 16 174 #define ARC_MAX_LUN 8 175 #define ARC_MAX_IOCMDLEN 512 176 #define ARC_BLOCKSIZE 512 177 178 /* the firmware deals with up to 256 or 512 byte command frames. */ 179 /* sizeof(struct arc_msg_scsicmd) + (sizeof(struct arc_sge) * 38) == 508 */ 180 #define ARC_SGL_MAXLEN 38 181 /* sizeof(struct arc_msg_scsicmd) + (sizeof(struct arc_sge) * 17) == 252 */ 182 #define ARC_SGL_256LEN 17 183 184 struct arc_io_cmd { 185 struct arc_msg_scsicmd cmd; 186 struct arc_sge sgl[ARC_SGL_MAXLEN]; 187 } __packed; 188 189 /* definitions of the firmware commands sent via the doorbells */ 190 191 struct arc_fw_hdr { 192 u_int8_t byte1; 193 u_int8_t byte2; 194 u_int8_t byte3; 195 } __packed; 196 197 /* the fw header must always equal this */ 198 struct arc_fw_hdr arc_fw_hdr = { 0x5e, 0x01, 0x61 }; 199 200 struct arc_fw_bufhdr { 201 struct arc_fw_hdr hdr; 202 u_int16_t len; 203 } __packed; 204 205 #define ARC_FW_RAIDINFO 0x20 /* opcode + raid# */ 206 #define ARC_FW_VOLINFO 0x21 /* opcode + vol# */ 207 #define ARC_FW_DISKINFO 0x22 /* opcode + physdisk# */ 208 #define ARC_FW_SYSINFO 0x23 /* opcode. reply is fw_sysinfo */ 209 #define ARC_FW_MUTE_ALARM 0x30 /* opcode only */ 210 #define ARC_FW_SET_ALARM 0x31 /* opcode + 1 byte for setting */ 211 #define ARC_FW_SET_ALARM_DISABLE 0x00 212 #define ARC_FW_SET_ALARM_ENABLE 0x01 213 #define ARC_FW_NOP 0x38 /* opcode only */ 214 215 #define ARC_FW_CMD_OK 0x41 216 #define ARC_FW_BLINK 0x43 217 #define ARC_FW_BLINK_ENABLE 0x00 218 #define ARC_FW_BLINK_DISABLE 0x01 219 #define ARC_FW_CMD_PASS_REQD 0x4d 220 221 struct arc_fw_comminfo { 222 u_int8_t baud_rate; 223 u_int8_t data_bits; 224 u_int8_t stop_bits; 225 u_int8_t parity; 226 u_int8_t flow_control; 227 } __packed; 228 229 struct arc_fw_scsiattr { 230 u_int8_t channel;// channel for SCSI target (0/1) 231 u_int8_t target; 232 u_int8_t lun; 233 u_int8_t tagged; 234 u_int8_t cache; 235 u_int8_t speed; 236 } __packed; 237 238 struct arc_fw_raidinfo { 239 u_int8_t set_name[16]; 240 u_int32_t capacity; 241 u_int32_t capacity2; 242 u_int32_t fail_mask; 243 u_int8_t device_array[32]; 244 u_int8_t member_devices; 245 u_int8_t new_member_devices; 246 u_int8_t raid_state; 247 u_int8_t volumes; 248 u_int8_t volume_list[16]; 249 u_int8_t reserved1[3]; 250 u_int8_t free_segments; 251 u_int32_t raw_stripes[8]; 252 u_int8_t reserved2[12]; 253 } __packed; 254 255 struct arc_fw_volinfo { 256 u_int8_t set_name[16]; 257 u_int32_t capacity; 258 u_int32_t capacity2; 259 u_int32_t fail_mask; 260 u_int32_t stripe_size; /* in blocks */ 261 u_int32_t new_fail_mask; 262 u_int32_t new_stripe_size; 263 u_int32_t volume_status; 264 #define ARC_FW_VOL_STATUS_NORMAL 0x00 265 #define ARC_FW_VOL_STATUS_INITTING (1<<0) 266 #define ARC_FW_VOL_STATUS_FAILED (1<<1) 267 #define ARC_FW_VOL_STATUS_MIGRATING (1<<2) 268 #define ARC_FW_VOL_STATUS_REBUILDING (1<<3) 269 #define ARC_FW_VOL_STATUS_NEED_INIT (1<<4) 270 #define ARC_FW_VOL_STATUS_NEED_MIGRATE (1<<5) 271 #define ARC_FW_VOL_STATUS_INIT_FLAG (1<<6) 272 #define ARC_FW_VOL_STATUS_NEED_REGEN (1<<7) 273 #define ARC_FW_VOL_STATUS_CHECKING (1<<8) 274 #define ARC_FW_VOL_STATUS_NEED_CHECK (1<<9) 275 u_int32_t progress; 276 struct arc_fw_scsiattr scsi_attr; 277 u_int8_t member_disks; 278 u_int8_t raid_level; 279 #define ARC_FW_VOL_RAIDLEVEL_0 0x00 280 #define ARC_FW_VOL_RAIDLEVEL_1 0x01 281 #define ARC_FW_VOL_RAIDLEVEL_3 0x02 282 #define ARC_FW_VOL_RAIDLEVEL_5 0x03 283 #define ARC_FW_VOL_RAIDLEVEL_6 0x04 284 #define ARC_FW_VOL_RAIDLEVEL_PASSTHRU 0x05 285 u_int8_t new_member_disks; 286 u_int8_t new_raid_level; 287 u_int8_t raid_set_number; 288 u_int8_t reserved[5]; 289 } __packed; 290 291 struct arc_fw_diskinfo { 292 u_int8_t model[40]; 293 u_int8_t serial[20]; 294 u_int8_t firmware_rev[8]; 295 u_int32_t capacity; 296 u_int32_t capacity2; 297 u_int8_t device_state; 298 u_int8_t pio_mode; 299 u_int8_t current_udma_mode; 300 u_int8_t udma_mode; 301 u_int8_t drive_select; 302 u_int8_t raid_number; // 0xff unowned 303 struct arc_fw_scsiattr scsi_attr; 304 u_int8_t reserved[44]; 305 } __packed; 306 307 struct arc_fw_sysinfo { 308 u_int8_t vendor_name[40]; 309 u_int8_t serial_number[16]; 310 u_int8_t firmware_version[16]; 311 u_int8_t boot_version[16]; 312 u_int8_t mb_version[16]; 313 u_int8_t model_name[8]; 314 315 u_int8_t local_ip[4]; 316 u_int8_t current_ip[4]; 317 318 u_int32_t time_tick; 319 u_int32_t cpu_speed; 320 u_int32_t icache; 321 u_int32_t dcache; 322 u_int32_t scache; 323 u_int32_t memory_size; 324 u_int32_t memory_speed; 325 u_int32_t events; 326 327 u_int8_t gsiMacAddress[6]; 328 u_int8_t gsiDhcp; 329 330 u_int8_t alarm; 331 u_int8_t channel_usage; 332 u_int8_t max_ata_mode; 333 u_int8_t sdram_ecc; 334 u_int8_t rebuild_priority; 335 struct arc_fw_comminfo comm_a; 336 struct arc_fw_comminfo comm_b; 337 u_int8_t ide_channels; 338 u_int8_t scsi_host_channels; 339 u_int8_t ide_host_channels; 340 u_int8_t max_volume_set; 341 u_int8_t max_raid_set; 342 u_int8_t ether_port; 343 u_int8_t raid6_engine; 344 u_int8_t reserved[75]; 345 } __packed; 346 347 int arc_match(struct device *, void *, void *); 348 void arc_attach(struct device *, struct device *, void *); 349 int arc_detach(struct device *, int); 350 void arc_shutdown(void *); 351 int arc_intr(void *); 352 353 struct arc_iop; 354 struct arc_ccb; 355 TAILQ_HEAD(arc_ccb_list, arc_ccb); 356 357 struct arc_softc { 358 struct device sc_dev; 359 const struct arc_iop *sc_iop; 360 struct scsi_link sc_link; 361 362 pci_chipset_tag_t sc_pc; 363 pcitag_t sc_tag; 364 365 bus_space_tag_t sc_iot; 366 bus_space_handle_t sc_ioh; 367 bus_size_t sc_ios; 368 bus_dma_tag_t sc_dmat; 369 370 void *sc_ih; 371 372 void *sc_shutdownhook; 373 374 int sc_req_count; 375 376 struct arc_dmamem *sc_requests; 377 struct arc_ccb *sc_ccbs; 378 struct arc_ccb_list sc_ccb_free; 379 380 struct scsibus_softc *sc_scsibus; 381 382 struct rwlock sc_lock; 383 volatile int sc_talking; 384 385 struct ksensor *sc_sensors; 386 struct ksensordev sc_sensordev; 387 int sc_nsensors; 388 389 u_int32_t sc_ledmask; 390 }; 391 #define DEVNAME(_s) ((_s)->sc_dev.dv_xname) 392 393 struct cfattach arc_ca = { 394 sizeof(struct arc_softc), arc_match, arc_attach, arc_detach 395 }; 396 397 struct cfdriver arc_cd = { 398 NULL, "arc", DV_DULL 399 }; 400 401 /* interface for scsi midlayer to talk to */ 402 int arc_scsi_cmd(struct scsi_xfer *); 403 void arc_minphys(struct buf *, struct scsi_link *); 404 405 struct scsi_adapter arc_switch = { 406 arc_scsi_cmd, arc_minphys, NULL, NULL, NULL 407 }; 408 409 struct scsi_device arc_dev = { 410 NULL, NULL, NULL, NULL 411 }; 412 413 /* code to deal with getting bits in and out of the bus space */ 414 u_int32_t arc_read(struct arc_softc *, bus_size_t); 415 void arc_read_region(struct arc_softc *, bus_size_t, 416 void *, size_t); 417 void arc_write(struct arc_softc *, bus_size_t, u_int32_t); 418 void arc_write_region(struct arc_softc *, bus_size_t, 419 void *, size_t); 420 int arc_wait_eq(struct arc_softc *, bus_size_t, 421 u_int32_t, u_int32_t); 422 int arc_wait_ne(struct arc_softc *, bus_size_t, 423 u_int32_t, u_int32_t); 424 int arc_msg0(struct arc_softc *, u_int32_t); 425 426 #define arc_push(_s, _r) arc_write((_s), ARC_RA_POST_QUEUE, (_r)) 427 #define arc_pop(_s) arc_read((_s), ARC_RA_REPLY_QUEUE) 428 429 /* wrap up the bus_dma api */ 430 struct arc_dmamem { 431 bus_dmamap_t adm_map; 432 bus_dma_segment_t adm_seg; 433 size_t adm_size; 434 caddr_t adm_kva; 435 }; 436 #define ARC_DMA_MAP(_adm) ((_adm)->adm_map) 437 #define ARC_DMA_DVA(_adm) ((_adm)->adm_map->dm_segs[0].ds_addr) 438 #define ARC_DMA_KVA(_adm) ((void *)(_adm)->adm_kva) 439 440 struct arc_dmamem *arc_dmamem_alloc(struct arc_softc *, size_t); 441 void arc_dmamem_free(struct arc_softc *, 442 struct arc_dmamem *); 443 444 /* stuff to manage a scsi command */ 445 struct arc_ccb { 446 struct arc_softc *ccb_sc; 447 int ccb_id; 448 449 struct scsi_xfer *ccb_xs; 450 451 bus_dmamap_t ccb_dmamap; 452 bus_addr_t ccb_offset; 453 struct arc_io_cmd *ccb_cmd; 454 u_int32_t ccb_cmd_post; 455 456 TAILQ_ENTRY(arc_ccb) ccb_link; 457 }; 458 459 int arc_alloc_ccbs(struct arc_softc *); 460 struct arc_ccb *arc_get_ccb(struct arc_softc *); 461 void arc_put_ccb(struct arc_softc *, struct arc_ccb *); 462 int arc_load_xs(struct arc_ccb *); 463 int arc_complete(struct arc_softc *, struct arc_ccb *, 464 int); 465 void arc_scsi_cmd_done(struct arc_softc *, struct arc_ccb *, 466 u_int32_t); 467 468 /* real stuff for dealing with the hardware */ 469 struct arc_iop { 470 int (*iop_query_firmware)(struct arc_softc *); 471 }; 472 473 int arc_map_pci_resources(struct arc_softc *, 474 struct pci_attach_args *); 475 void arc_unmap_pci_resources(struct arc_softc *); 476 int arc_intel_query_firmware(struct arc_softc *); 477 int arc_marvell_query_firmware(struct arc_softc *); 478 479 #if NBIO > 0 480 /* stuff to do messaging via the doorbells */ 481 void arc_lock(struct arc_softc *); 482 void arc_unlock(struct arc_softc *); 483 void arc_wait(struct arc_softc *); 484 u_int8_t arc_msg_cksum(void *, u_int16_t); 485 int arc_msgbuf(struct arc_softc *, void *, size_t, 486 void *, size_t, int); 487 488 /* bioctl */ 489 int arc_bioctl(struct device *, u_long, caddr_t); 490 int arc_bio_inq(struct arc_softc *, struct bioc_inq *); 491 int arc_bio_vol(struct arc_softc *, struct bioc_vol *); 492 int arc_bio_disk(struct arc_softc *, struct bioc_disk *); 493 int arc_bio_alarm(struct arc_softc *, struct bioc_alarm *); 494 int arc_bio_alarm_state(struct arc_softc *, 495 struct bioc_alarm *); 496 int arc_bio_blink(struct arc_softc *, struct bioc_blink *); 497 498 int arc_bio_getvol(struct arc_softc *, int, 499 struct arc_fw_volinfo *); 500 501 #ifndef SMALL_KERNEL 502 /* sensors */ 503 void arc_create_sensors(void *, void *); 504 void arc_refresh_sensors(void *); 505 #endif /* SMALL_KERNEL */ 506 #endif 507 508 static const struct arc_iop arc_intel = { 509 arc_intel_query_firmware 510 }; 511 512 static const struct arc_iop arc_marvell = { 513 arc_marvell_query_firmware 514 }; 515 516 struct arc_board { 517 pcireg_t ab_vendor; 518 pcireg_t ab_product; 519 const struct arc_iop *ab_iop; 520 }; 521 const struct arc_board *arc_match_board(struct pci_attach_args *); 522 523 static const struct arc_board arc_devices[] = { 524 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1110, &arc_intel }, 525 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1120, &arc_intel }, 526 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1130, &arc_intel }, 527 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1160, &arc_intel }, 528 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1170, &arc_intel }, 529 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1200, &arc_intel }, 530 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1200_B, &arc_marvell }, 531 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1202, &arc_intel }, 532 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1210, &arc_intel }, 533 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1220, &arc_intel }, 534 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1230, &arc_intel }, 535 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1260, &arc_intel }, 536 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1270, &arc_intel }, 537 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1280, &arc_intel }, 538 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1380, &arc_intel }, 539 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1381, &arc_intel }, 540 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1680, &arc_intel }, 541 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1681, &arc_intel } 542 }; 543 544 const struct arc_board * 545 arc_match_board(struct pci_attach_args *pa) 546 { 547 const struct arc_board *ab; 548 int i; 549 550 for (i = 0; i < sizeof(arc_devices) / sizeof(arc_devices[0]); i++) { 551 ab = &arc_devices[i]; 552 553 if (PCI_VENDOR(pa->pa_id) == ab->ab_vendor && 554 PCI_PRODUCT(pa->pa_id) == ab->ab_product) 555 return (ab); 556 } 557 558 return (NULL); 559 } 560 561 int 562 arc_match(struct device *parent, void *match, void *aux) 563 { 564 return ((arc_match_board(aux) == NULL) ? 0 : 1); 565 } 566 567 void 568 arc_attach(struct device *parent, struct device *self, void *aux) 569 { 570 struct arc_softc *sc = (struct arc_softc *)self; 571 struct pci_attach_args *pa = aux; 572 struct scsibus_attach_args saa; 573 struct device *child; 574 575 sc->sc_talking = 0; 576 rw_init(&sc->sc_lock, "arcmsg"); 577 578 sc->sc_iop = arc_match_board(pa)->ab_iop; 579 580 if (arc_map_pci_resources(sc, pa) != 0) { 581 /* error message printed by arc_map_pci_resources */ 582 return; 583 } 584 585 if (sc->sc_iop->iop_query_firmware(sc) != 0) { 586 /* error message printed by arc_query_firmware */ 587 goto unmap_pci; 588 } 589 590 if (arc_alloc_ccbs(sc) != 0) { 591 /* error message printed by arc_alloc_ccbs */ 592 goto unmap_pci; 593 } 594 595 sc->sc_shutdownhook = shutdownhook_establish(arc_shutdown, sc); 596 if (sc->sc_shutdownhook == NULL) 597 panic("unable to establish arc powerhook"); 598 599 sc->sc_link.device = &arc_dev; 600 sc->sc_link.adapter = &arc_switch; 601 sc->sc_link.adapter_softc = sc; 602 sc->sc_link.adapter_target = ARC_MAX_TARGET; 603 sc->sc_link.adapter_buswidth = ARC_MAX_TARGET; 604 sc->sc_link.openings = sc->sc_req_count / ARC_MAX_TARGET; 605 606 bzero(&saa, sizeof(saa)); 607 saa.saa_sc_link = &sc->sc_link; 608 609 child = config_found(self, &saa, scsiprint); 610 sc->sc_scsibus = (struct scsibus_softc *)child; 611 612 /* enable interrupts */ 613 arc_write(sc, ARC_RA_INTRMASK, 614 ~(ARC_RA_INTRMASK_POSTQUEUE|ARC_RA_INTRSTAT_DOORBELL)); 615 616 #if NBIO > 0 617 if (bio_register(self, arc_bioctl) != 0) 618 panic("%s: bioctl registration failed\n", DEVNAME(sc)); 619 620 #ifndef SMALL_KERNEL 621 /* 622 * you need to talk to the firmware to get volume info. our firmware 623 * interface relies on being able to sleep, so we need to use a thread 624 * to do the work. 625 */ 626 if (scsi_task(arc_create_sensors, sc, NULL, 1) != 0) 627 printf("%s: unable to schedule arc_create_sensors as a " 628 "scsi task", DEVNAME(sc)); 629 #endif 630 #endif 631 632 return; 633 unmap_pci: 634 arc_unmap_pci_resources(sc); 635 } 636 637 int 638 arc_detach(struct device *self, int flags) 639 { 640 struct arc_softc *sc = (struct arc_softc *)self; 641 642 shutdownhook_disestablish(sc->sc_shutdownhook); 643 644 if (arc_msg0(sc, ARC_RA_INB_MSG0_STOP_BGRB) != 0) 645 printf("%s: timeout waiting to stop bg rebuild\n", DEVNAME(sc)); 646 647 if (arc_msg0(sc, ARC_RA_INB_MSG0_FLUSH_CACHE) != 0) 648 printf("%s: timeout waiting to flush cache\n", DEVNAME(sc)); 649 650 return (0); 651 } 652 653 void 654 arc_shutdown(void *xsc) 655 { 656 struct arc_softc *sc = xsc; 657 658 if (arc_msg0(sc, ARC_RA_INB_MSG0_STOP_BGRB) != 0) 659 printf("%s: timeout waiting to stop bg rebuild\n", DEVNAME(sc)); 660 661 if (arc_msg0(sc, ARC_RA_INB_MSG0_FLUSH_CACHE) != 0) 662 printf("%s: timeout waiting to flush cache\n", DEVNAME(sc)); 663 } 664 665 int 666 arc_intr(void *arg) 667 { 668 struct arc_softc *sc = arg; 669 struct arc_ccb *ccb = NULL; 670 char *kva = ARC_DMA_KVA(sc->sc_requests); 671 struct arc_io_cmd *cmd; 672 u_int32_t reg, intrstat; 673 674 intrstat = arc_read(sc, ARC_RA_INTRSTAT); 675 if (intrstat == 0x0) 676 return (0); 677 intrstat &= ARC_RA_INTRSTAT_POSTQUEUE | ARC_RA_INTRSTAT_DOORBELL; 678 arc_write(sc, ARC_RA_INTRSTAT, intrstat); 679 680 if (intrstat & ARC_RA_INTRSTAT_DOORBELL) { 681 if (sc->sc_talking) { 682 /* if an ioctl is talking, wake it up */ 683 arc_write(sc, ARC_RA_INTRMASK, 684 ~ARC_RA_INTRMASK_POSTQUEUE); 685 wakeup(sc); 686 } else { 687 /* otherwise drop it */ 688 reg = arc_read(sc, ARC_RA_OUTB_DOORBELL); 689 arc_write(sc, ARC_RA_OUTB_DOORBELL, reg); 690 if (reg & ARC_RA_OUTB_DOORBELL_WRITE_OK) 691 arc_write(sc, ARC_RA_INB_DOORBELL, 692 ARC_RA_INB_DOORBELL_READ_OK); 693 } 694 } 695 696 while ((reg = arc_pop(sc)) != 0xffffffff) { 697 cmd = (struct arc_io_cmd *)(kva + 698 ((reg << ARC_RA_REPLY_QUEUE_ADDR_SHIFT) - 699 (u_int32_t)ARC_DMA_DVA(sc->sc_requests))); 700 ccb = &sc->sc_ccbs[letoh32(cmd->cmd.context)]; 701 702 bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests), 703 ccb->ccb_offset, ARC_MAX_IOCMDLEN, 704 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 705 706 arc_scsi_cmd_done(sc, ccb, reg); 707 } 708 709 return (1); 710 } 711 712 int 713 arc_scsi_cmd(struct scsi_xfer *xs) 714 { 715 struct scsi_link *link = xs->sc_link; 716 struct arc_softc *sc = link->adapter_softc; 717 struct arc_ccb *ccb; 718 struct arc_msg_scsicmd *cmd; 719 u_int32_t reg; 720 int rv = SUCCESSFULLY_QUEUED; 721 int s; 722 723 if (xs->cmdlen > ARC_MSG_CDBLEN) { 724 bzero(&xs->sense, sizeof(xs->sense)); 725 xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; 726 xs->sense.flags = SKEY_ILLEGAL_REQUEST; 727 xs->sense.add_sense_code = 0x20; 728 xs->error = XS_SENSE; 729 s = splbio(); 730 scsi_done(xs); 731 splx(s); 732 return (COMPLETE); 733 } 734 735 s = splbio(); 736 ccb = arc_get_ccb(sc); 737 splx(s); 738 if (ccb == NULL) { 739 xs->error = XS_DRIVER_STUFFUP; 740 s = splbio(); 741 scsi_done(xs); 742 splx(s); 743 return (COMPLETE); 744 } 745 746 ccb->ccb_xs = xs; 747 748 if (arc_load_xs(ccb) != 0) { 749 xs->error = XS_DRIVER_STUFFUP; 750 s = splbio(); 751 arc_put_ccb(sc, ccb); 752 scsi_done(xs); 753 splx(s); 754 return (COMPLETE); 755 } 756 757 cmd = &ccb->ccb_cmd->cmd; 758 reg = ccb->ccb_cmd_post; 759 760 /* bus is always 0 */ 761 cmd->target = link->target; 762 cmd->lun = link->lun; 763 cmd->function = 1; /* XXX magic number */ 764 765 cmd->cdb_len = xs->cmdlen; 766 cmd->sgl_len = ccb->ccb_dmamap->dm_nsegs; 767 if (xs->flags & SCSI_DATA_OUT) 768 cmd->flags = ARC_MSG_SCSICMD_FLAG_WRITE; 769 if (ccb->ccb_dmamap->dm_nsegs > ARC_SGL_256LEN) { 770 cmd->flags |= ARC_MSG_SCSICMD_FLAG_SGL_BSIZE_512; 771 reg |= ARC_RA_POST_QUEUE_BIGFRAME; 772 } 773 774 cmd->context = htole32(ccb->ccb_id); 775 cmd->data_len = htole32(xs->datalen); 776 777 bcopy(xs->cmd, cmd->cdb, xs->cmdlen); 778 779 /* we've built the command, let's put it on the hw */ 780 bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests), 781 ccb->ccb_offset, ARC_MAX_IOCMDLEN, 782 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 783 784 s = splbio(); 785 arc_push(sc, reg); 786 if (xs->flags & SCSI_POLL) { 787 rv = COMPLETE; 788 if (arc_complete(sc, ccb, xs->timeout) != 0) { 789 xs->error = XS_DRIVER_STUFFUP; 790 scsi_done(xs); 791 } 792 } 793 splx(s); 794 795 return (rv); 796 } 797 798 int 799 arc_load_xs(struct arc_ccb *ccb) 800 { 801 struct arc_softc *sc = ccb->ccb_sc; 802 struct scsi_xfer *xs = ccb->ccb_xs; 803 bus_dmamap_t dmap = ccb->ccb_dmamap; 804 struct arc_sge *sgl = ccb->ccb_cmd->sgl, *sge; 805 u_int64_t addr; 806 int i, error; 807 808 if (xs->datalen == 0) 809 return (0); 810 811 error = bus_dmamap_load(sc->sc_dmat, dmap, 812 xs->data, xs->datalen, NULL, 813 (xs->flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 814 if (error != 0) { 815 printf("%s: error %d loading dmamap\n", DEVNAME(sc), error); 816 return (1); 817 } 818 819 for (i = 0; i < dmap->dm_nsegs; i++) { 820 sge = &sgl[i]; 821 822 sge->sg_hdr = htole32(ARC_SGE_64BIT | dmap->dm_segs[i].ds_len); 823 addr = dmap->dm_segs[i].ds_addr; 824 sge->sg_hi_addr = htole32((u_int32_t)(addr >> 32)); 825 sge->sg_lo_addr = htole32((u_int32_t)addr); 826 } 827 828 bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize, 829 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 830 BUS_DMASYNC_PREWRITE); 831 832 return (0); 833 } 834 835 void 836 arc_scsi_cmd_done(struct arc_softc *sc, struct arc_ccb *ccb, u_int32_t reg) 837 { 838 struct scsi_xfer *xs = ccb->ccb_xs; 839 struct arc_msg_scsicmd *cmd; 840 841 if (xs->datalen != 0) { 842 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 843 ccb->ccb_dmamap->dm_mapsize, (xs->flags & SCSI_DATA_IN) ? 844 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 845 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 846 } 847 848 /* timeout_del */ 849 xs->flags |= ITSDONE; 850 851 if (reg & ARC_RA_REPLY_QUEUE_ERR) { 852 cmd = &ccb->ccb_cmd->cmd; 853 854 switch (cmd->status) { 855 case ARC_MSG_STATUS_SELTIMEOUT: 856 case ARC_MSG_STATUS_ABORTED: 857 case ARC_MSG_STATUS_INIT_FAIL: 858 xs->status = SCSI_OK; 859 xs->error = XS_SELTIMEOUT; 860 break; 861 862 case SCSI_CHECK: 863 bzero(&xs->sense, sizeof(xs->sense)); 864 bcopy(cmd->sense_data, &xs->sense, 865 min(ARC_MSG_SENSELEN, sizeof(xs->sense))); 866 xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; 867 xs->status = SCSI_CHECK; 868 xs->error = XS_SENSE; 869 xs->resid = 0; 870 break; 871 872 default: 873 /* unknown device status */ 874 xs->error = XS_BUSY; /* try again later? */ 875 xs->status = SCSI_BUSY; 876 break; 877 } 878 } else { 879 xs->status = SCSI_OK; 880 xs->error = XS_NOERROR; 881 xs->resid = 0; 882 } 883 884 arc_put_ccb(sc, ccb); 885 scsi_done(xs); 886 } 887 888 int 889 arc_complete(struct arc_softc *sc, struct arc_ccb *nccb, int timeout) 890 { 891 struct arc_ccb *ccb = NULL; 892 char *kva = ARC_DMA_KVA(sc->sc_requests); 893 struct arc_io_cmd *cmd; 894 u_int32_t reg; 895 896 do { 897 reg = arc_pop(sc); 898 if (reg == 0xffffffff) { 899 if (timeout-- == 0) 900 return (1); 901 902 delay(1000); 903 continue; 904 } 905 906 cmd = (struct arc_io_cmd *)(kva + 907 ((reg << ARC_RA_REPLY_QUEUE_ADDR_SHIFT) - 908 ARC_DMA_DVA(sc->sc_requests))); 909 ccb = &sc->sc_ccbs[letoh32(cmd->cmd.context)]; 910 911 bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests), 912 ccb->ccb_offset, ARC_MAX_IOCMDLEN, 913 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 914 915 arc_scsi_cmd_done(sc, ccb, reg); 916 } while (nccb != ccb); 917 918 return (0); 919 } 920 921 void 922 arc_minphys(struct buf *bp, struct scsi_link *sl) 923 { 924 if (bp->b_bcount > MAXPHYS) 925 bp->b_bcount = MAXPHYS; 926 minphys(bp); 927 } 928 929 int 930 arc_map_pci_resources(struct arc_softc *sc, struct pci_attach_args *pa) 931 { 932 pcireg_t memtype; 933 pci_intr_handle_t ih; 934 935 sc->sc_pc = pa->pa_pc; 936 sc->sc_tag = pa->pa_tag; 937 sc->sc_dmat = pa->pa_dmat; 938 939 memtype = pci_mapreg_type(sc->sc_pc, sc->sc_tag, ARC_RA_PCI_BAR); 940 if (pci_mapreg_map(pa, ARC_RA_PCI_BAR, memtype, 0, &sc->sc_iot, 941 &sc->sc_ioh, NULL, &sc->sc_ios, 0) != 0) { 942 printf(": unable to map system interface register\n"); 943 return(1); 944 } 945 946 if (pci_intr_map(pa, &ih) != 0) { 947 printf(": unable to map interrupt\n"); 948 goto unmap; 949 } 950 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, 951 arc_intr, sc, DEVNAME(sc)); 952 if (sc->sc_ih == NULL) { 953 printf(": unable to map interrupt\n"); 954 goto unmap; 955 } 956 printf(": %s\n", pci_intr_string(pa->pa_pc, ih)); 957 958 return (0); 959 960 unmap: 961 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 962 sc->sc_ios = 0; 963 return (1); 964 } 965 966 void 967 arc_unmap_pci_resources(struct arc_softc *sc) 968 { 969 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 970 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 971 sc->sc_ios = 0; 972 } 973 974 int 975 arc_intel_query_firmware(struct arc_softc *sc) 976 { 977 struct arc_msg_firmware_info fwinfo; 978 char string[81]; /* sizeof(vendor)*2+1 */ 979 980 if (arc_wait_eq(sc, ARC_RA_OUTB_ADDR1, ARC_RA_OUTB_ADDR1_FIRMWARE_OK, 981 ARC_RA_OUTB_ADDR1_FIRMWARE_OK) != 0) { 982 printf("%s: timeout waiting for firmware ok\n", DEVNAME(sc)); 983 return (1); 984 } 985 986 if (arc_msg0(sc, ARC_RA_INB_MSG0_GET_CONFIG) != 0) { 987 printf("%s: timeout waiting for get config\n", DEVNAME(sc)); 988 return (1); 989 } 990 991 arc_read_region(sc, ARC_RA_MSGBUF, &fwinfo, sizeof(fwinfo)); 992 993 DNPRINTF(ARC_D_INIT, "%s: signature: 0x%08x\n", DEVNAME(sc), 994 letoh32(fwinfo.signature)); 995 996 if (letoh32(fwinfo.signature) != ARC_FWINFO_SIGNATURE_GET_CONFIG) { 997 printf("%s: invalid firmware info from iop\n", DEVNAME(sc)); 998 return (1); 999 } 1000 1001 DNPRINTF(ARC_D_INIT, "%s: request_len: %d\n", DEVNAME(sc), 1002 letoh32(fwinfo.request_len)); 1003 DNPRINTF(ARC_D_INIT, "%s: queue_len: %d\n", DEVNAME(sc), 1004 letoh32(fwinfo.queue_len)); 1005 DNPRINTF(ARC_D_INIT, "%s: sdram_size: %d\n", DEVNAME(sc), 1006 letoh32(fwinfo.sdram_size)); 1007 DNPRINTF(ARC_D_INIT, "%s: sata_ports: %d\n", DEVNAME(sc), 1008 letoh32(fwinfo.sata_ports), letoh32(fwinfo.sata_ports)); 1009 1010 #ifdef ARC_DEBUG 1011 scsi_strvis(string, fwinfo.vendor, sizeof(fwinfo.vendor)); 1012 DNPRINTF(ARC_D_INIT, "%s: vendor: \"%s\"\n", DEVNAME(sc), string); 1013 scsi_strvis(string, fwinfo.model, sizeof(fwinfo.model)); 1014 DNPRINTF(ARC_D_INIT, "%s: model: \"%s\"\n", DEVNAME(sc), string); 1015 #endif /* ARC_DEBUG */ 1016 1017 scsi_strvis(string, fwinfo.fw_version, sizeof(fwinfo.fw_version)); 1018 DNPRINTF(ARC_D_INIT, "%s: model: \"%s\"\n", DEVNAME(sc), string); 1019 1020 if (letoh32(fwinfo.request_len) != ARC_MAX_IOCMDLEN) { 1021 printf("%s: unexpected request frame size (%d != %d)\n", 1022 DEVNAME(sc), letoh32(fwinfo.request_len), ARC_MAX_IOCMDLEN); 1023 return (1); 1024 } 1025 1026 sc->sc_req_count = letoh32(fwinfo.queue_len); 1027 1028 if (arc_msg0(sc, ARC_RA_INB_MSG0_START_BGRB) != 0) { 1029 printf("%s: timeout waiting to start bg rebuild\n", 1030 DEVNAME(sc)); 1031 return (1); 1032 } 1033 1034 printf("%s: %d ports, %dMB SDRAM, firmware %s\n", 1035 DEVNAME(sc), letoh32(fwinfo.sata_ports), 1036 letoh32(fwinfo.sdram_size), string); 1037 1038 return (0); 1039 } 1040 1041 int 1042 arc_marvell_query_firmware(struct arc_softc *sc) 1043 { 1044 if (arc_wait_eq(sc, ARC_RB_IOP2DRV_DOORBELL, 1045 ARC_RA_OUTB_ADDR1_FIRMWARE_OK, 1046 ARC_RA_OUTB_ADDR1_FIRMWARE_OK) != 0) { 1047 printf("%s: timeout waiting for firmware ok\n", DEVNAME(sc)); 1048 return (1); 1049 } 1050 1051 return (1); 1052 } 1053 1054 #if NBIO > 0 1055 int 1056 arc_bioctl(struct device *self, u_long cmd, caddr_t addr) 1057 { 1058 struct arc_softc *sc = (struct arc_softc *)self; 1059 int error = 0; 1060 1061 switch (cmd) { 1062 case BIOCINQ: 1063 error = arc_bio_inq(sc, (struct bioc_inq *)addr); 1064 break; 1065 1066 case BIOCVOL: 1067 error = arc_bio_vol(sc, (struct bioc_vol *)addr); 1068 break; 1069 1070 case BIOCDISK: 1071 error = arc_bio_disk(sc, (struct bioc_disk *)addr); 1072 break; 1073 1074 case BIOCALARM: 1075 error = arc_bio_alarm(sc, (struct bioc_alarm *)addr); 1076 break; 1077 1078 case BIOCBLINK: 1079 error = arc_bio_blink(sc, (struct bioc_blink *)addr); 1080 break; 1081 1082 default: 1083 error = ENOTTY; 1084 break; 1085 } 1086 1087 return (error); 1088 } 1089 1090 int 1091 arc_bio_alarm(struct arc_softc *sc, struct bioc_alarm *ba) 1092 { 1093 u_int8_t request[2]; 1094 u_int8_t reply[1]; 1095 size_t len; 1096 int error = 0; 1097 1098 switch (ba->ba_opcode) { 1099 case BIOC_SAENABLE: 1100 case BIOC_SADISABLE: 1101 request[0] = ARC_FW_SET_ALARM; 1102 request[1] = (ba->ba_opcode == BIOC_SAENABLE) ? 1103 ARC_FW_SET_ALARM_ENABLE : ARC_FW_SET_ALARM_DISABLE; 1104 len = sizeof(request); 1105 1106 break; 1107 1108 case BIOC_SASILENCE: 1109 request[0] = ARC_FW_MUTE_ALARM; 1110 len = 1; 1111 1112 break; 1113 1114 case BIOC_GASTATUS: 1115 /* system info is too big/ugly to deal with here */ 1116 return (arc_bio_alarm_state(sc, ba)); 1117 1118 default: 1119 return (EOPNOTSUPP); 1120 } 1121 1122 arc_lock(sc); 1123 error = arc_msgbuf(sc, request, len, reply, sizeof(reply), 0); 1124 arc_unlock(sc); 1125 1126 if (error != 0) 1127 return (error); 1128 1129 switch (reply[0]) { 1130 case ARC_FW_CMD_OK: 1131 return (0); 1132 case ARC_FW_CMD_PASS_REQD: 1133 return (EPERM); 1134 default: 1135 return (EIO); 1136 } 1137 } 1138 1139 int 1140 arc_bio_alarm_state(struct arc_softc *sc, struct bioc_alarm *ba) 1141 { 1142 u_int8_t request = ARC_FW_SYSINFO; 1143 struct arc_fw_sysinfo *sysinfo; 1144 int error = 0; 1145 1146 sysinfo = malloc(sizeof(struct arc_fw_sysinfo), M_TEMP, M_WAITOK); 1147 1148 request = ARC_FW_SYSINFO; 1149 1150 arc_lock(sc); 1151 error = arc_msgbuf(sc, &request, sizeof(request), 1152 sysinfo, sizeof(struct arc_fw_sysinfo), 0); 1153 arc_unlock(sc); 1154 1155 if (error != 0) 1156 goto out; 1157 1158 ba->ba_status = sysinfo->alarm; 1159 1160 out: 1161 free(sysinfo, M_TEMP); 1162 return (error); 1163 } 1164 1165 1166 int 1167 arc_bio_inq(struct arc_softc *sc, struct bioc_inq *bi) 1168 { 1169 u_int8_t request[2]; 1170 struct arc_fw_sysinfo *sysinfo; 1171 struct arc_fw_volinfo *volinfo; 1172 int maxvols, nvols = 0, i; 1173 int error = 0; 1174 1175 sysinfo = malloc(sizeof(struct arc_fw_sysinfo), M_TEMP, M_WAITOK); 1176 volinfo = malloc(sizeof(struct arc_fw_volinfo), M_TEMP, M_WAITOK); 1177 1178 arc_lock(sc); 1179 1180 request[0] = ARC_FW_SYSINFO; 1181 error = arc_msgbuf(sc, request, 1, sysinfo, 1182 sizeof(struct arc_fw_sysinfo), 0); 1183 if (error != 0) 1184 goto out; 1185 1186 maxvols = sysinfo->max_volume_set; 1187 1188 request[0] = ARC_FW_VOLINFO; 1189 for (i = 0; i < maxvols; i++) { 1190 request[1] = i; 1191 error = arc_msgbuf(sc, request, sizeof(request), volinfo, 1192 sizeof(struct arc_fw_volinfo), 0); 1193 if (error != 0) 1194 goto out; 1195 1196 /* 1197 * I can't find an easy way to see if the volume exists or not 1198 * except to say that if it has no capacity then it isn't there. 1199 * Ignore passthru volumes, bioc_vol doesn't understand them. 1200 */ 1201 if ((volinfo->capacity != 0 || volinfo->capacity2 != 0) && 1202 volinfo->raid_level != ARC_FW_VOL_RAIDLEVEL_PASSTHRU) 1203 nvols++; 1204 } 1205 1206 strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev)); 1207 bi->bi_novol = nvols; 1208 out: 1209 arc_unlock(sc); 1210 free(volinfo, M_TEMP); 1211 free(sysinfo, M_TEMP); 1212 return (error); 1213 } 1214 1215 int 1216 arc_bio_blink(struct arc_softc *sc, struct bioc_blink *blink) 1217 { 1218 u_int8_t request[5]; 1219 u_int32_t mask; 1220 int error = 0; 1221 1222 request[0] = ARC_FW_BLINK; 1223 request[1] = ARC_FW_BLINK_ENABLE; 1224 1225 switch (blink->bb_status) { 1226 case BIOC_SBUNBLINK: 1227 sc->sc_ledmask &= ~(1 << blink->bb_target); 1228 break; 1229 case BIOC_SBBLINK: 1230 sc->sc_ledmask |= (1 << blink->bb_target); 1231 break; 1232 default: 1233 return (EINVAL); 1234 } 1235 1236 mask = htole32(sc->sc_ledmask); 1237 bcopy(&mask, &request[2], 3); 1238 1239 error = arc_msgbuf(sc, request, sizeof(request), NULL, 0, 0); 1240 if (error) 1241 return (EIO); 1242 1243 return (0); 1244 } 1245 1246 int 1247 arc_bio_getvol(struct arc_softc *sc, int vol, struct arc_fw_volinfo *volinfo) 1248 { 1249 u_int8_t request[2]; 1250 struct arc_fw_sysinfo *sysinfo; 1251 int error = 0; 1252 int maxvols, nvols = 0, i; 1253 1254 sysinfo = malloc(sizeof(struct arc_fw_sysinfo), M_TEMP, M_WAITOK); 1255 1256 request[0] = ARC_FW_SYSINFO; 1257 error = arc_msgbuf(sc, request, 1, sysinfo, 1258 sizeof(struct arc_fw_sysinfo), 0); 1259 if (error != 0) 1260 goto out; 1261 1262 maxvols = sysinfo->max_volume_set; 1263 1264 request[0] = ARC_FW_VOLINFO; 1265 for (i = 0; i < maxvols; i++) { 1266 request[1] = i; 1267 error = arc_msgbuf(sc, request, sizeof(request), volinfo, 1268 sizeof(struct arc_fw_volinfo), 0); 1269 if (error != 0) 1270 goto out; 1271 1272 if ((volinfo->capacity == 0 && volinfo->capacity2 == 0) || 1273 volinfo->raid_level == ARC_FW_VOL_RAIDLEVEL_PASSTHRU) 1274 continue; 1275 1276 if (nvols == vol) 1277 break; 1278 1279 nvols++; 1280 } 1281 1282 if (nvols != vol || 1283 (volinfo->capacity == 0 && volinfo->capacity2 == 0) || 1284 volinfo->raid_level == ARC_FW_VOL_RAIDLEVEL_PASSTHRU) { 1285 error = ENODEV; 1286 goto out; 1287 } 1288 1289 out: 1290 free(sysinfo, M_TEMP); 1291 return (error); 1292 } 1293 1294 int 1295 arc_bio_vol(struct arc_softc *sc, struct bioc_vol *bv) 1296 { 1297 struct arc_fw_volinfo *volinfo; 1298 struct scsi_link *sc_link; 1299 struct device *dev; 1300 u_int64_t blocks; 1301 u_int32_t status; 1302 int error = 0; 1303 1304 volinfo = malloc(sizeof(struct arc_fw_volinfo), M_TEMP, M_WAITOK); 1305 1306 arc_lock(sc); 1307 error = arc_bio_getvol(sc, bv->bv_volid, volinfo); 1308 arc_unlock(sc); 1309 1310 if (error != 0) 1311 goto out; 1312 1313 bv->bv_percent = -1; 1314 bv->bv_seconds = 0; 1315 1316 status = letoh32(volinfo->volume_status); 1317 if (status == 0x0) { 1318 if (letoh32(volinfo->fail_mask) == 0x0) 1319 bv->bv_status = BIOC_SVONLINE; 1320 else 1321 bv->bv_status = BIOC_SVDEGRADED; 1322 } else if (status & ARC_FW_VOL_STATUS_NEED_REGEN) 1323 bv->bv_status = BIOC_SVDEGRADED; 1324 else if (status & ARC_FW_VOL_STATUS_FAILED) 1325 bv->bv_status = BIOC_SVOFFLINE; 1326 else if (status & ARC_FW_VOL_STATUS_INITTING) { 1327 bv->bv_status = BIOC_SVBUILDING; 1328 bv->bv_percent = letoh32(volinfo->progress) / 10; 1329 } else if (status & ARC_FW_VOL_STATUS_REBUILDING) { 1330 bv->bv_status = BIOC_SVREBUILD; 1331 bv->bv_percent = letoh32(volinfo->progress) / 10; 1332 } 1333 1334 blocks = (u_int64_t)letoh32(volinfo->capacity2) << 32; 1335 blocks += (u_int64_t)letoh32(volinfo->capacity); 1336 bv->bv_size = blocks * ARC_BLOCKSIZE; /* XXX */ 1337 1338 switch (volinfo->raid_level) { 1339 case ARC_FW_VOL_RAIDLEVEL_0: 1340 bv->bv_level = 0; 1341 break; 1342 case ARC_FW_VOL_RAIDLEVEL_1: 1343 bv->bv_level = 1; 1344 break; 1345 case ARC_FW_VOL_RAIDLEVEL_3: 1346 bv->bv_level = 3; 1347 break; 1348 case ARC_FW_VOL_RAIDLEVEL_5: 1349 bv->bv_level = 5; 1350 break; 1351 case ARC_FW_VOL_RAIDLEVEL_6: 1352 bv->bv_level = 6; 1353 break; 1354 case ARC_FW_VOL_RAIDLEVEL_PASSTHRU: 1355 default: 1356 bv->bv_level = -1; 1357 break; 1358 } 1359 1360 bv->bv_nodisk = volinfo->member_disks; 1361 sc_link = sc->sc_scsibus->sc_link[volinfo->scsi_attr.target] 1362 [volinfo->scsi_attr.lun]; 1363 if (sc_link != NULL) { 1364 dev = sc_link->device_softc; 1365 strlcpy(bv->bv_dev, dev->dv_xname, sizeof(bv->bv_dev)); 1366 } 1367 1368 out: 1369 free(volinfo, M_TEMP); 1370 return (error); 1371 } 1372 1373 int 1374 arc_bio_disk(struct arc_softc *sc, struct bioc_disk *bd) 1375 { 1376 u_int8_t request[2]; 1377 struct arc_fw_volinfo *volinfo; 1378 struct arc_fw_raidinfo *raidinfo; 1379 struct arc_fw_diskinfo *diskinfo; 1380 int error = 0; 1381 u_int64_t blocks; 1382 char model[81]; 1383 char serial[41]; 1384 char rev[17]; 1385 1386 volinfo = malloc(sizeof(struct arc_fw_volinfo), M_TEMP, M_WAITOK); 1387 raidinfo = malloc(sizeof(struct arc_fw_raidinfo), M_TEMP, M_WAITOK); 1388 diskinfo = malloc(sizeof(struct arc_fw_diskinfo), M_TEMP, M_WAITOK); 1389 1390 arc_lock(sc); 1391 1392 error = arc_bio_getvol(sc, bd->bd_volid, volinfo); 1393 if (error != 0) 1394 goto out; 1395 1396 request[0] = ARC_FW_RAIDINFO; 1397 request[1] = volinfo->raid_set_number; 1398 error = arc_msgbuf(sc, request, sizeof(request), raidinfo, 1399 sizeof(struct arc_fw_raidinfo), 0); 1400 if (error != 0) 1401 goto out; 1402 1403 if (bd->bd_diskid > raidinfo->member_devices) { 1404 error = ENODEV; 1405 goto out; 1406 } 1407 1408 if (raidinfo->device_array[bd->bd_diskid] == 0xff) { 1409 /* 1410 * the disk doesn't exist anymore. bio is too dumb to be 1411 * able to display that, so put it on another bus 1412 */ 1413 bd->bd_channel = 1; 1414 bd->bd_target = 0; 1415 bd->bd_lun = 0; 1416 bd->bd_status = BIOC_SDOFFLINE; 1417 strlcpy(bd->bd_vendor, "disk missing", sizeof(bd->bd_vendor)); 1418 goto out; 1419 } 1420 1421 request[0] = ARC_FW_DISKINFO; 1422 request[1] = raidinfo->device_array[bd->bd_diskid]; 1423 error = arc_msgbuf(sc, request, sizeof(request), diskinfo, 1424 sizeof(struct arc_fw_diskinfo), 1); 1425 if (error != 0) 1426 goto out; 1427 1428 #if 0 1429 bd->bd_channel = diskinfo->scsi_attr.channel; 1430 bd->bd_target = diskinfo->scsi_attr.target; 1431 bd->bd_lun = diskinfo->scsi_attr.lun; 1432 #endif 1433 /* 1434 * the firwmare doesnt seem to fill scsi_attr in, so fake it with 1435 * the diskid. 1436 */ 1437 bd->bd_channel = 0; 1438 bd->bd_target = raidinfo->device_array[bd->bd_diskid]; 1439 bd->bd_lun = 0; 1440 1441 bd->bd_status = BIOC_SDONLINE; 1442 blocks = (u_int64_t)letoh32(diskinfo->capacity2) << 32; 1443 blocks += (u_int64_t)letoh32(diskinfo->capacity); 1444 bd->bd_size = blocks * ARC_BLOCKSIZE; /* XXX */ 1445 1446 scsi_strvis(model, diskinfo->model, sizeof(diskinfo->model)); 1447 scsi_strvis(serial, diskinfo->serial, sizeof(diskinfo->serial)); 1448 scsi_strvis(rev, diskinfo->firmware_rev, 1449 sizeof(diskinfo->firmware_rev)); 1450 1451 snprintf(bd->bd_vendor, sizeof(bd->bd_vendor), "%s %s", 1452 model, rev); 1453 strlcpy(bd->bd_serial, serial, sizeof(bd->bd_serial)); 1454 1455 out: 1456 arc_unlock(sc); 1457 free(diskinfo, M_TEMP); 1458 free(raidinfo, M_TEMP); 1459 free(volinfo, M_TEMP); 1460 return (error); 1461 } 1462 1463 u_int8_t 1464 arc_msg_cksum(void *cmd, u_int16_t len) 1465 { 1466 u_int8_t *buf = cmd; 1467 u_int8_t cksum; 1468 int i; 1469 1470 cksum = (u_int8_t)(len >> 8) + (u_int8_t)len; 1471 for (i = 0; i < len; i++) 1472 cksum += buf[i]; 1473 1474 return (cksum); 1475 } 1476 1477 1478 int 1479 arc_msgbuf(struct arc_softc *sc, void *wptr, size_t wbuflen, void *rptr, 1480 size_t rbuflen, int sreadok) 1481 { 1482 u_int8_t rwbuf[ARC_RA_IOC_RWBUF_MAXLEN]; 1483 u_int8_t *wbuf, *rbuf; 1484 int wlen, wdone = 0, rlen, rdone = 0; 1485 u_int16_t rlenhdr = 0; 1486 struct arc_fw_bufhdr *bufhdr; 1487 u_int32_t reg, rwlen; 1488 int error = 0; 1489 #ifdef ARC_DEBUG 1490 int i; 1491 #endif 1492 1493 DNPRINTF(ARC_D_DB, "%s: arc_msgbuf wbuflen: %d rbuflen: %d\n", 1494 DEVNAME(sc), wbuflen, rbuflen); 1495 1496 if (arc_read(sc, ARC_RA_OUTB_DOORBELL) != 0) 1497 return (EBUSY); 1498 1499 wlen = sizeof(struct arc_fw_bufhdr) + wbuflen + 1; /* 1 for cksum */ 1500 wbuf = malloc(wlen, M_TEMP, M_WAITOK); 1501 1502 rlen = sizeof(struct arc_fw_bufhdr) + rbuflen + 1; /* 1 for cksum */ 1503 rbuf = malloc(rlen, M_TEMP, M_WAITOK); 1504 1505 DNPRINTF(ARC_D_DB, "%s: arc_msgbuf wlen: %d rlen: %d\n", DEVNAME(sc), 1506 wlen, rlen); 1507 1508 bufhdr = (struct arc_fw_bufhdr *)wbuf; 1509 bufhdr->hdr = arc_fw_hdr; 1510 bufhdr->len = htole16(wbuflen); 1511 bcopy(wptr, wbuf + sizeof(struct arc_fw_bufhdr), wbuflen); 1512 wbuf[wlen - 1] = arc_msg_cksum(wptr, wbuflen); 1513 1514 reg = ARC_RA_OUTB_DOORBELL_READ_OK; 1515 1516 do { 1517 if ((reg & ARC_RA_OUTB_DOORBELL_READ_OK) && wdone < wlen) { 1518 bzero(rwbuf, sizeof(rwbuf)); 1519 rwlen = (wlen - wdone) % sizeof(rwbuf); 1520 bcopy(&wbuf[wdone], rwbuf, rwlen); 1521 1522 #ifdef ARC_DEBUG 1523 if (arcdebug & ARC_D_DB) { 1524 printf("%s: write %d:", DEVNAME(sc), rwlen); 1525 for (i = 0; i < rwlen; i++) 1526 printf(" 0x%02x", rwbuf[i]); 1527 printf("\n"); 1528 } 1529 #endif 1530 1531 /* copy the chunk to the hw */ 1532 arc_write(sc, ARC_RA_IOC_WBUF_LEN, rwlen); 1533 arc_write_region(sc, ARC_RA_IOC_WBUF, rwbuf, 1534 sizeof(rwbuf)); 1535 1536 /* say we have a buffer for the hw */ 1537 arc_write(sc, ARC_RA_INB_DOORBELL, 1538 ARC_RA_INB_DOORBELL_WRITE_OK); 1539 1540 wdone += rwlen; 1541 } 1542 1543 if (rptr == NULL) 1544 goto out; 1545 1546 while ((reg = arc_read(sc, ARC_RA_OUTB_DOORBELL)) == 0) 1547 arc_wait(sc); 1548 arc_write(sc, ARC_RA_OUTB_DOORBELL, reg); 1549 1550 DNPRINTF(ARC_D_DB, "%s: reg: 0x%08x\n", DEVNAME(sc), reg); 1551 1552 if ((reg & ARC_RA_OUTB_DOORBELL_WRITE_OK) && rdone < rlen) { 1553 rwlen = arc_read(sc, ARC_RA_IOC_RBUF_LEN); 1554 if (rwlen > sizeof(rwbuf)) { 1555 DNPRINTF(ARC_D_DB, "%s: rwlen too big\n", 1556 DEVNAME(sc)); 1557 error = EIO; 1558 goto out; 1559 } 1560 1561 arc_read_region(sc, ARC_RA_IOC_RBUF, rwbuf, 1562 sizeof(rwbuf)); 1563 1564 arc_write(sc, ARC_RA_INB_DOORBELL, 1565 ARC_RA_INB_DOORBELL_READ_OK); 1566 1567 #ifdef ARC_DEBUG 1568 printf("%s: len: %d+%d=%d/%d\n", DEVNAME(sc), 1569 rwlen, rdone, rwlen + rdone, rlen); 1570 if (arcdebug & ARC_D_DB) { 1571 printf("%s: read:", DEVNAME(sc)); 1572 for (i = 0; i < rwlen; i++) 1573 printf(" 0x%02x", rwbuf[i]); 1574 printf("\n"); 1575 } 1576 #endif 1577 1578 if ((rdone + rwlen) > rlen) { 1579 DNPRINTF(ARC_D_DB, "%s: rwbuf too big\n", 1580 DEVNAME(sc)); 1581 error = EIO; 1582 goto out; 1583 } 1584 1585 bcopy(rwbuf, &rbuf[rdone], rwlen); 1586 rdone += rwlen; 1587 1588 /* 1589 * Allow for short reads, by reading the length 1590 * value from the response header and shrinking our 1591 * idea of size, if required. 1592 * This deals with the growth of diskinfo struct from 1593 * 128 to 132 bytes. 1594 */ 1595 if (sreadok && rdone >= sizeof(struct arc_fw_bufhdr) && 1596 rlenhdr == 0) { 1597 bufhdr = (struct arc_fw_bufhdr *)rbuf; 1598 rlenhdr = letoh16(bufhdr->len); 1599 if (rlenhdr < rbuflen) { 1600 rbuflen = rlenhdr; 1601 rlen = sizeof(struct arc_fw_bufhdr) + 1602 rbuflen + 1; /* 1 for cksum */ 1603 } 1604 } 1605 } 1606 } while (rdone != rlen); 1607 1608 bufhdr = (struct arc_fw_bufhdr *)rbuf; 1609 if (memcmp(&bufhdr->hdr, &arc_fw_hdr, sizeof(bufhdr->hdr)) != 0 || 1610 bufhdr->len != htole16(rbuflen)) { 1611 DNPRINTF(ARC_D_DB, "%s: rbuf hdr is wrong\n", DEVNAME(sc)); 1612 error = EIO; 1613 goto out; 1614 } 1615 1616 bcopy(rbuf + sizeof(struct arc_fw_bufhdr), rptr, rbuflen); 1617 1618 if (rbuf[rlen - 1] != arc_msg_cksum(rptr, rbuflen)) { 1619 DNPRINTF(ARC_D_DB, "%s: invalid cksum\n", DEVNAME(sc)); 1620 error = EIO; 1621 goto out; 1622 } 1623 1624 out: 1625 free(wbuf, M_TEMP); 1626 free(rbuf, M_TEMP); 1627 1628 return (error); 1629 } 1630 1631 void 1632 arc_lock(struct arc_softc *sc) 1633 { 1634 int s; 1635 1636 rw_enter_write(&sc->sc_lock); 1637 s = splbio(); 1638 arc_write(sc, ARC_RA_INTRMASK, ~ARC_RA_INTRMASK_POSTQUEUE); 1639 sc->sc_talking = 1; 1640 splx(s); 1641 } 1642 1643 void 1644 arc_unlock(struct arc_softc *sc) 1645 { 1646 int s; 1647 1648 s = splbio(); 1649 sc->sc_talking = 0; 1650 arc_write(sc, ARC_RA_INTRMASK, 1651 ~(ARC_RA_INTRMASK_POSTQUEUE|ARC_RA_INTRMASK_DOORBELL)); 1652 splx(s); 1653 rw_exit_write(&sc->sc_lock); 1654 } 1655 1656 void 1657 arc_wait(struct arc_softc *sc) 1658 { 1659 int s; 1660 1661 s = splbio(); 1662 arc_write(sc, ARC_RA_INTRMASK, 1663 ~(ARC_RA_INTRMASK_POSTQUEUE|ARC_RA_INTRMASK_DOORBELL)); 1664 if (tsleep(sc, PWAIT, "arcdb", hz) == EWOULDBLOCK) 1665 arc_write(sc, ARC_RA_INTRMASK, ~ARC_RA_INTRMASK_POSTQUEUE); 1666 splx(s); 1667 } 1668 1669 #ifndef SMALL_KERNEL 1670 void 1671 arc_create_sensors(void *xsc, void *arg) 1672 { 1673 struct arc_softc *sc = xsc; 1674 struct bioc_inq bi; 1675 struct bioc_vol bv; 1676 int i; 1677 1678 /* 1679 * XXX * this is bollocks. the firmware has garbage coming out of it 1680 * so we have to wait a bit for it to finish spewing. 1681 */ 1682 tsleep(sc, PWAIT, "arcspew", 2 * hz); 1683 1684 bzero(&bi, sizeof(bi)); 1685 if (arc_bio_inq(sc, &bi) != 0) { 1686 printf("%s: unable to query firmware for sensor info\n", 1687 DEVNAME(sc)); 1688 return; 1689 } 1690 sc->sc_nsensors = bi.bi_novol; 1691 1692 sc->sc_sensors = malloc(sizeof(struct ksensor) * sc->sc_nsensors, 1693 M_DEVBUF, M_WAITOK | M_ZERO); 1694 1695 strlcpy(sc->sc_sensordev.xname, DEVNAME(sc), 1696 sizeof(sc->sc_sensordev.xname)); 1697 1698 for (i = 0; i < sc->sc_nsensors; i++) { 1699 bzero(&bv, sizeof(bv)); 1700 bv.bv_volid = i; 1701 if (arc_bio_vol(sc, &bv) != 0) 1702 goto bad; 1703 1704 sc->sc_sensors[i].type = SENSOR_DRIVE; 1705 sc->sc_sensors[i].status = SENSOR_S_UNKNOWN; 1706 1707 strlcpy(sc->sc_sensors[i].desc, bv.bv_dev, 1708 sizeof(sc->sc_sensors[i].desc)); 1709 1710 sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]); 1711 } 1712 1713 if (sensor_task_register(sc, arc_refresh_sensors, 120) == NULL) 1714 goto bad; 1715 1716 sensordev_install(&sc->sc_sensordev); 1717 1718 return; 1719 1720 bad: 1721 free(sc->sc_sensors, M_DEVBUF); 1722 } 1723 1724 void 1725 arc_refresh_sensors(void *arg) 1726 { 1727 struct arc_softc *sc = arg; 1728 struct bioc_vol bv; 1729 int i; 1730 1731 for (i = 0; i < sc->sc_nsensors; i++) { 1732 bzero(&bv, sizeof(bv)); 1733 bv.bv_volid = i; 1734 if (arc_bio_vol(sc, &bv)) { 1735 sc->sc_sensors[i].flags = SENSOR_FINVALID; 1736 return; 1737 } 1738 1739 switch(bv.bv_status) { 1740 case BIOC_SVOFFLINE: 1741 sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL; 1742 sc->sc_sensors[i].status = SENSOR_S_CRIT; 1743 break; 1744 1745 case BIOC_SVDEGRADED: 1746 sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL; 1747 sc->sc_sensors[i].status = SENSOR_S_WARN; 1748 break; 1749 1750 case BIOC_SVSCRUB: 1751 case BIOC_SVONLINE: 1752 sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE; 1753 sc->sc_sensors[i].status = SENSOR_S_OK; 1754 break; 1755 1756 case BIOC_SVINVALID: 1757 /* FALLTRHOUGH */ 1758 default: 1759 sc->sc_sensors[i].value = 0; /* unknown */ 1760 sc->sc_sensors[i].status = SENSOR_S_UNKNOWN; 1761 } 1762 1763 } 1764 } 1765 #endif /* SMALL_KERNEL */ 1766 #endif /* NBIO > 0 */ 1767 1768 u_int32_t 1769 arc_read(struct arc_softc *sc, bus_size_t r) 1770 { 1771 u_int32_t v; 1772 1773 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1774 BUS_SPACE_BARRIER_READ); 1775 v = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 1776 1777 DNPRINTF(ARC_D_RW, "%s: arc_read 0x%x 0x%08x\n", DEVNAME(sc), r, v); 1778 1779 return (v); 1780 } 1781 1782 void 1783 arc_read_region(struct arc_softc *sc, bus_size_t r, void *buf, size_t len) 1784 { 1785 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, len, 1786 BUS_SPACE_BARRIER_READ); 1787 bus_space_read_raw_region_4(sc->sc_iot, sc->sc_ioh, r, buf, len); 1788 } 1789 1790 void 1791 arc_write(struct arc_softc *sc, bus_size_t r, u_int32_t v) 1792 { 1793 DNPRINTF(ARC_D_RW, "%s: arc_write 0x%x 0x%08x\n", DEVNAME(sc), r, v); 1794 1795 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 1796 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1797 BUS_SPACE_BARRIER_WRITE); 1798 } 1799 1800 void 1801 arc_write_region(struct arc_softc *sc, bus_size_t r, void *buf, size_t len) 1802 { 1803 bus_space_write_raw_region_4(sc->sc_iot, sc->sc_ioh, r, buf, len); 1804 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, len, 1805 BUS_SPACE_BARRIER_WRITE); 1806 } 1807 1808 int 1809 arc_wait_eq(struct arc_softc *sc, bus_size_t r, u_int32_t mask, 1810 u_int32_t target) 1811 { 1812 int i; 1813 1814 DNPRINTF(ARC_D_RW, "%s: arc_wait_eq 0x%x 0x%08x 0x%08x\n", 1815 DEVNAME(sc), r, mask, target); 1816 1817 for (i = 0; i < 10000; i++) { 1818 if ((arc_read(sc, r) & mask) == target) 1819 return (0); 1820 delay(1000); 1821 } 1822 1823 return (1); 1824 } 1825 1826 int 1827 arc_wait_ne(struct arc_softc *sc, bus_size_t r, u_int32_t mask, 1828 u_int32_t target) 1829 { 1830 int i; 1831 1832 DNPRINTF(ARC_D_RW, "%s: arc_wait_ne 0x%x 0x%08x 0x%08x\n", 1833 DEVNAME(sc), r, mask, target); 1834 1835 for (i = 0; i < 10000; i++) { 1836 if ((arc_read(sc, r) & mask) != target) 1837 return (0); 1838 delay(1000); 1839 } 1840 1841 return (1); 1842 } 1843 1844 int 1845 arc_msg0(struct arc_softc *sc, u_int32_t m) 1846 { 1847 /* post message */ 1848 arc_write(sc, ARC_RA_INB_MSG0, m); 1849 /* wait for the fw to do it */ 1850 if (arc_wait_eq(sc, ARC_RA_INTRSTAT, ARC_RA_INTRSTAT_MSG0, 1851 ARC_RA_INTRSTAT_MSG0) != 0) 1852 return (1); 1853 1854 /* ack it */ 1855 arc_write(sc, ARC_RA_INTRSTAT, ARC_RA_INTRSTAT_MSG0); 1856 1857 return (0); 1858 } 1859 1860 struct arc_dmamem * 1861 arc_dmamem_alloc(struct arc_softc *sc, size_t size) 1862 { 1863 struct arc_dmamem *adm; 1864 int nsegs; 1865 1866 adm = malloc(sizeof(*adm), M_DEVBUF, M_NOWAIT | M_ZERO); 1867 if (adm == NULL) 1868 return (NULL); 1869 1870 adm->adm_size = size; 1871 1872 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 1873 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &adm->adm_map) != 0) 1874 goto admfree; 1875 1876 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &adm->adm_seg, 1877 1, &nsegs, BUS_DMA_NOWAIT) != 0) 1878 goto destroy; 1879 1880 if (bus_dmamem_map(sc->sc_dmat, &adm->adm_seg, nsegs, size, 1881 &adm->adm_kva, BUS_DMA_NOWAIT) != 0) 1882 goto free; 1883 1884 if (bus_dmamap_load(sc->sc_dmat, adm->adm_map, adm->adm_kva, size, 1885 NULL, BUS_DMA_NOWAIT) != 0) 1886 goto unmap; 1887 1888 bzero(adm->adm_kva, size); 1889 1890 return (adm); 1891 1892 unmap: 1893 bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, size); 1894 free: 1895 bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1); 1896 destroy: 1897 bus_dmamap_destroy(sc->sc_dmat, adm->adm_map); 1898 admfree: 1899 free(adm, M_DEVBUF); 1900 1901 return (NULL); 1902 } 1903 1904 void 1905 arc_dmamem_free(struct arc_softc *sc, struct arc_dmamem *adm) 1906 { 1907 bus_dmamap_unload(sc->sc_dmat, adm->adm_map); 1908 bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, adm->adm_size); 1909 bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1); 1910 bus_dmamap_destroy(sc->sc_dmat, adm->adm_map); 1911 free(adm, M_DEVBUF); 1912 } 1913 1914 int 1915 arc_alloc_ccbs(struct arc_softc *sc) 1916 { 1917 struct arc_ccb *ccb; 1918 u_int8_t *cmd; 1919 int i; 1920 1921 TAILQ_INIT(&sc->sc_ccb_free); 1922 1923 sc->sc_ccbs = malloc(sizeof(struct arc_ccb) * sc->sc_req_count, 1924 M_DEVBUF, M_WAITOK | M_ZERO); 1925 1926 sc->sc_requests = arc_dmamem_alloc(sc, 1927 ARC_MAX_IOCMDLEN * sc->sc_req_count); 1928 if (sc->sc_requests == NULL) { 1929 printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc)); 1930 goto free_ccbs; 1931 } 1932 cmd = ARC_DMA_KVA(sc->sc_requests); 1933 1934 for (i = 0; i < sc->sc_req_count; i++) { 1935 ccb = &sc->sc_ccbs[i]; 1936 1937 if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, ARC_SGL_MAXLEN, 1938 MAXPHYS, 0, 0, &ccb->ccb_dmamap) != 0) { 1939 printf("%s: unable to create dmamap for ccb %d\n", 1940 DEVNAME(sc), i); 1941 goto free_maps; 1942 } 1943 1944 ccb->ccb_sc = sc; 1945 ccb->ccb_id = i; 1946 ccb->ccb_offset = ARC_MAX_IOCMDLEN * i; 1947 1948 ccb->ccb_cmd = (struct arc_io_cmd *)&cmd[ccb->ccb_offset]; 1949 ccb->ccb_cmd_post = (ARC_DMA_DVA(sc->sc_requests) + 1950 ccb->ccb_offset) >> ARC_RA_POST_QUEUE_ADDR_SHIFT; 1951 1952 arc_put_ccb(sc, ccb); 1953 } 1954 1955 return (0); 1956 1957 free_maps: 1958 while ((ccb = arc_get_ccb(sc)) != NULL) 1959 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 1960 arc_dmamem_free(sc, sc->sc_requests); 1961 1962 free_ccbs: 1963 free(sc->sc_ccbs, M_DEVBUF); 1964 1965 return (1); 1966 } 1967 1968 struct arc_ccb * 1969 arc_get_ccb(struct arc_softc *sc) 1970 { 1971 struct arc_ccb *ccb; 1972 1973 ccb = TAILQ_FIRST(&sc->sc_ccb_free); 1974 if (ccb != NULL) 1975 TAILQ_REMOVE(&sc->sc_ccb_free, ccb, ccb_link); 1976 1977 return (ccb); 1978 } 1979 1980 void 1981 arc_put_ccb(struct arc_softc *sc, struct arc_ccb *ccb) 1982 { 1983 ccb->ccb_xs = NULL; 1984 bzero(ccb->ccb_cmd, ARC_MAX_IOCMDLEN); 1985 TAILQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_link); 1986 } 1987