1 /* $OpenBSD: arc.c,v 1.95 2011/07/17 22:46:48 matthew Exp $ */ 2 3 /* 4 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include "bio.h" 20 21 #include <sys/param.h> 22 #include <sys/systm.h> 23 #include <sys/buf.h> 24 #include <sys/kernel.h> 25 #include <sys/malloc.h> 26 #include <sys/mutex.h> 27 #include <sys/device.h> 28 #include <sys/rwlock.h> 29 30 #include <machine/bus.h> 31 32 #include <dev/pci/pcireg.h> 33 #include <dev/pci/pcivar.h> 34 #include <dev/pci/pcidevs.h> 35 36 #include <scsi/scsi_all.h> 37 #include <scsi/scsiconf.h> 38 39 #include <sys/sensors.h> 40 #if NBIO > 0 41 #include <sys/ioctl.h> 42 #include <dev/biovar.h> 43 #endif 44 45 #ifdef ARC_DEBUG 46 #define ARC_D_INIT (1<<0) 47 #define ARC_D_RW (1<<1) 48 #define ARC_D_DB (1<<2) 49 50 int arcdebug = 0; 51 52 #define DPRINTF(p...) do { if (arcdebug) printf(p); } while (0) 53 #define DNPRINTF(n, p...) do { if ((n) & arcdebug) printf(p); } while (0) 54 55 #else 56 #define DPRINTF(p...) /* p */ 57 #define DNPRINTF(n, p...) /* n, p */ 58 #endif 59 60 /* Areca boards using the Intel IOP are Revision A (RA) */ 61 62 #define ARC_RA_PCI_BAR PCI_MAPREG_START 63 64 #define ARC_RA_INB_MSG0 0x0010 65 #define ARC_RA_INB_MSG0_NOP (0x00000000) 66 #define ARC_RA_INB_MSG0_GET_CONFIG (0x00000001) 67 #define ARC_RA_INB_MSG0_SET_CONFIG (0x00000002) 68 #define ARC_RA_INB_MSG0_ABORT_CMD (0x00000003) 69 #define ARC_RA_INB_MSG0_STOP_BGRB (0x00000004) 70 #define ARC_RA_INB_MSG0_FLUSH_CACHE (0x00000005) 71 #define ARC_RA_INB_MSG0_START_BGRB (0x00000006) 72 #define ARC_RA_INB_MSG0_CHK331PENDING (0x00000007) 73 #define ARC_RA_INB_MSG0_SYNC_TIMER (0x00000008) 74 #define ARC_RA_INB_MSG1 0x0014 75 #define ARC_RA_OUTB_ADDR0 0x0018 76 #define ARC_RA_OUTB_ADDR1 0x001c 77 #define ARC_RA_OUTB_ADDR1_FIRMWARE_OK (1<<31) 78 #define ARC_RA_INB_DOORBELL 0x0020 79 #define ARC_RA_INB_DOORBELL_WRITE_OK (1<<0) 80 #define ARC_RA_INB_DOORBELL_READ_OK (1<<1) 81 #define ARC_RA_OUTB_DOORBELL 0x002c 82 #define ARC_RA_OUTB_DOORBELL_WRITE_OK (1<<0) 83 #define ARC_RA_OUTB_DOORBELL_READ_OK (1<<1) 84 #define ARC_RA_INTRSTAT 0x0030 85 #define ARC_RA_INTRSTAT_MSG0 (1<<0) 86 #define ARC_RA_INTRSTAT_MSG1 (1<<1) 87 #define ARC_RA_INTRSTAT_DOORBELL (1<<2) 88 #define ARC_RA_INTRSTAT_POSTQUEUE (1<<3) 89 #define ARC_RA_INTRSTAT_PCI (1<<4) 90 #define ARC_RA_INTRMASK 0x0034 91 #define ARC_RA_INTRMASK_MSG0 (1<<0) 92 #define ARC_RA_INTRMASK_MSG1 (1<<1) 93 #define ARC_RA_INTRMASK_DOORBELL (1<<2) 94 #define ARC_RA_INTRMASK_POSTQUEUE (1<<3) 95 #define ARC_RA_INTRMASK_PCI (1<<4) 96 #define ARC_RA_POST_QUEUE 0x0040 97 #define ARC_RA_POST_QUEUE_ADDR_SHIFT 5 98 #define ARC_RA_POST_QUEUE_IAMBIOS (1<<30) 99 #define ARC_RA_POST_QUEUE_BIGFRAME (1<<31) 100 #define ARC_RA_REPLY_QUEUE 0x0044 101 #define ARC_RA_REPLY_QUEUE_ADDR_SHIFT 5 102 #define ARC_RA_REPLY_QUEUE_ERR (1<<28) 103 #define ARC_RA_REPLY_QUEUE_IAMBIOS (1<<30) 104 #define ARC_RA_MSGBUF 0x0a00 105 #define ARC_RA_MSGBUF_LEN 1024 106 #define ARC_RA_IOC_WBUF_LEN 0x0e00 107 #define ARC_RA_IOC_WBUF 0x0e04 108 #define ARC_RA_IOC_RBUF_LEN 0x0f00 109 #define ARC_RA_IOC_RBUF 0x0f04 110 #define ARC_RA_IOC_RWBUF_MAXLEN 124 /* for both RBUF and WBUF */ 111 112 /* Areca boards using the Marvel IOP are Revision B (RB) */ 113 114 #define ARC_RB_DRV2IOP_DOORBELL 0x00020400 115 #define ARC_RB_DRV2IOP_DOORBELL_MASK 0x00020404 116 #define ARC_RB_IOP2DRV_DOORBELL 0x00020408 117 #define ARC_RB_IOP2DRV_DOORBELL_FIRMWARE_OK (1<<31) 118 #define ARC_RB_IOP2DRV_DOORBELL_MASK 0x0002040c 119 120 struct arc_msg_firmware_info { 121 u_int32_t signature; 122 #define ARC_FWINFO_SIGNATURE_GET_CONFIG (0x87974060) 123 u_int32_t request_len; 124 u_int32_t queue_len; 125 u_int32_t sdram_size; 126 u_int32_t sata_ports; 127 u_int8_t vendor[40]; 128 u_int8_t model[8]; 129 u_int8_t fw_version[16]; 130 u_int8_t device_map[16]; 131 } __packed; 132 133 struct arc_msg_scsicmd { 134 u_int8_t bus; 135 u_int8_t target; 136 u_int8_t lun; 137 u_int8_t function; 138 139 u_int8_t cdb_len; 140 u_int8_t sgl_len; 141 u_int8_t flags; 142 #define ARC_MSG_SCSICMD_FLAG_SGL_BSIZE_512 (1<<0) 143 #define ARC_MSG_SCSICMD_FLAG_FROM_BIOS (1<<1) 144 #define ARC_MSG_SCSICMD_FLAG_WRITE (1<<2) 145 #define ARC_MSG_SCSICMD_FLAG_SIMPLEQ (0x00) 146 #define ARC_MSG_SCSICMD_FLAG_HEADQ (0x08) 147 #define ARC_MSG_SCSICMD_FLAG_ORDERQ (0x10) 148 u_int8_t reserved; 149 150 u_int32_t context; 151 u_int32_t data_len; 152 153 #define ARC_MSG_CDBLEN 16 154 u_int8_t cdb[ARC_MSG_CDBLEN]; 155 156 u_int8_t status; 157 #define ARC_MSG_STATUS_SELTIMEOUT 0xf0 158 #define ARC_MSG_STATUS_ABORTED 0xf1 159 #define ARC_MSG_STATUS_INIT_FAIL 0xf2 160 #define ARC_MSG_SENSELEN 15 161 u_int8_t sense_data[ARC_MSG_SENSELEN]; 162 163 /* followed by an sgl */ 164 } __packed; 165 166 struct arc_sge { 167 u_int32_t sg_hdr; 168 #define ARC_SGE_64BIT (1<<24) 169 u_int32_t sg_lo_addr; 170 u_int32_t sg_hi_addr; 171 } __packed; 172 173 #define ARC_MAX_TARGET 16 174 #define ARC_MAX_LUN 8 175 #define ARC_MAX_IOCMDLEN 512 176 #define ARC_BLOCKSIZE 512 177 178 /* the firmware deals with up to 256 or 512 byte command frames. */ 179 /* sizeof(struct arc_msg_scsicmd) + (sizeof(struct arc_sge) * 38) == 508 */ 180 #define ARC_SGL_MAXLEN 38 181 /* sizeof(struct arc_msg_scsicmd) + (sizeof(struct arc_sge) * 17) == 252 */ 182 #define ARC_SGL_256LEN 17 183 184 struct arc_io_cmd { 185 struct arc_msg_scsicmd cmd; 186 struct arc_sge sgl[ARC_SGL_MAXLEN]; 187 } __packed; 188 189 /* definitions of the firmware commands sent via the doorbells */ 190 191 struct arc_fw_hdr { 192 u_int8_t byte1; 193 u_int8_t byte2; 194 u_int8_t byte3; 195 } __packed; 196 197 /* the fw header must always equal this */ 198 struct arc_fw_hdr arc_fw_hdr = { 0x5e, 0x01, 0x61 }; 199 200 struct arc_fw_bufhdr { 201 struct arc_fw_hdr hdr; 202 u_int16_t len; 203 } __packed; 204 205 #define ARC_FW_RAIDINFO 0x20 /* opcode + raid# */ 206 #define ARC_FW_VOLINFO 0x21 /* opcode + vol# */ 207 #define ARC_FW_DISKINFO 0x22 /* opcode + physdisk# */ 208 #define ARC_FW_SYSINFO 0x23 /* opcode. reply is fw_sysinfo */ 209 #define ARC_FW_MUTE_ALARM 0x30 /* opcode only */ 210 #define ARC_FW_SET_ALARM 0x31 /* opcode + 1 byte for setting */ 211 #define ARC_FW_SET_ALARM_DISABLE 0x00 212 #define ARC_FW_SET_ALARM_ENABLE 0x01 213 #define ARC_FW_NOP 0x38 /* opcode only */ 214 215 #define ARC_FW_CMD_OK 0x41 216 #define ARC_FW_BLINK 0x43 217 #define ARC_FW_BLINK_ENABLE 0x00 218 #define ARC_FW_BLINK_DISABLE 0x01 219 #define ARC_FW_CMD_PASS_REQD 0x4d 220 221 struct arc_fw_comminfo { 222 u_int8_t baud_rate; 223 u_int8_t data_bits; 224 u_int8_t stop_bits; 225 u_int8_t parity; 226 u_int8_t flow_control; 227 } __packed; 228 229 struct arc_fw_scsiattr { 230 u_int8_t channel;// channel for SCSI target (0/1) 231 u_int8_t target; 232 u_int8_t lun; 233 u_int8_t tagged; 234 u_int8_t cache; 235 u_int8_t speed; 236 } __packed; 237 238 struct arc_fw_raidinfo { 239 u_int8_t set_name[16]; 240 u_int32_t capacity; 241 u_int32_t capacity2; 242 u_int32_t fail_mask; 243 u_int8_t device_array[32]; 244 u_int8_t member_devices; 245 u_int8_t new_member_devices; 246 u_int8_t raid_state; 247 u_int8_t volumes; 248 u_int8_t volume_list[16]; 249 u_int8_t reserved1[3]; 250 u_int8_t free_segments; 251 u_int32_t raw_stripes[8]; 252 u_int8_t reserved2[12]; 253 } __packed; 254 255 struct arc_fw_volinfo { 256 u_int8_t set_name[16]; 257 u_int32_t capacity; 258 u_int32_t capacity2; 259 u_int32_t fail_mask; 260 u_int32_t stripe_size; /* in blocks */ 261 u_int32_t new_fail_mask; 262 u_int32_t new_stripe_size; 263 u_int32_t volume_status; 264 #define ARC_FW_VOL_STATUS_NORMAL 0x00 265 #define ARC_FW_VOL_STATUS_INITTING (1<<0) 266 #define ARC_FW_VOL_STATUS_FAILED (1<<1) 267 #define ARC_FW_VOL_STATUS_MIGRATING (1<<2) 268 #define ARC_FW_VOL_STATUS_REBUILDING (1<<3) 269 #define ARC_FW_VOL_STATUS_NEED_INIT (1<<4) 270 #define ARC_FW_VOL_STATUS_NEED_MIGRATE (1<<5) 271 #define ARC_FW_VOL_STATUS_INIT_FLAG (1<<6) 272 #define ARC_FW_VOL_STATUS_NEED_REGEN (1<<7) 273 #define ARC_FW_VOL_STATUS_CHECKING (1<<8) 274 #define ARC_FW_VOL_STATUS_NEED_CHECK (1<<9) 275 u_int32_t progress; 276 struct arc_fw_scsiattr scsi_attr; 277 u_int8_t member_disks; 278 u_int8_t raid_level; 279 #define ARC_FW_VOL_RAIDLEVEL_0 0x00 280 #define ARC_FW_VOL_RAIDLEVEL_1 0x01 281 #define ARC_FW_VOL_RAIDLEVEL_3 0x02 282 #define ARC_FW_VOL_RAIDLEVEL_5 0x03 283 #define ARC_FW_VOL_RAIDLEVEL_6 0x04 284 #define ARC_FW_VOL_RAIDLEVEL_PASSTHRU 0x05 285 u_int8_t new_member_disks; 286 u_int8_t new_raid_level; 287 u_int8_t raid_set_number; 288 u_int8_t reserved[5]; 289 } __packed; 290 291 struct arc_fw_diskinfo { 292 u_int8_t model[40]; 293 u_int8_t serial[20]; 294 u_int8_t firmware_rev[8]; 295 u_int32_t capacity; 296 u_int32_t capacity2; 297 u_int8_t device_state; 298 u_int8_t pio_mode; 299 u_int8_t current_udma_mode; 300 u_int8_t udma_mode; 301 u_int8_t drive_select; 302 u_int8_t raid_number; // 0xff unowned 303 struct arc_fw_scsiattr scsi_attr; 304 u_int8_t reserved[44]; 305 } __packed; 306 307 struct arc_fw_sysinfo { 308 u_int8_t vendor_name[40]; 309 u_int8_t serial_number[16]; 310 u_int8_t firmware_version[16]; 311 u_int8_t boot_version[16]; 312 u_int8_t mb_version[16]; 313 u_int8_t model_name[8]; 314 315 u_int8_t local_ip[4]; 316 u_int8_t current_ip[4]; 317 318 u_int32_t time_tick; 319 u_int32_t cpu_speed; 320 u_int32_t icache; 321 u_int32_t dcache; 322 u_int32_t scache; 323 u_int32_t memory_size; 324 u_int32_t memory_speed; 325 u_int32_t events; 326 327 u_int8_t gsiMacAddress[6]; 328 u_int8_t gsiDhcp; 329 330 u_int8_t alarm; 331 u_int8_t channel_usage; 332 u_int8_t max_ata_mode; 333 u_int8_t sdram_ecc; 334 u_int8_t rebuild_priority; 335 struct arc_fw_comminfo comm_a; 336 struct arc_fw_comminfo comm_b; 337 u_int8_t ide_channels; 338 u_int8_t scsi_host_channels; 339 u_int8_t ide_host_channels; 340 u_int8_t max_volume_set; 341 u_int8_t max_raid_set; 342 u_int8_t ether_port; 343 u_int8_t raid6_engine; 344 u_int8_t reserved[75]; 345 } __packed; 346 347 int arc_match(struct device *, void *, void *); 348 void arc_attach(struct device *, struct device *, void *); 349 int arc_detach(struct device *, int); 350 void arc_shutdown(void *); 351 int arc_intr(void *); 352 353 struct arc_iop; 354 struct arc_ccb; 355 SLIST_HEAD(arc_ccb_list, arc_ccb); 356 357 struct arc_softc { 358 struct device sc_dev; 359 const struct arc_iop *sc_iop; 360 struct scsi_link sc_link; 361 362 pci_chipset_tag_t sc_pc; 363 pcitag_t sc_tag; 364 365 bus_space_tag_t sc_iot; 366 bus_space_handle_t sc_ioh; 367 bus_size_t sc_ios; 368 bus_dma_tag_t sc_dmat; 369 370 void *sc_ih; 371 372 void *sc_shutdownhook; 373 374 int sc_req_count; 375 376 struct arc_dmamem *sc_requests; 377 struct arc_ccb *sc_ccbs; 378 struct arc_ccb_list sc_ccb_free; 379 struct mutex sc_ccb_mtx; 380 381 struct scsi_iopool sc_iopool; 382 struct scsibus_softc *sc_scsibus; 383 384 struct rwlock sc_lock; 385 volatile int sc_talking; 386 387 struct ksensor *sc_sensors; 388 struct ksensordev sc_sensordev; 389 int sc_nsensors; 390 391 u_int32_t sc_ledmask; 392 }; 393 #define DEVNAME(_s) ((_s)->sc_dev.dv_xname) 394 395 struct cfattach arc_ca = { 396 sizeof(struct arc_softc), arc_match, arc_attach, arc_detach 397 }; 398 399 struct cfdriver arc_cd = { 400 NULL, "arc", DV_DULL 401 }; 402 403 /* interface for scsi midlayer to talk to */ 404 void arc_scsi_cmd(struct scsi_xfer *); 405 void arc_minphys(struct buf *, struct scsi_link *); 406 407 struct scsi_adapter arc_switch = { 408 arc_scsi_cmd, arc_minphys, NULL, NULL, NULL 409 }; 410 411 /* code to deal with getting bits in and out of the bus space */ 412 u_int32_t arc_read(struct arc_softc *, bus_size_t); 413 void arc_read_region(struct arc_softc *, bus_size_t, 414 void *, size_t); 415 void arc_write(struct arc_softc *, bus_size_t, u_int32_t); 416 void arc_write_region(struct arc_softc *, bus_size_t, 417 void *, size_t); 418 int arc_wait_eq(struct arc_softc *, bus_size_t, 419 u_int32_t, u_int32_t); 420 int arc_wait_ne(struct arc_softc *, bus_size_t, 421 u_int32_t, u_int32_t); 422 int arc_msg0(struct arc_softc *, u_int32_t); 423 424 #define arc_push(_s, _r) arc_write((_s), ARC_RA_POST_QUEUE, (_r)) 425 #define arc_pop(_s) arc_read((_s), ARC_RA_REPLY_QUEUE) 426 427 /* wrap up the bus_dma api */ 428 struct arc_dmamem { 429 bus_dmamap_t adm_map; 430 bus_dma_segment_t adm_seg; 431 size_t adm_size; 432 caddr_t adm_kva; 433 }; 434 #define ARC_DMA_MAP(_adm) ((_adm)->adm_map) 435 #define ARC_DMA_DVA(_adm) ((_adm)->adm_map->dm_segs[0].ds_addr) 436 #define ARC_DMA_KVA(_adm) ((void *)(_adm)->adm_kva) 437 438 struct arc_dmamem *arc_dmamem_alloc(struct arc_softc *, size_t); 439 void arc_dmamem_free(struct arc_softc *, 440 struct arc_dmamem *); 441 442 /* stuff to manage a scsi command */ 443 struct arc_ccb { 444 struct arc_softc *ccb_sc; 445 int ccb_id; 446 447 struct scsi_xfer *ccb_xs; 448 449 bus_dmamap_t ccb_dmamap; 450 bus_addr_t ccb_offset; 451 struct arc_io_cmd *ccb_cmd; 452 u_int32_t ccb_cmd_post; 453 454 SLIST_ENTRY(arc_ccb) ccb_link; 455 }; 456 457 int arc_alloc_ccbs(struct arc_softc *); 458 struct arc_ccb *arc_get_ccb(struct arc_softc *); 459 void arc_put_ccb(struct arc_softc *, struct arc_ccb *); 460 int arc_load_xs(struct arc_ccb *); 461 int arc_complete(struct arc_softc *, struct arc_ccb *, 462 int); 463 void arc_scsi_cmd_done(struct arc_softc *, struct arc_ccb *, 464 u_int32_t); 465 466 /* real stuff for dealing with the hardware */ 467 struct arc_iop { 468 int (*iop_query_firmware)(struct arc_softc *); 469 }; 470 471 int arc_map_pci_resources(struct arc_softc *, 472 struct pci_attach_args *); 473 void arc_unmap_pci_resources(struct arc_softc *); 474 int arc_intel_query_firmware(struct arc_softc *); 475 int arc_marvell_query_firmware(struct arc_softc *); 476 477 #if NBIO > 0 478 /* stuff to do messaging via the doorbells */ 479 void arc_lock(struct arc_softc *); 480 void arc_unlock(struct arc_softc *); 481 void arc_wait(struct arc_softc *); 482 u_int8_t arc_msg_cksum(void *, u_int16_t); 483 int arc_msgbuf(struct arc_softc *, void *, size_t, 484 void *, size_t, int); 485 486 /* bioctl */ 487 int arc_bioctl(struct device *, u_long, caddr_t); 488 int arc_bio_inq(struct arc_softc *, struct bioc_inq *); 489 int arc_bio_vol(struct arc_softc *, struct bioc_vol *); 490 int arc_bio_disk(struct arc_softc *, struct bioc_disk *); 491 int arc_bio_alarm(struct arc_softc *, struct bioc_alarm *); 492 int arc_bio_alarm_state(struct arc_softc *, 493 struct bioc_alarm *); 494 int arc_bio_blink(struct arc_softc *, struct bioc_blink *); 495 496 int arc_bio_getvol(struct arc_softc *, int, 497 struct arc_fw_volinfo *); 498 499 #ifndef SMALL_KERNEL 500 /* sensors */ 501 void arc_create_sensors(void *, void *); 502 void arc_refresh_sensors(void *); 503 #endif /* SMALL_KERNEL */ 504 #endif 505 506 static const struct arc_iop arc_intel = { 507 arc_intel_query_firmware 508 }; 509 510 static const struct arc_iop arc_marvell = { 511 arc_marvell_query_firmware 512 }; 513 514 struct arc_board { 515 pcireg_t ab_vendor; 516 pcireg_t ab_product; 517 const struct arc_iop *ab_iop; 518 }; 519 const struct arc_board *arc_match_board(struct pci_attach_args *); 520 521 static const struct arc_board arc_devices[] = { 522 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1110, &arc_intel }, 523 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1120, &arc_intel }, 524 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1130, &arc_intel }, 525 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1160, &arc_intel }, 526 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1170, &arc_intel }, 527 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1200, &arc_intel }, 528 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1200_B, &arc_marvell }, 529 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1202, &arc_intel }, 530 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1210, &arc_intel }, 531 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1220, &arc_intel }, 532 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1230, &arc_intel }, 533 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1260, &arc_intel }, 534 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1270, &arc_intel }, 535 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1280, &arc_intel }, 536 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1380, &arc_intel }, 537 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1381, &arc_intel }, 538 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1680, &arc_intel }, 539 { PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1681, &arc_intel } 540 }; 541 542 const struct arc_board * 543 arc_match_board(struct pci_attach_args *pa) 544 { 545 const struct arc_board *ab; 546 int i; 547 548 for (i = 0; i < sizeof(arc_devices) / sizeof(arc_devices[0]); i++) { 549 ab = &arc_devices[i]; 550 551 if (PCI_VENDOR(pa->pa_id) == ab->ab_vendor && 552 PCI_PRODUCT(pa->pa_id) == ab->ab_product) 553 return (ab); 554 } 555 556 return (NULL); 557 } 558 559 int 560 arc_match(struct device *parent, void *match, void *aux) 561 { 562 return ((arc_match_board(aux) == NULL) ? 0 : 1); 563 } 564 565 void 566 arc_attach(struct device *parent, struct device *self, void *aux) 567 { 568 struct arc_softc *sc = (struct arc_softc *)self; 569 struct pci_attach_args *pa = aux; 570 struct scsibus_attach_args saa; 571 struct device *child; 572 573 sc->sc_talking = 0; 574 rw_init(&sc->sc_lock, "arcmsg"); 575 576 sc->sc_iop = arc_match_board(pa)->ab_iop; 577 578 if (arc_map_pci_resources(sc, pa) != 0) { 579 /* error message printed by arc_map_pci_resources */ 580 return; 581 } 582 583 if (sc->sc_iop->iop_query_firmware(sc) != 0) { 584 /* error message printed by arc_query_firmware */ 585 goto unmap_pci; 586 } 587 588 if (arc_alloc_ccbs(sc) != 0) { 589 /* error message printed by arc_alloc_ccbs */ 590 goto unmap_pci; 591 } 592 593 sc->sc_shutdownhook = shutdownhook_establish(arc_shutdown, sc); 594 if (sc->sc_shutdownhook == NULL) 595 panic("unable to establish arc shutdownhook"); 596 597 sc->sc_link.adapter = &arc_switch; 598 sc->sc_link.adapter_softc = sc; 599 sc->sc_link.adapter_target = ARC_MAX_TARGET; 600 sc->sc_link.adapter_buswidth = ARC_MAX_TARGET; 601 sc->sc_link.openings = sc->sc_req_count; 602 sc->sc_link.pool = &sc->sc_iopool; 603 604 bzero(&saa, sizeof(saa)); 605 saa.saa_sc_link = &sc->sc_link; 606 607 child = config_found(self, &saa, scsiprint); 608 sc->sc_scsibus = (struct scsibus_softc *)child; 609 610 /* enable interrupts */ 611 arc_write(sc, ARC_RA_INTRMASK, 612 ~(ARC_RA_INTRMASK_POSTQUEUE|ARC_RA_INTRSTAT_DOORBELL)); 613 614 #if NBIO > 0 615 if (bio_register(self, arc_bioctl) != 0) 616 panic("%s: bioctl registration failed", DEVNAME(sc)); 617 618 #ifndef SMALL_KERNEL 619 /* 620 * you need to talk to the firmware to get volume info. our firmware 621 * interface relies on being able to sleep, so we need to use a thread 622 * to do the work. 623 */ 624 if (scsi_task(arc_create_sensors, sc, NULL, 1) != 0) 625 printf("%s: unable to schedule arc_create_sensors as a " 626 "scsi task", DEVNAME(sc)); 627 #endif 628 #endif 629 630 return; 631 unmap_pci: 632 arc_unmap_pci_resources(sc); 633 } 634 635 int 636 arc_detach(struct device *self, int flags) 637 { 638 struct arc_softc *sc = (struct arc_softc *)self; 639 640 shutdownhook_disestablish(sc->sc_shutdownhook); 641 642 if (arc_msg0(sc, ARC_RA_INB_MSG0_STOP_BGRB) != 0) 643 printf("%s: timeout waiting to stop bg rebuild\n", DEVNAME(sc)); 644 645 if (arc_msg0(sc, ARC_RA_INB_MSG0_FLUSH_CACHE) != 0) 646 printf("%s: timeout waiting to flush cache\n", DEVNAME(sc)); 647 648 return (0); 649 } 650 651 void 652 arc_shutdown(void *xsc) 653 { 654 struct arc_softc *sc = xsc; 655 656 if (arc_msg0(sc, ARC_RA_INB_MSG0_STOP_BGRB) != 0) 657 printf("%s: timeout waiting to stop bg rebuild\n", DEVNAME(sc)); 658 659 if (arc_msg0(sc, ARC_RA_INB_MSG0_FLUSH_CACHE) != 0) 660 printf("%s: timeout waiting to flush cache\n", DEVNAME(sc)); 661 } 662 663 int 664 arc_intr(void *arg) 665 { 666 struct arc_softc *sc = arg; 667 struct arc_ccb *ccb = NULL; 668 char *kva = ARC_DMA_KVA(sc->sc_requests); 669 struct arc_io_cmd *cmd; 670 u_int32_t reg, intrstat; 671 int ret = 0; 672 673 intrstat = arc_read(sc, ARC_RA_INTRSTAT); 674 intrstat &= ARC_RA_INTRSTAT_POSTQUEUE | ARC_RA_INTRSTAT_DOORBELL; 675 arc_write(sc, ARC_RA_INTRSTAT, intrstat); 676 677 if (intrstat & ARC_RA_INTRSTAT_DOORBELL) { 678 ret = 1; 679 if (sc->sc_talking) { 680 /* if an ioctl is talking, wake it up */ 681 arc_write(sc, ARC_RA_INTRMASK, 682 ~ARC_RA_INTRMASK_POSTQUEUE); 683 wakeup(sc); 684 } else { 685 /* otherwise drop it */ 686 reg = arc_read(sc, ARC_RA_OUTB_DOORBELL); 687 arc_write(sc, ARC_RA_OUTB_DOORBELL, reg); 688 if (reg & ARC_RA_OUTB_DOORBELL_WRITE_OK) 689 arc_write(sc, ARC_RA_INB_DOORBELL, 690 ARC_RA_INB_DOORBELL_READ_OK); 691 } 692 } 693 694 while ((reg = arc_pop(sc)) != 0xffffffff) { 695 ret = 1; 696 cmd = (struct arc_io_cmd *)(kva + 697 ((reg << ARC_RA_REPLY_QUEUE_ADDR_SHIFT) - 698 (u_int32_t)ARC_DMA_DVA(sc->sc_requests))); 699 ccb = &sc->sc_ccbs[letoh32(cmd->cmd.context)]; 700 701 bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests), 702 ccb->ccb_offset, ARC_MAX_IOCMDLEN, 703 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 704 705 arc_scsi_cmd_done(sc, ccb, reg); 706 } 707 708 return (ret); 709 } 710 711 void 712 arc_scsi_cmd(struct scsi_xfer *xs) 713 { 714 struct scsi_link *link = xs->sc_link; 715 struct arc_softc *sc = link->adapter_softc; 716 struct arc_ccb *ccb; 717 struct arc_msg_scsicmd *cmd; 718 u_int32_t reg; 719 int s; 720 721 if (xs->cmdlen > ARC_MSG_CDBLEN) { 722 bzero(&xs->sense, sizeof(xs->sense)); 723 xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; 724 xs->sense.flags = SKEY_ILLEGAL_REQUEST; 725 xs->sense.add_sense_code = 0x20; 726 xs->error = XS_SENSE; 727 scsi_done(xs); 728 return; 729 } 730 731 ccb = xs->io; 732 ccb->ccb_xs = xs; 733 734 if (arc_load_xs(ccb) != 0) { 735 xs->error = XS_DRIVER_STUFFUP; 736 scsi_done(xs); 737 return; 738 } 739 740 cmd = &ccb->ccb_cmd->cmd; 741 reg = ccb->ccb_cmd_post; 742 743 /* bus is always 0 */ 744 cmd->target = link->target; 745 cmd->lun = link->lun; 746 cmd->function = 1; /* XXX magic number */ 747 748 cmd->cdb_len = xs->cmdlen; 749 cmd->sgl_len = ccb->ccb_dmamap->dm_nsegs; 750 if (xs->flags & SCSI_DATA_OUT) 751 cmd->flags = ARC_MSG_SCSICMD_FLAG_WRITE; 752 if (ccb->ccb_dmamap->dm_nsegs > ARC_SGL_256LEN) { 753 cmd->flags |= ARC_MSG_SCSICMD_FLAG_SGL_BSIZE_512; 754 reg |= ARC_RA_POST_QUEUE_BIGFRAME; 755 } 756 757 cmd->context = htole32(ccb->ccb_id); 758 cmd->data_len = htole32(xs->datalen); 759 760 bcopy(xs->cmd, cmd->cdb, xs->cmdlen); 761 762 /* we've built the command, let's put it on the hw */ 763 bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests), 764 ccb->ccb_offset, ARC_MAX_IOCMDLEN, 765 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 766 767 s = splbio(); 768 arc_push(sc, reg); 769 if (xs->flags & SCSI_POLL) { 770 if (arc_complete(sc, ccb, xs->timeout) != 0) { 771 xs->error = XS_DRIVER_STUFFUP; 772 scsi_done(xs); 773 } 774 } 775 splx(s); 776 } 777 778 int 779 arc_load_xs(struct arc_ccb *ccb) 780 { 781 struct arc_softc *sc = ccb->ccb_sc; 782 struct scsi_xfer *xs = ccb->ccb_xs; 783 bus_dmamap_t dmap = ccb->ccb_dmamap; 784 struct arc_sge *sgl = ccb->ccb_cmd->sgl, *sge; 785 u_int64_t addr; 786 int i, error; 787 788 if (xs->datalen == 0) 789 return (0); 790 791 error = bus_dmamap_load(sc->sc_dmat, dmap, 792 xs->data, xs->datalen, NULL, 793 (xs->flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 794 if (error != 0) { 795 printf("%s: error %d loading dmamap\n", DEVNAME(sc), error); 796 return (1); 797 } 798 799 for (i = 0; i < dmap->dm_nsegs; i++) { 800 sge = &sgl[i]; 801 802 sge->sg_hdr = htole32(ARC_SGE_64BIT | dmap->dm_segs[i].ds_len); 803 addr = dmap->dm_segs[i].ds_addr; 804 sge->sg_hi_addr = htole32((u_int32_t)(addr >> 32)); 805 sge->sg_lo_addr = htole32((u_int32_t)addr); 806 } 807 808 bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize, 809 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 810 BUS_DMASYNC_PREWRITE); 811 812 return (0); 813 } 814 815 void 816 arc_scsi_cmd_done(struct arc_softc *sc, struct arc_ccb *ccb, u_int32_t reg) 817 { 818 struct scsi_xfer *xs = ccb->ccb_xs; 819 struct arc_msg_scsicmd *cmd; 820 821 if (xs->datalen != 0) { 822 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 823 ccb->ccb_dmamap->dm_mapsize, (xs->flags & SCSI_DATA_IN) ? 824 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 825 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 826 } 827 828 if (reg & ARC_RA_REPLY_QUEUE_ERR) { 829 cmd = &ccb->ccb_cmd->cmd; 830 831 switch (cmd->status) { 832 case ARC_MSG_STATUS_SELTIMEOUT: 833 case ARC_MSG_STATUS_ABORTED: 834 case ARC_MSG_STATUS_INIT_FAIL: 835 xs->status = SCSI_OK; 836 xs->error = XS_SELTIMEOUT; 837 break; 838 839 case SCSI_CHECK: 840 bzero(&xs->sense, sizeof(xs->sense)); 841 bcopy(cmd->sense_data, &xs->sense, 842 min(ARC_MSG_SENSELEN, sizeof(xs->sense))); 843 xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; 844 xs->status = SCSI_CHECK; 845 xs->error = XS_SENSE; 846 xs->resid = 0; 847 break; 848 849 default: 850 /* unknown device status */ 851 xs->error = XS_BUSY; /* try again later? */ 852 xs->status = SCSI_BUSY; 853 break; 854 } 855 } else { 856 xs->status = SCSI_OK; 857 xs->error = XS_NOERROR; 858 xs->resid = 0; 859 } 860 861 scsi_done(xs); 862 } 863 864 int 865 arc_complete(struct arc_softc *sc, struct arc_ccb *nccb, int timeout) 866 { 867 struct arc_ccb *ccb = NULL; 868 char *kva = ARC_DMA_KVA(sc->sc_requests); 869 struct arc_io_cmd *cmd; 870 u_int32_t reg; 871 872 do { 873 reg = arc_pop(sc); 874 if (reg == 0xffffffff) { 875 if (timeout-- == 0) 876 return (1); 877 878 delay(1000); 879 continue; 880 } 881 882 cmd = (struct arc_io_cmd *)(kva + 883 ((reg << ARC_RA_REPLY_QUEUE_ADDR_SHIFT) - 884 ARC_DMA_DVA(sc->sc_requests))); 885 ccb = &sc->sc_ccbs[letoh32(cmd->cmd.context)]; 886 887 bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests), 888 ccb->ccb_offset, ARC_MAX_IOCMDLEN, 889 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 890 891 arc_scsi_cmd_done(sc, ccb, reg); 892 } while (nccb != ccb); 893 894 return (0); 895 } 896 897 void 898 arc_minphys(struct buf *bp, struct scsi_link *sl) 899 { 900 if (bp->b_bcount > MAXPHYS) 901 bp->b_bcount = MAXPHYS; 902 minphys(bp); 903 } 904 905 int 906 arc_map_pci_resources(struct arc_softc *sc, struct pci_attach_args *pa) 907 { 908 pcireg_t memtype; 909 pci_intr_handle_t ih; 910 911 sc->sc_pc = pa->pa_pc; 912 sc->sc_tag = pa->pa_tag; 913 sc->sc_dmat = pa->pa_dmat; 914 915 memtype = pci_mapreg_type(sc->sc_pc, sc->sc_tag, ARC_RA_PCI_BAR); 916 if (pci_mapreg_map(pa, ARC_RA_PCI_BAR, memtype, 0, &sc->sc_iot, 917 &sc->sc_ioh, NULL, &sc->sc_ios, 0) != 0) { 918 printf(": unable to map system interface register\n"); 919 return(1); 920 } 921 922 if (pci_intr_map(pa, &ih) != 0) { 923 printf(": unable to map interrupt\n"); 924 goto unmap; 925 } 926 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, 927 arc_intr, sc, DEVNAME(sc)); 928 if (sc->sc_ih == NULL) { 929 printf(": unable to map interrupt\n"); 930 goto unmap; 931 } 932 printf(": %s\n", pci_intr_string(pa->pa_pc, ih)); 933 934 return (0); 935 936 unmap: 937 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 938 sc->sc_ios = 0; 939 return (1); 940 } 941 942 void 943 arc_unmap_pci_resources(struct arc_softc *sc) 944 { 945 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 946 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 947 sc->sc_ios = 0; 948 } 949 950 int 951 arc_intel_query_firmware(struct arc_softc *sc) 952 { 953 struct arc_msg_firmware_info fwinfo; 954 char string[81]; /* sizeof(vendor)*2+1 */ 955 956 if (arc_wait_eq(sc, ARC_RA_OUTB_ADDR1, ARC_RA_OUTB_ADDR1_FIRMWARE_OK, 957 ARC_RA_OUTB_ADDR1_FIRMWARE_OK) != 0) { 958 printf("%s: timeout waiting for firmware ok\n", DEVNAME(sc)); 959 return (1); 960 } 961 962 if (arc_msg0(sc, ARC_RA_INB_MSG0_GET_CONFIG) != 0) { 963 printf("%s: timeout waiting for get config\n", DEVNAME(sc)); 964 return (1); 965 } 966 967 arc_read_region(sc, ARC_RA_MSGBUF, &fwinfo, sizeof(fwinfo)); 968 969 DNPRINTF(ARC_D_INIT, "%s: signature: 0x%08x\n", DEVNAME(sc), 970 letoh32(fwinfo.signature)); 971 972 if (letoh32(fwinfo.signature) != ARC_FWINFO_SIGNATURE_GET_CONFIG) { 973 printf("%s: invalid firmware info from iop\n", DEVNAME(sc)); 974 return (1); 975 } 976 977 DNPRINTF(ARC_D_INIT, "%s: request_len: %d\n", DEVNAME(sc), 978 letoh32(fwinfo.request_len)); 979 DNPRINTF(ARC_D_INIT, "%s: queue_len: %d\n", DEVNAME(sc), 980 letoh32(fwinfo.queue_len)); 981 DNPRINTF(ARC_D_INIT, "%s: sdram_size: %d\n", DEVNAME(sc), 982 letoh32(fwinfo.sdram_size)); 983 DNPRINTF(ARC_D_INIT, "%s: sata_ports: %d\n", DEVNAME(sc), 984 letoh32(fwinfo.sata_ports), letoh32(fwinfo.sata_ports)); 985 986 #ifdef ARC_DEBUG 987 scsi_strvis(string, fwinfo.vendor, sizeof(fwinfo.vendor)); 988 DNPRINTF(ARC_D_INIT, "%s: vendor: \"%s\"\n", DEVNAME(sc), string); 989 scsi_strvis(string, fwinfo.model, sizeof(fwinfo.model)); 990 DNPRINTF(ARC_D_INIT, "%s: model: \"%s\"\n", DEVNAME(sc), string); 991 #endif /* ARC_DEBUG */ 992 993 scsi_strvis(string, fwinfo.fw_version, sizeof(fwinfo.fw_version)); 994 DNPRINTF(ARC_D_INIT, "%s: model: \"%s\"\n", DEVNAME(sc), string); 995 996 if (letoh32(fwinfo.request_len) != ARC_MAX_IOCMDLEN) { 997 printf("%s: unexpected request frame size (%d != %d)\n", 998 DEVNAME(sc), letoh32(fwinfo.request_len), ARC_MAX_IOCMDLEN); 999 return (1); 1000 } 1001 1002 sc->sc_req_count = letoh32(fwinfo.queue_len); 1003 1004 if (arc_msg0(sc, ARC_RA_INB_MSG0_START_BGRB) != 0) { 1005 printf("%s: timeout waiting to start bg rebuild\n", 1006 DEVNAME(sc)); 1007 return (1); 1008 } 1009 1010 printf("%s: %d ports, %dMB SDRAM, firmware %s\n", 1011 DEVNAME(sc), letoh32(fwinfo.sata_ports), 1012 letoh32(fwinfo.sdram_size), string); 1013 1014 return (0); 1015 } 1016 1017 int 1018 arc_marvell_query_firmware(struct arc_softc *sc) 1019 { 1020 if (arc_wait_eq(sc, ARC_RB_IOP2DRV_DOORBELL, 1021 ARC_RA_OUTB_ADDR1_FIRMWARE_OK, 1022 ARC_RA_OUTB_ADDR1_FIRMWARE_OK) != 0) { 1023 printf("%s: timeout waiting for firmware ok\n", DEVNAME(sc)); 1024 return (1); 1025 } 1026 1027 return (1); 1028 } 1029 1030 #if NBIO > 0 1031 int 1032 arc_bioctl(struct device *self, u_long cmd, caddr_t addr) 1033 { 1034 struct arc_softc *sc = (struct arc_softc *)self; 1035 int error = 0; 1036 1037 switch (cmd) { 1038 case BIOCINQ: 1039 error = arc_bio_inq(sc, (struct bioc_inq *)addr); 1040 break; 1041 1042 case BIOCVOL: 1043 error = arc_bio_vol(sc, (struct bioc_vol *)addr); 1044 break; 1045 1046 case BIOCDISK: 1047 error = arc_bio_disk(sc, (struct bioc_disk *)addr); 1048 break; 1049 1050 case BIOCALARM: 1051 error = arc_bio_alarm(sc, (struct bioc_alarm *)addr); 1052 break; 1053 1054 case BIOCBLINK: 1055 error = arc_bio_blink(sc, (struct bioc_blink *)addr); 1056 break; 1057 1058 default: 1059 error = ENOTTY; 1060 break; 1061 } 1062 1063 return (error); 1064 } 1065 1066 int 1067 arc_bio_alarm(struct arc_softc *sc, struct bioc_alarm *ba) 1068 { 1069 u_int8_t request[2]; 1070 u_int8_t reply[1]; 1071 size_t len; 1072 int error = 0; 1073 1074 switch (ba->ba_opcode) { 1075 case BIOC_SAENABLE: 1076 case BIOC_SADISABLE: 1077 request[0] = ARC_FW_SET_ALARM; 1078 request[1] = (ba->ba_opcode == BIOC_SAENABLE) ? 1079 ARC_FW_SET_ALARM_ENABLE : ARC_FW_SET_ALARM_DISABLE; 1080 len = sizeof(request); 1081 1082 break; 1083 1084 case BIOC_SASILENCE: 1085 request[0] = ARC_FW_MUTE_ALARM; 1086 len = 1; 1087 1088 break; 1089 1090 case BIOC_GASTATUS: 1091 /* system info is too big/ugly to deal with here */ 1092 return (arc_bio_alarm_state(sc, ba)); 1093 1094 default: 1095 return (EOPNOTSUPP); 1096 } 1097 1098 arc_lock(sc); 1099 error = arc_msgbuf(sc, request, len, reply, sizeof(reply), 0); 1100 arc_unlock(sc); 1101 1102 if (error != 0) 1103 return (error); 1104 1105 switch (reply[0]) { 1106 case ARC_FW_CMD_OK: 1107 return (0); 1108 case ARC_FW_CMD_PASS_REQD: 1109 return (EPERM); 1110 default: 1111 return (EIO); 1112 } 1113 } 1114 1115 int 1116 arc_bio_alarm_state(struct arc_softc *sc, struct bioc_alarm *ba) 1117 { 1118 u_int8_t request = ARC_FW_SYSINFO; 1119 struct arc_fw_sysinfo *sysinfo; 1120 int error = 0; 1121 1122 sysinfo = malloc(sizeof(struct arc_fw_sysinfo), M_TEMP, M_WAITOK); 1123 1124 request = ARC_FW_SYSINFO; 1125 1126 arc_lock(sc); 1127 error = arc_msgbuf(sc, &request, sizeof(request), 1128 sysinfo, sizeof(struct arc_fw_sysinfo), 0); 1129 arc_unlock(sc); 1130 1131 if (error != 0) 1132 goto out; 1133 1134 ba->ba_status = sysinfo->alarm; 1135 1136 out: 1137 free(sysinfo, M_TEMP); 1138 return (error); 1139 } 1140 1141 1142 int 1143 arc_bio_inq(struct arc_softc *sc, struct bioc_inq *bi) 1144 { 1145 u_int8_t request[2]; 1146 struct arc_fw_sysinfo *sysinfo; 1147 struct arc_fw_volinfo *volinfo; 1148 int maxvols, nvols = 0, i; 1149 int error = 0; 1150 1151 sysinfo = malloc(sizeof(struct arc_fw_sysinfo), M_TEMP, M_WAITOK); 1152 volinfo = malloc(sizeof(struct arc_fw_volinfo), M_TEMP, M_WAITOK); 1153 1154 arc_lock(sc); 1155 1156 request[0] = ARC_FW_SYSINFO; 1157 error = arc_msgbuf(sc, request, 1, sysinfo, 1158 sizeof(struct arc_fw_sysinfo), 0); 1159 if (error != 0) 1160 goto out; 1161 1162 maxvols = sysinfo->max_volume_set; 1163 1164 request[0] = ARC_FW_VOLINFO; 1165 for (i = 0; i < maxvols; i++) { 1166 request[1] = i; 1167 error = arc_msgbuf(sc, request, sizeof(request), volinfo, 1168 sizeof(struct arc_fw_volinfo), 0); 1169 if (error != 0) 1170 goto out; 1171 1172 /* 1173 * I can't find an easy way to see if the volume exists or not 1174 * except to say that if it has no capacity then it isn't there. 1175 * Ignore passthru volumes, bioc_vol doesn't understand them. 1176 */ 1177 if ((volinfo->capacity != 0 || volinfo->capacity2 != 0) && 1178 volinfo->raid_level != ARC_FW_VOL_RAIDLEVEL_PASSTHRU) 1179 nvols++; 1180 } 1181 1182 strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev)); 1183 bi->bi_novol = nvols; 1184 out: 1185 arc_unlock(sc); 1186 free(volinfo, M_TEMP); 1187 free(sysinfo, M_TEMP); 1188 return (error); 1189 } 1190 1191 int 1192 arc_bio_blink(struct arc_softc *sc, struct bioc_blink *blink) 1193 { 1194 u_int8_t request[5]; 1195 u_int32_t mask; 1196 int error = 0; 1197 1198 request[0] = ARC_FW_BLINK; 1199 request[1] = ARC_FW_BLINK_ENABLE; 1200 1201 switch (blink->bb_status) { 1202 case BIOC_SBUNBLINK: 1203 sc->sc_ledmask &= ~(1 << blink->bb_target); 1204 break; 1205 case BIOC_SBBLINK: 1206 sc->sc_ledmask |= (1 << blink->bb_target); 1207 break; 1208 default: 1209 return (EINVAL); 1210 } 1211 1212 mask = htole32(sc->sc_ledmask); 1213 bcopy(&mask, &request[2], 3); 1214 1215 error = arc_msgbuf(sc, request, sizeof(request), NULL, 0, 0); 1216 if (error) 1217 return (EIO); 1218 1219 return (0); 1220 } 1221 1222 int 1223 arc_bio_getvol(struct arc_softc *sc, int vol, struct arc_fw_volinfo *volinfo) 1224 { 1225 u_int8_t request[2]; 1226 struct arc_fw_sysinfo *sysinfo; 1227 int error = 0; 1228 int maxvols, nvols = 0, i; 1229 1230 sysinfo = malloc(sizeof(struct arc_fw_sysinfo), M_TEMP, M_WAITOK); 1231 1232 request[0] = ARC_FW_SYSINFO; 1233 error = arc_msgbuf(sc, request, 1, sysinfo, 1234 sizeof(struct arc_fw_sysinfo), 0); 1235 if (error != 0) 1236 goto out; 1237 1238 maxvols = sysinfo->max_volume_set; 1239 1240 request[0] = ARC_FW_VOLINFO; 1241 for (i = 0; i < maxvols; i++) { 1242 request[1] = i; 1243 error = arc_msgbuf(sc, request, sizeof(request), volinfo, 1244 sizeof(struct arc_fw_volinfo), 0); 1245 if (error != 0) 1246 goto out; 1247 1248 if ((volinfo->capacity == 0 && volinfo->capacity2 == 0) || 1249 volinfo->raid_level == ARC_FW_VOL_RAIDLEVEL_PASSTHRU) 1250 continue; 1251 1252 if (nvols == vol) 1253 break; 1254 1255 nvols++; 1256 } 1257 1258 if (nvols != vol || 1259 (volinfo->capacity == 0 && volinfo->capacity2 == 0) || 1260 volinfo->raid_level == ARC_FW_VOL_RAIDLEVEL_PASSTHRU) { 1261 error = ENODEV; 1262 goto out; 1263 } 1264 1265 out: 1266 free(sysinfo, M_TEMP); 1267 return (error); 1268 } 1269 1270 int 1271 arc_bio_vol(struct arc_softc *sc, struct bioc_vol *bv) 1272 { 1273 struct arc_fw_volinfo *volinfo; 1274 struct scsi_link *sc_link; 1275 struct device *dev; 1276 u_int64_t blocks; 1277 u_int32_t status; 1278 int error = 0; 1279 1280 volinfo = malloc(sizeof(struct arc_fw_volinfo), M_TEMP, M_WAITOK); 1281 1282 arc_lock(sc); 1283 error = arc_bio_getvol(sc, bv->bv_volid, volinfo); 1284 arc_unlock(sc); 1285 1286 if (error != 0) 1287 goto out; 1288 1289 bv->bv_percent = -1; 1290 bv->bv_seconds = 0; 1291 1292 status = letoh32(volinfo->volume_status); 1293 if (status == 0x0) { 1294 if (letoh32(volinfo->fail_mask) == 0x0) 1295 bv->bv_status = BIOC_SVONLINE; 1296 else 1297 bv->bv_status = BIOC_SVDEGRADED; 1298 } else if (status & ARC_FW_VOL_STATUS_NEED_REGEN) 1299 bv->bv_status = BIOC_SVDEGRADED; 1300 else if (status & ARC_FW_VOL_STATUS_FAILED) 1301 bv->bv_status = BIOC_SVOFFLINE; 1302 else if (status & ARC_FW_VOL_STATUS_INITTING) { 1303 bv->bv_status = BIOC_SVBUILDING; 1304 bv->bv_percent = letoh32(volinfo->progress) / 10; 1305 } else if (status & ARC_FW_VOL_STATUS_REBUILDING) { 1306 bv->bv_status = BIOC_SVREBUILD; 1307 bv->bv_percent = letoh32(volinfo->progress) / 10; 1308 } 1309 1310 blocks = (u_int64_t)letoh32(volinfo->capacity2) << 32; 1311 blocks += (u_int64_t)letoh32(volinfo->capacity); 1312 bv->bv_size = blocks * ARC_BLOCKSIZE; /* XXX */ 1313 1314 switch (volinfo->raid_level) { 1315 case ARC_FW_VOL_RAIDLEVEL_0: 1316 bv->bv_level = 0; 1317 break; 1318 case ARC_FW_VOL_RAIDLEVEL_1: 1319 bv->bv_level = 1; 1320 break; 1321 case ARC_FW_VOL_RAIDLEVEL_3: 1322 bv->bv_level = 3; 1323 break; 1324 case ARC_FW_VOL_RAIDLEVEL_5: 1325 bv->bv_level = 5; 1326 break; 1327 case ARC_FW_VOL_RAIDLEVEL_6: 1328 bv->bv_level = 6; 1329 break; 1330 case ARC_FW_VOL_RAIDLEVEL_PASSTHRU: 1331 default: 1332 bv->bv_level = -1; 1333 break; 1334 } 1335 1336 bv->bv_nodisk = volinfo->member_disks; 1337 sc_link = scsi_get_link(sc->sc_scsibus, volinfo->scsi_attr.target, 1338 volinfo->scsi_attr.lun); 1339 if (sc_link != NULL) { 1340 dev = sc_link->device_softc; 1341 strlcpy(bv->bv_dev, dev->dv_xname, sizeof(bv->bv_dev)); 1342 } 1343 1344 out: 1345 free(volinfo, M_TEMP); 1346 return (error); 1347 } 1348 1349 int 1350 arc_bio_disk(struct arc_softc *sc, struct bioc_disk *bd) 1351 { 1352 u_int8_t request[2]; 1353 struct arc_fw_volinfo *volinfo; 1354 struct arc_fw_raidinfo *raidinfo; 1355 struct arc_fw_diskinfo *diskinfo; 1356 int error = 0; 1357 u_int64_t blocks; 1358 char model[81]; 1359 char serial[41]; 1360 char rev[17]; 1361 1362 volinfo = malloc(sizeof(struct arc_fw_volinfo), M_TEMP, M_WAITOK); 1363 raidinfo = malloc(sizeof(struct arc_fw_raidinfo), M_TEMP, M_WAITOK); 1364 diskinfo = malloc(sizeof(struct arc_fw_diskinfo), M_TEMP, M_WAITOK); 1365 1366 arc_lock(sc); 1367 1368 error = arc_bio_getvol(sc, bd->bd_volid, volinfo); 1369 if (error != 0) 1370 goto out; 1371 1372 request[0] = ARC_FW_RAIDINFO; 1373 request[1] = volinfo->raid_set_number; 1374 error = arc_msgbuf(sc, request, sizeof(request), raidinfo, 1375 sizeof(struct arc_fw_raidinfo), 0); 1376 if (error != 0) 1377 goto out; 1378 1379 if (bd->bd_diskid > raidinfo->member_devices) { 1380 error = ENODEV; 1381 goto out; 1382 } 1383 1384 if (raidinfo->device_array[bd->bd_diskid] == 0xff) { 1385 /* 1386 * the disk doesn't exist anymore. bio is too dumb to be 1387 * able to display that, so put it on another bus 1388 */ 1389 bd->bd_channel = 1; 1390 bd->bd_target = 0; 1391 bd->bd_lun = 0; 1392 bd->bd_status = BIOC_SDOFFLINE; 1393 strlcpy(bd->bd_vendor, "disk missing", sizeof(bd->bd_vendor)); 1394 goto out; 1395 } 1396 1397 request[0] = ARC_FW_DISKINFO; 1398 request[1] = raidinfo->device_array[bd->bd_diskid]; 1399 error = arc_msgbuf(sc, request, sizeof(request), diskinfo, 1400 sizeof(struct arc_fw_diskinfo), 1); 1401 if (error != 0) 1402 goto out; 1403 1404 #if 0 1405 bd->bd_channel = diskinfo->scsi_attr.channel; 1406 bd->bd_target = diskinfo->scsi_attr.target; 1407 bd->bd_lun = diskinfo->scsi_attr.lun; 1408 #endif 1409 /* 1410 * the firwmare doesnt seem to fill scsi_attr in, so fake it with 1411 * the diskid. 1412 */ 1413 bd->bd_channel = 0; 1414 bd->bd_target = raidinfo->device_array[bd->bd_diskid]; 1415 bd->bd_lun = 0; 1416 1417 bd->bd_status = BIOC_SDONLINE; 1418 blocks = (u_int64_t)letoh32(diskinfo->capacity2) << 32; 1419 blocks += (u_int64_t)letoh32(diskinfo->capacity); 1420 bd->bd_size = blocks * ARC_BLOCKSIZE; /* XXX */ 1421 1422 scsi_strvis(model, diskinfo->model, sizeof(diskinfo->model)); 1423 scsi_strvis(serial, diskinfo->serial, sizeof(diskinfo->serial)); 1424 scsi_strvis(rev, diskinfo->firmware_rev, 1425 sizeof(diskinfo->firmware_rev)); 1426 1427 snprintf(bd->bd_vendor, sizeof(bd->bd_vendor), "%s %s", 1428 model, rev); 1429 strlcpy(bd->bd_serial, serial, sizeof(bd->bd_serial)); 1430 1431 out: 1432 arc_unlock(sc); 1433 free(diskinfo, M_TEMP); 1434 free(raidinfo, M_TEMP); 1435 free(volinfo, M_TEMP); 1436 return (error); 1437 } 1438 1439 u_int8_t 1440 arc_msg_cksum(void *cmd, u_int16_t len) 1441 { 1442 u_int8_t *buf = cmd; 1443 u_int8_t cksum; 1444 int i; 1445 1446 cksum = (u_int8_t)(len >> 8) + (u_int8_t)len; 1447 for (i = 0; i < len; i++) 1448 cksum += buf[i]; 1449 1450 return (cksum); 1451 } 1452 1453 1454 int 1455 arc_msgbuf(struct arc_softc *sc, void *wptr, size_t wbuflen, void *rptr, 1456 size_t rbuflen, int sreadok) 1457 { 1458 u_int8_t rwbuf[ARC_RA_IOC_RWBUF_MAXLEN]; 1459 u_int8_t *wbuf, *rbuf; 1460 int wlen, wdone = 0, rlen, rdone = 0; 1461 u_int16_t rlenhdr = 0; 1462 struct arc_fw_bufhdr *bufhdr; 1463 u_int32_t reg, rwlen; 1464 int error = 0; 1465 #ifdef ARC_DEBUG 1466 int i; 1467 #endif 1468 1469 DNPRINTF(ARC_D_DB, "%s: arc_msgbuf wbuflen: %d rbuflen: %d\n", 1470 DEVNAME(sc), wbuflen, rbuflen); 1471 1472 if (arc_read(sc, ARC_RA_OUTB_DOORBELL) != 0) 1473 return (EBUSY); 1474 1475 wlen = sizeof(struct arc_fw_bufhdr) + wbuflen + 1; /* 1 for cksum */ 1476 wbuf = malloc(wlen, M_TEMP, M_WAITOK); 1477 1478 rlen = sizeof(struct arc_fw_bufhdr) + rbuflen + 1; /* 1 for cksum */ 1479 rbuf = malloc(rlen, M_TEMP, M_WAITOK); 1480 1481 DNPRINTF(ARC_D_DB, "%s: arc_msgbuf wlen: %d rlen: %d\n", DEVNAME(sc), 1482 wlen, rlen); 1483 1484 bufhdr = (struct arc_fw_bufhdr *)wbuf; 1485 bufhdr->hdr = arc_fw_hdr; 1486 bufhdr->len = htole16(wbuflen); 1487 bcopy(wptr, wbuf + sizeof(struct arc_fw_bufhdr), wbuflen); 1488 wbuf[wlen - 1] = arc_msg_cksum(wptr, wbuflen); 1489 1490 reg = ARC_RA_OUTB_DOORBELL_READ_OK; 1491 1492 do { 1493 if ((reg & ARC_RA_OUTB_DOORBELL_READ_OK) && wdone < wlen) { 1494 bzero(rwbuf, sizeof(rwbuf)); 1495 rwlen = (wlen - wdone) % sizeof(rwbuf); 1496 bcopy(&wbuf[wdone], rwbuf, rwlen); 1497 1498 #ifdef ARC_DEBUG 1499 if (arcdebug & ARC_D_DB) { 1500 printf("%s: write %d:", DEVNAME(sc), rwlen); 1501 for (i = 0; i < rwlen; i++) 1502 printf(" 0x%02x", rwbuf[i]); 1503 printf("\n"); 1504 } 1505 #endif 1506 1507 /* copy the chunk to the hw */ 1508 arc_write(sc, ARC_RA_IOC_WBUF_LEN, rwlen); 1509 arc_write_region(sc, ARC_RA_IOC_WBUF, rwbuf, 1510 sizeof(rwbuf)); 1511 1512 /* say we have a buffer for the hw */ 1513 arc_write(sc, ARC_RA_INB_DOORBELL, 1514 ARC_RA_INB_DOORBELL_WRITE_OK); 1515 1516 wdone += rwlen; 1517 } 1518 1519 if (rptr == NULL) 1520 goto out; 1521 1522 while ((reg = arc_read(sc, ARC_RA_OUTB_DOORBELL)) == 0) 1523 arc_wait(sc); 1524 arc_write(sc, ARC_RA_OUTB_DOORBELL, reg); 1525 1526 DNPRINTF(ARC_D_DB, "%s: reg: 0x%08x\n", DEVNAME(sc), reg); 1527 1528 if ((reg & ARC_RA_OUTB_DOORBELL_WRITE_OK) && rdone < rlen) { 1529 rwlen = arc_read(sc, ARC_RA_IOC_RBUF_LEN); 1530 if (rwlen > sizeof(rwbuf)) { 1531 DNPRINTF(ARC_D_DB, "%s: rwlen too big\n", 1532 DEVNAME(sc)); 1533 error = EIO; 1534 goto out; 1535 } 1536 1537 arc_read_region(sc, ARC_RA_IOC_RBUF, rwbuf, 1538 sizeof(rwbuf)); 1539 1540 arc_write(sc, ARC_RA_INB_DOORBELL, 1541 ARC_RA_INB_DOORBELL_READ_OK); 1542 1543 #ifdef ARC_DEBUG 1544 printf("%s: len: %d+%d=%d/%d\n", DEVNAME(sc), 1545 rwlen, rdone, rwlen + rdone, rlen); 1546 if (arcdebug & ARC_D_DB) { 1547 printf("%s: read:", DEVNAME(sc)); 1548 for (i = 0; i < rwlen; i++) 1549 printf(" 0x%02x", rwbuf[i]); 1550 printf("\n"); 1551 } 1552 #endif 1553 1554 if ((rdone + rwlen) > rlen) { 1555 DNPRINTF(ARC_D_DB, "%s: rwbuf too big\n", 1556 DEVNAME(sc)); 1557 error = EIO; 1558 goto out; 1559 } 1560 1561 bcopy(rwbuf, &rbuf[rdone], rwlen); 1562 rdone += rwlen; 1563 1564 /* 1565 * Allow for short reads, by reading the length 1566 * value from the response header and shrinking our 1567 * idea of size, if required. 1568 * This deals with the growth of diskinfo struct from 1569 * 128 to 132 bytes. 1570 */ 1571 if (sreadok && rdone >= sizeof(struct arc_fw_bufhdr) && 1572 rlenhdr == 0) { 1573 bufhdr = (struct arc_fw_bufhdr *)rbuf; 1574 rlenhdr = letoh16(bufhdr->len); 1575 if (rlenhdr < rbuflen) { 1576 rbuflen = rlenhdr; 1577 rlen = sizeof(struct arc_fw_bufhdr) + 1578 rbuflen + 1; /* 1 for cksum */ 1579 } 1580 } 1581 } 1582 } while (rdone != rlen); 1583 1584 bufhdr = (struct arc_fw_bufhdr *)rbuf; 1585 if (memcmp(&bufhdr->hdr, &arc_fw_hdr, sizeof(bufhdr->hdr)) != 0 || 1586 bufhdr->len != htole16(rbuflen)) { 1587 DNPRINTF(ARC_D_DB, "%s: rbuf hdr is wrong\n", DEVNAME(sc)); 1588 error = EIO; 1589 goto out; 1590 } 1591 1592 bcopy(rbuf + sizeof(struct arc_fw_bufhdr), rptr, rbuflen); 1593 1594 if (rbuf[rlen - 1] != arc_msg_cksum(rptr, rbuflen)) { 1595 DNPRINTF(ARC_D_DB, "%s: invalid cksum\n", DEVNAME(sc)); 1596 error = EIO; 1597 goto out; 1598 } 1599 1600 out: 1601 free(wbuf, M_TEMP); 1602 free(rbuf, M_TEMP); 1603 1604 return (error); 1605 } 1606 1607 void 1608 arc_lock(struct arc_softc *sc) 1609 { 1610 int s; 1611 1612 rw_enter_write(&sc->sc_lock); 1613 s = splbio(); 1614 arc_write(sc, ARC_RA_INTRMASK, ~ARC_RA_INTRMASK_POSTQUEUE); 1615 sc->sc_talking = 1; 1616 splx(s); 1617 } 1618 1619 void 1620 arc_unlock(struct arc_softc *sc) 1621 { 1622 int s; 1623 1624 s = splbio(); 1625 sc->sc_talking = 0; 1626 arc_write(sc, ARC_RA_INTRMASK, 1627 ~(ARC_RA_INTRMASK_POSTQUEUE|ARC_RA_INTRMASK_DOORBELL)); 1628 splx(s); 1629 rw_exit_write(&sc->sc_lock); 1630 } 1631 1632 void 1633 arc_wait(struct arc_softc *sc) 1634 { 1635 int s; 1636 1637 s = splbio(); 1638 arc_write(sc, ARC_RA_INTRMASK, 1639 ~(ARC_RA_INTRMASK_POSTQUEUE|ARC_RA_INTRMASK_DOORBELL)); 1640 if (tsleep(sc, PWAIT, "arcdb", hz) == EWOULDBLOCK) 1641 arc_write(sc, ARC_RA_INTRMASK, ~ARC_RA_INTRMASK_POSTQUEUE); 1642 splx(s); 1643 } 1644 1645 #ifndef SMALL_KERNEL 1646 void 1647 arc_create_sensors(void *xsc, void *arg) 1648 { 1649 struct arc_softc *sc = xsc; 1650 struct bioc_inq bi; 1651 struct bioc_vol bv; 1652 int i; 1653 1654 /* 1655 * XXX * this is bollocks. the firmware has garbage coming out of it 1656 * so we have to wait a bit for it to finish spewing. 1657 */ 1658 tsleep(sc, PWAIT, "arcspew", 2 * hz); 1659 1660 bzero(&bi, sizeof(bi)); 1661 if (arc_bio_inq(sc, &bi) != 0) { 1662 printf("%s: unable to query firmware for sensor info\n", 1663 DEVNAME(sc)); 1664 return; 1665 } 1666 sc->sc_nsensors = bi.bi_novol; 1667 1668 sc->sc_sensors = malloc(sizeof(struct ksensor) * sc->sc_nsensors, 1669 M_DEVBUF, M_WAITOK | M_ZERO); 1670 1671 strlcpy(sc->sc_sensordev.xname, DEVNAME(sc), 1672 sizeof(sc->sc_sensordev.xname)); 1673 1674 for (i = 0; i < sc->sc_nsensors; i++) { 1675 bzero(&bv, sizeof(bv)); 1676 bv.bv_volid = i; 1677 if (arc_bio_vol(sc, &bv) != 0) 1678 goto bad; 1679 1680 sc->sc_sensors[i].type = SENSOR_DRIVE; 1681 sc->sc_sensors[i].status = SENSOR_S_UNKNOWN; 1682 1683 strlcpy(sc->sc_sensors[i].desc, bv.bv_dev, 1684 sizeof(sc->sc_sensors[i].desc)); 1685 1686 sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]); 1687 } 1688 1689 if (sensor_task_register(sc, arc_refresh_sensors, 120) == NULL) 1690 goto bad; 1691 1692 sensordev_install(&sc->sc_sensordev); 1693 1694 return; 1695 1696 bad: 1697 free(sc->sc_sensors, M_DEVBUF); 1698 } 1699 1700 void 1701 arc_refresh_sensors(void *arg) 1702 { 1703 struct arc_softc *sc = arg; 1704 struct bioc_vol bv; 1705 int i; 1706 1707 for (i = 0; i < sc->sc_nsensors; i++) { 1708 bzero(&bv, sizeof(bv)); 1709 bv.bv_volid = i; 1710 if (arc_bio_vol(sc, &bv)) { 1711 sc->sc_sensors[i].flags = SENSOR_FINVALID; 1712 return; 1713 } 1714 1715 switch(bv.bv_status) { 1716 case BIOC_SVOFFLINE: 1717 sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL; 1718 sc->sc_sensors[i].status = SENSOR_S_CRIT; 1719 break; 1720 1721 case BIOC_SVDEGRADED: 1722 sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL; 1723 sc->sc_sensors[i].status = SENSOR_S_WARN; 1724 break; 1725 1726 case BIOC_SVSCRUB: 1727 case BIOC_SVONLINE: 1728 sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE; 1729 sc->sc_sensors[i].status = SENSOR_S_OK; 1730 break; 1731 1732 case BIOC_SVINVALID: 1733 /* FALLTRHOUGH */ 1734 default: 1735 sc->sc_sensors[i].value = 0; /* unknown */ 1736 sc->sc_sensors[i].status = SENSOR_S_UNKNOWN; 1737 } 1738 1739 } 1740 } 1741 #endif /* SMALL_KERNEL */ 1742 #endif /* NBIO > 0 */ 1743 1744 u_int32_t 1745 arc_read(struct arc_softc *sc, bus_size_t r) 1746 { 1747 u_int32_t v; 1748 1749 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1750 BUS_SPACE_BARRIER_READ); 1751 v = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 1752 1753 DNPRINTF(ARC_D_RW, "%s: arc_read 0x%x 0x%08x\n", DEVNAME(sc), r, v); 1754 1755 return (v); 1756 } 1757 1758 void 1759 arc_read_region(struct arc_softc *sc, bus_size_t r, void *buf, size_t len) 1760 { 1761 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, len, 1762 BUS_SPACE_BARRIER_READ); 1763 bus_space_read_raw_region_4(sc->sc_iot, sc->sc_ioh, r, buf, len); 1764 } 1765 1766 void 1767 arc_write(struct arc_softc *sc, bus_size_t r, u_int32_t v) 1768 { 1769 DNPRINTF(ARC_D_RW, "%s: arc_write 0x%x 0x%08x\n", DEVNAME(sc), r, v); 1770 1771 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 1772 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1773 BUS_SPACE_BARRIER_WRITE); 1774 } 1775 1776 void 1777 arc_write_region(struct arc_softc *sc, bus_size_t r, void *buf, size_t len) 1778 { 1779 bus_space_write_raw_region_4(sc->sc_iot, sc->sc_ioh, r, buf, len); 1780 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, len, 1781 BUS_SPACE_BARRIER_WRITE); 1782 } 1783 1784 int 1785 arc_wait_eq(struct arc_softc *sc, bus_size_t r, u_int32_t mask, 1786 u_int32_t target) 1787 { 1788 int i; 1789 1790 DNPRINTF(ARC_D_RW, "%s: arc_wait_eq 0x%x 0x%08x 0x%08x\n", 1791 DEVNAME(sc), r, mask, target); 1792 1793 for (i = 0; i < 10000; i++) { 1794 if ((arc_read(sc, r) & mask) == target) 1795 return (0); 1796 delay(1000); 1797 } 1798 1799 return (1); 1800 } 1801 1802 int 1803 arc_wait_ne(struct arc_softc *sc, bus_size_t r, u_int32_t mask, 1804 u_int32_t target) 1805 { 1806 int i; 1807 1808 DNPRINTF(ARC_D_RW, "%s: arc_wait_ne 0x%x 0x%08x 0x%08x\n", 1809 DEVNAME(sc), r, mask, target); 1810 1811 for (i = 0; i < 10000; i++) { 1812 if ((arc_read(sc, r) & mask) != target) 1813 return (0); 1814 delay(1000); 1815 } 1816 1817 return (1); 1818 } 1819 1820 int 1821 arc_msg0(struct arc_softc *sc, u_int32_t m) 1822 { 1823 /* post message */ 1824 arc_write(sc, ARC_RA_INB_MSG0, m); 1825 /* wait for the fw to do it */ 1826 if (arc_wait_eq(sc, ARC_RA_INTRSTAT, ARC_RA_INTRSTAT_MSG0, 1827 ARC_RA_INTRSTAT_MSG0) != 0) 1828 return (1); 1829 1830 /* ack it */ 1831 arc_write(sc, ARC_RA_INTRSTAT, ARC_RA_INTRSTAT_MSG0); 1832 1833 return (0); 1834 } 1835 1836 struct arc_dmamem * 1837 arc_dmamem_alloc(struct arc_softc *sc, size_t size) 1838 { 1839 struct arc_dmamem *adm; 1840 int nsegs; 1841 1842 adm = malloc(sizeof(*adm), M_DEVBUF, M_NOWAIT | M_ZERO); 1843 if (adm == NULL) 1844 return (NULL); 1845 1846 adm->adm_size = size; 1847 1848 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 1849 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &adm->adm_map) != 0) 1850 goto admfree; 1851 1852 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &adm->adm_seg, 1853 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO) != 0) 1854 goto destroy; 1855 1856 if (bus_dmamem_map(sc->sc_dmat, &adm->adm_seg, nsegs, size, 1857 &adm->adm_kva, BUS_DMA_NOWAIT) != 0) 1858 goto free; 1859 1860 if (bus_dmamap_load(sc->sc_dmat, adm->adm_map, adm->adm_kva, size, 1861 NULL, BUS_DMA_NOWAIT) != 0) 1862 goto unmap; 1863 1864 return (adm); 1865 1866 unmap: 1867 bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, size); 1868 free: 1869 bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1); 1870 destroy: 1871 bus_dmamap_destroy(sc->sc_dmat, adm->adm_map); 1872 admfree: 1873 free(adm, M_DEVBUF); 1874 1875 return (NULL); 1876 } 1877 1878 void 1879 arc_dmamem_free(struct arc_softc *sc, struct arc_dmamem *adm) 1880 { 1881 bus_dmamap_unload(sc->sc_dmat, adm->adm_map); 1882 bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, adm->adm_size); 1883 bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1); 1884 bus_dmamap_destroy(sc->sc_dmat, adm->adm_map); 1885 free(adm, M_DEVBUF); 1886 } 1887 1888 int 1889 arc_alloc_ccbs(struct arc_softc *sc) 1890 { 1891 struct arc_ccb *ccb; 1892 u_int8_t *cmd; 1893 int i; 1894 1895 SLIST_INIT(&sc->sc_ccb_free); 1896 mtx_init(&sc->sc_ccb_mtx, IPL_BIO); 1897 1898 sc->sc_ccbs = malloc(sizeof(struct arc_ccb) * sc->sc_req_count, 1899 M_DEVBUF, M_WAITOK | M_ZERO); 1900 1901 sc->sc_requests = arc_dmamem_alloc(sc, 1902 ARC_MAX_IOCMDLEN * sc->sc_req_count); 1903 if (sc->sc_requests == NULL) { 1904 printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc)); 1905 goto free_ccbs; 1906 } 1907 cmd = ARC_DMA_KVA(sc->sc_requests); 1908 1909 for (i = 0; i < sc->sc_req_count; i++) { 1910 ccb = &sc->sc_ccbs[i]; 1911 1912 if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, ARC_SGL_MAXLEN, 1913 MAXPHYS, 0, 0, &ccb->ccb_dmamap) != 0) { 1914 printf("%s: unable to create dmamap for ccb %d\n", 1915 DEVNAME(sc), i); 1916 goto free_maps; 1917 } 1918 1919 ccb->ccb_sc = sc; 1920 ccb->ccb_id = i; 1921 ccb->ccb_offset = ARC_MAX_IOCMDLEN * i; 1922 1923 ccb->ccb_cmd = (struct arc_io_cmd *)&cmd[ccb->ccb_offset]; 1924 ccb->ccb_cmd_post = (ARC_DMA_DVA(sc->sc_requests) + 1925 ccb->ccb_offset) >> ARC_RA_POST_QUEUE_ADDR_SHIFT; 1926 1927 arc_put_ccb(sc, ccb); 1928 } 1929 1930 scsi_iopool_init(&sc->sc_iopool, sc, 1931 (void *(*)(void *))arc_get_ccb, 1932 (void (*)(void *, void *))arc_put_ccb); 1933 1934 return (0); 1935 1936 free_maps: 1937 while ((ccb = arc_get_ccb(sc)) != NULL) 1938 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 1939 arc_dmamem_free(sc, sc->sc_requests); 1940 1941 free_ccbs: 1942 free(sc->sc_ccbs, M_DEVBUF); 1943 1944 return (1); 1945 } 1946 1947 struct arc_ccb * 1948 arc_get_ccb(struct arc_softc *sc) 1949 { 1950 struct arc_ccb *ccb; 1951 1952 mtx_enter(&sc->sc_ccb_mtx); 1953 ccb = SLIST_FIRST(&sc->sc_ccb_free); 1954 if (ccb != NULL) 1955 SLIST_REMOVE_HEAD(&sc->sc_ccb_free, ccb_link); 1956 mtx_leave(&sc->sc_ccb_mtx); 1957 1958 return (ccb); 1959 } 1960 1961 void 1962 arc_put_ccb(struct arc_softc *sc, struct arc_ccb *ccb) 1963 { 1964 ccb->ccb_xs = NULL; 1965 bzero(ccb->ccb_cmd, ARC_MAX_IOCMDLEN); 1966 mtx_enter(&sc->sc_ccb_mtx); 1967 SLIST_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_link); 1968 mtx_leave(&sc->sc_ccb_mtx); 1969 } 1970