1 /* $OpenBSD: agp_amd.c,v 1.10 2009/04/20 01:28:45 oga Exp $ */ 2 /* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 Doug Rabson 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $ 30 */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/proc.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 #include <sys/agpio.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/vga_pcivar.h> 45 #include <dev/pci/agpvar.h> 46 #include <dev/pci/agpreg.h> 47 48 #include <dev/pci/pcidevs.h> 49 50 #define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off) 51 #define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off) 52 #define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v) 53 #define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v) 54 55 struct agp_amd_gatt { 56 bus_dmamap_t ag_dmamap; 57 bus_dma_segment_t ag_dmaseg; 58 int ag_nseg; 59 u_int32_t ag_entries; 60 u_int32_t *ag_vdir; /* virtual address of page dir */ 61 bus_addr_t ag_pdir; /* bus address of page dir */ 62 u_int32_t *ag_virtual; /* virtual address of gatt */ 63 bus_addr_t ag_physical; /* bus address of gatt */ 64 size_t ag_size; 65 }; 66 67 struct agp_amd_softc { 68 struct device dev; 69 struct agp_softc *agpdev; 70 struct agp_amd_gatt *gatt; 71 pci_chipset_tag_t asc_pc; 72 pcitag_t asc_tag; 73 bus_space_handle_t ioh; 74 bus_space_tag_t iot; 75 bus_size_t initial_aperture; 76 }; 77 78 void agp_amd_attach(struct device *, struct device *, void *); 79 int agp_amd_probe(struct device *, void *, void *); 80 bus_size_t agp_amd_get_aperture(void *); 81 struct agp_amd_gatt *agp_amd_alloc_gatt(bus_dma_tag_t, bus_size_t); 82 int agp_amd_set_aperture(void *, bus_size_t); 83 int agp_amd_bind_page(void *, off_t, bus_addr_t); 84 int agp_amd_unbind_page(void *, off_t); 85 void agp_amd_flush_tlb(void *); 86 87 struct cfattach amdagp_ca = { 88 sizeof(struct agp_amd_softc), agp_amd_probe, agp_amd_attach 89 }; 90 91 struct cfdriver amdagp_cd = { 92 NULL, "amdagp", DV_DULL 93 }; 94 95 const struct agp_methods agp_amd_methods = { 96 agp_amd_get_aperture, 97 agp_amd_bind_page, 98 agp_amd_unbind_page, 99 agp_amd_flush_tlb, 100 }; 101 102 103 struct agp_amd_gatt * 104 agp_amd_alloc_gatt(bus_dma_tag_t dmat, bus_size_t apsize) 105 { 106 bus_size_t entries = apsize >> AGP_PAGE_SHIFT; 107 struct agp_amd_gatt *gatt; 108 int i, npages; 109 caddr_t vdir; 110 111 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 112 if (!gatt) 113 return (0); 114 gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t); 115 116 if (agp_alloc_dmamem(dmat, gatt->ag_size, &gatt->ag_dmamap, 117 &gatt->ag_pdir, &gatt->ag_dmaseg) != 0) { 118 printf("failed to allocate GATT\n"); 119 free(gatt, M_AGP); 120 return (NULL); 121 } 122 123 if (bus_dmamem_map(dmat, &gatt->ag_dmaseg, 1, gatt->ag_size, 124 &vdir, BUS_DMA_NOWAIT) != 0) { 125 printf("failed to map GATT\n"); 126 agp_free_dmamem(dmat, gatt->ag_size, gatt->ag_dmamap, 127 &gatt->ag_dmaseg); 128 free(gatt, M_AGP); 129 return (NULL); 130 } 131 132 gatt->ag_vdir = (u_int32_t *)vdir; 133 gatt->ag_entries = entries; 134 gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE); 135 gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE; 136 gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t); 137 138 /* 139 * Map the pages of the GATT into the page directory. 140 */ 141 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 142 >> AGP_PAGE_SHIFT); 143 144 for (i = 0; i < npages; i++) 145 gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1; 146 147 /* 148 * Make sure the chipset can see everything. 149 */ 150 agp_flush_cache(); 151 152 return (gatt); 153 } 154 155 #if 0 156 void 157 agp_amd_free_gatt(bus_dma_tag_t dmat, struct agp_amd_gatt *gatt) 158 { 159 bus_dmamem_unmap(dmat, gatt->ag_virtual, gatt->ag_size); 160 agp_free_dmamem(dmat, gatt->ag_size, 161 gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 162 gatt->ag_nseg); 163 free(gatt, M_AGP); 164 } 165 #endif 166 167 int 168 agp_amd_probe(struct device *parent, void *match, void *aux) 169 { 170 struct agp_attach_args *aa = aux; 171 struct pci_attach_args *pa = aa->aa_pa; 172 173 /* Must be a pchb */ 174 if (agpbus_probe(aa) == 1 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD && 175 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_SC751_SC || 176 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_761_PCHB || 177 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_762_PCHB)) 178 return (1); 179 return (0); 180 } 181 182 void 183 agp_amd_attach(struct device *parent, struct device *self, void *aux) 184 { 185 struct agp_amd_softc *asc = (struct agp_amd_softc *)self; 186 struct agp_attach_args *aa = aux; 187 struct pci_attach_args *pa = aa->aa_pa; 188 struct agp_amd_gatt *gatt; 189 pcireg_t reg; 190 int error; 191 192 asc->asc_pc = pa->pa_pc; 193 asc->asc_tag = pa->pa_tag; 194 195 error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, 196 PCI_MAPREG_TYPE_MEM, 0, &asc->iot, &asc->ioh, NULL, NULL, 0); 197 if (error != 0) { 198 printf("can't map AGP registers\n"); 199 return; 200 } 201 202 asc->initial_aperture = agp_amd_get_aperture(asc); 203 204 for (;;) { 205 bus_size_t size = agp_amd_get_aperture(asc); 206 gatt = agp_amd_alloc_gatt(pa->pa_dmat, size); 207 if (gatt != NULL) 208 break; 209 210 /* 211 * almost certainly error allocating contigious dma memory 212 * so reduce aperture so that the gatt size reduces. 213 */ 214 if (agp_amd_set_aperture(asc, size / 2)) { 215 printf(": failed to set aperture\n"); 216 return; 217 } 218 } 219 asc->gatt = gatt; 220 221 /* Install the gatt. */ 222 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical); 223 224 /* Enable synchronisation between host and agp. */ 225 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL); 226 reg &= ~0x00ff00ff; 227 reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16); 228 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL, reg); 229 /* Enable the TLB and flush */ 230 WRITE2(AGP_AMD751_STATUS, 231 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 232 agp_amd_flush_tlb(asc); 233 234 asc->agpdev = (struct agp_softc *)agp_attach_bus(pa, &agp_amd_methods, 235 AGP_APBASE, PCI_MAPREG_TYPE_MEM, &asc->dev); 236 return; 237 } 238 239 #if 0 240 int 241 agp_amd_detach(void *sc) 242 { 243 struct agp_amd_softc *asc = sc; 244 pcireg_t reg; 245 246 /* Disable the TLB.. */ 247 WRITE2(AGP_AMD751_STATUS, 248 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 249 250 /* Disable host-agp sync */ 251 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL); 252 reg &= 0xffffff00; 253 pci_conf_write(asc->asc_pc, asc->asc_pcitag, AGP_AMD751_MODECTRL, reg); 254 255 /* Clear the GATT base */ 256 WRITE4(AGP_AMD751_ATTBASE, 0); 257 258 /* Put the aperture back the way it started. */ 259 agp_amd_set_aperture(asc, asc->initial_aperture); 260 261 agp_amd_free_gatt(asc, asc->gatt); 262 263 /* XXXfvdl no pci_mapreg_unmap */ 264 265 return (0); 266 } 267 #endif 268 269 bus_size_t 270 agp_amd_get_aperture(void *sc) 271 { 272 struct agp_amd_softc *asc = sc; 273 int vas; 274 275 vas = (pci_conf_read(asc->asc_pc, asc->asc_tag, 276 AGP_AMD751_APCTRL) & 0x06); 277 vas >>= 1; 278 /* 279 * The aperture size is equal to 32M<<vas. 280 */ 281 return ((32 * 1024 * 1024) << vas); 282 } 283 284 int 285 agp_amd_set_aperture(void *sc, bus_size_t aperture) 286 { 287 struct agp_amd_softc *asc = sc; 288 int vas; 289 pcireg_t reg; 290 291 /* 292 * Check for a power of two and make sure its within the 293 * programmable range. 294 */ 295 if (aperture & (aperture - 1) 296 || aperture < 32*1024*1024 297 || aperture > 2U*1024*1024*1024) 298 return (EINVAL); 299 300 vas = ffs(aperture / 32*1024*1024) - 1; 301 302 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL); 303 reg = (reg & ~0x06) | (vas << 1); 304 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL, reg); 305 306 return (0); 307 } 308 309 int 310 agp_amd_bind_page(void *sc, off_t offset, bus_addr_t physical) 311 { 312 struct agp_amd_softc *asc = sc; 313 314 if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT)) 315 return (EINVAL); 316 317 asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 318 return (0); 319 } 320 321 int 322 agp_amd_unbind_page(void *sc, off_t offset) 323 { 324 struct agp_amd_softc *asc = sc; 325 326 if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT)) 327 return (EINVAL); 328 329 asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 330 return (0); 331 } 332 333 void 334 agp_amd_flush_tlb(void *sc) 335 { 336 struct agp_amd_softc *asc = sc; 337 338 /* Set the cache invalidate bit and wait for the chipset to clear */ 339 WRITE4(AGP_AMD751_TLBCTRL, 1); 340 do { 341 DELAY(1); 342 } while (READ4(AGP_AMD751_TLBCTRL)); 343 } 344