1 /* $OpenBSD: agp_amd.c,v 1.9 2008/11/09 15:11:19 oga Exp $ */ 2 /* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 Doug Rabson 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $ 30 */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/proc.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 #include <sys/agpio.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/vga_pcivar.h> 45 #include <dev/pci/agpvar.h> 46 #include <dev/pci/agpreg.h> 47 48 #include <dev/pci/pcidevs.h> 49 50 #define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off) 51 #define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off) 52 #define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v) 53 #define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v) 54 55 struct agp_amd_gatt { 56 bus_dmamap_t ag_dmamap; 57 bus_dma_segment_t ag_dmaseg; 58 int ag_nseg; 59 u_int32_t ag_entries; 60 u_int32_t *ag_vdir; /* virtual address of page dir */ 61 bus_addr_t ag_pdir; /* bus address of page dir */ 62 u_int32_t *ag_virtual; /* virtual address of gatt */ 63 bus_addr_t ag_physical; /* bus address of gatt */ 64 size_t ag_size; 65 }; 66 67 struct agp_amd_softc { 68 struct device dev; 69 struct agp_softc *agpdev; 70 struct agp_amd_gatt *gatt; 71 pci_chipset_tag_t asc_pc; 72 pcitag_t asc_tag; 73 bus_space_handle_t ioh; 74 bus_space_tag_t iot; 75 bus_size_t initial_aperture; 76 }; 77 78 void agp_amd_attach(struct device *, struct device *, void *); 79 int agp_amd_probe(struct device *, void *, void *); 80 bus_size_t agp_amd_get_aperture(void *); 81 struct agp_amd_gatt *agp_amd_alloc_gatt(bus_dma_tag_t, bus_size_t); 82 int agp_amd_set_aperture(void *, bus_size_t); 83 int agp_amd_bind_page(void *, off_t, bus_addr_t); 84 int agp_amd_unbind_page(void *, off_t); 85 void agp_amd_flush_tlb(void *); 86 87 struct cfattach amdagp_ca = { 88 sizeof(struct agp_amd_softc), agp_amd_probe, agp_amd_attach 89 }; 90 91 struct cfdriver amdagp_cd = { 92 NULL, "amdagp", DV_DULL 93 }; 94 95 const struct agp_methods agp_amd_methods = { 96 agp_amd_get_aperture, 97 agp_amd_bind_page, 98 agp_amd_unbind_page, 99 agp_amd_flush_tlb, 100 }; 101 102 103 struct agp_amd_gatt * 104 agp_amd_alloc_gatt(bus_dma_tag_t dmat, bus_size_t apsize) 105 { 106 bus_size_t entries = apsize >> AGP_PAGE_SHIFT; 107 struct agp_amd_gatt *gatt; 108 int i, npages; 109 caddr_t vdir; 110 111 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 112 if (!gatt) 113 return (0); 114 115 if (agp_alloc_dmamem(dmat, 116 AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0, 117 &gatt->ag_dmamap, &vdir, &gatt->ag_pdir, 118 &gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) { 119 printf("failed to allocate GATT\n"); 120 free(gatt, M_AGP); 121 return (NULL); 122 } 123 124 gatt->ag_vdir = (u_int32_t *)vdir; 125 gatt->ag_entries = entries; 126 gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE); 127 gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE; 128 gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t); 129 130 memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE); 131 memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t)); 132 133 /* 134 * Map the pages of the GATT into the page directory. 135 */ 136 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 137 >> AGP_PAGE_SHIFT); 138 139 for (i = 0; i < npages; i++) 140 gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1; 141 142 /* 143 * Make sure the chipset can see everything. 144 */ 145 agp_flush_cache(); 146 147 return (gatt); 148 } 149 150 #if 0 151 void 152 agp_amd_free_gatt(bus_dma_tag_t dmat, struct agp_amd_gatt *gatt) 153 { 154 agp_free_dmamem(dmat, gatt->ag_size, 155 gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 156 gatt->ag_nseg); 157 free(gatt, M_AGP); 158 } 159 #endif 160 161 int 162 agp_amd_probe(struct device *parent, void *match, void *aux) 163 { 164 struct agp_attach_args *aa = aux; 165 struct pci_attach_args *pa = aa->aa_pa; 166 167 /* Must be a pchb */ 168 if (agpbus_probe(aa) == 1 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD && 169 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_SC751_SC || 170 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_761_PCHB || 171 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_762_PCHB)) 172 return (1); 173 return (0); 174 } 175 176 void 177 agp_amd_attach(struct device *parent, struct device *self, void *aux) 178 { 179 struct agp_amd_softc *asc = (struct agp_amd_softc *)self; 180 struct agp_attach_args *aa = aux; 181 struct pci_attach_args *pa = aa->aa_pa; 182 struct agp_amd_gatt *gatt; 183 pcireg_t reg; 184 int error; 185 186 asc->asc_pc = pa->pa_pc; 187 asc->asc_tag = pa->pa_tag; 188 189 error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, 190 PCI_MAPREG_TYPE_MEM, 0, &asc->iot, &asc->ioh, NULL, NULL, 0); 191 if (error != 0) { 192 printf("can't map AGP registers\n"); 193 return; 194 } 195 196 asc->initial_aperture = agp_amd_get_aperture(asc); 197 198 for (;;) { 199 bus_size_t size = agp_amd_get_aperture(asc); 200 gatt = agp_amd_alloc_gatt(pa->pa_dmat, size); 201 if (gatt != NULL) 202 break; 203 204 /* 205 * almost certainly error allocating contigious dma memory 206 * so reduce aperture so that the gatt size reduces. 207 */ 208 if (agp_amd_set_aperture(asc, size / 2)) { 209 printf(": failed to set aperture\n"); 210 return; 211 } 212 } 213 asc->gatt = gatt; 214 215 /* Install the gatt. */ 216 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical); 217 218 /* Enable synchronisation between host and agp. */ 219 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL); 220 reg &= ~0x00ff00ff; 221 reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16); 222 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL, reg); 223 /* Enable the TLB and flush */ 224 WRITE2(AGP_AMD751_STATUS, 225 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 226 agp_amd_flush_tlb(asc); 227 228 asc->agpdev = (struct agp_softc *)agp_attach_bus(pa, &agp_amd_methods, 229 AGP_APBASE, PCI_MAPREG_TYPE_MEM, &asc->dev); 230 return; 231 } 232 233 #if 0 234 int 235 agp_amd_detach(void *sc) 236 { 237 struct agp_amd_softc *asc = sc; 238 pcireg_t reg; 239 240 /* Disable the TLB.. */ 241 WRITE2(AGP_AMD751_STATUS, 242 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 243 244 /* Disable host-agp sync */ 245 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL); 246 reg &= 0xffffff00; 247 pci_conf_write(asc->asc_pc, asc->asc_pcitag, AGP_AMD751_MODECTRL, reg); 248 249 /* Clear the GATT base */ 250 WRITE4(AGP_AMD751_ATTBASE, 0); 251 252 /* Put the aperture back the way it started. */ 253 agp_amd_set_aperture(asc, asc->initial_aperture); 254 255 agp_amd_free_gatt(asc, asc->gatt); 256 257 /* XXXfvdl no pci_mapreg_unmap */ 258 259 return (0); 260 } 261 #endif 262 263 bus_size_t 264 agp_amd_get_aperture(void *sc) 265 { 266 struct agp_amd_softc *asc = sc; 267 int vas; 268 269 vas = (pci_conf_read(asc->asc_pc, asc->asc_tag, 270 AGP_AMD751_APCTRL) & 0x06); 271 vas >>= 1; 272 /* 273 * The aperture size is equal to 32M<<vas. 274 */ 275 return ((32 * 1024 * 1024) << vas); 276 } 277 278 int 279 agp_amd_set_aperture(void *sc, bus_size_t aperture) 280 { 281 struct agp_amd_softc *asc = sc; 282 int vas; 283 pcireg_t reg; 284 285 /* 286 * Check for a power of two and make sure its within the 287 * programmable range. 288 */ 289 if (aperture & (aperture - 1) 290 || aperture < 32*1024*1024 291 || aperture > 2U*1024*1024*1024) 292 return (EINVAL); 293 294 vas = ffs(aperture / 32*1024*1024) - 1; 295 296 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL); 297 reg = (reg & ~0x06) | (vas << 1); 298 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL, reg); 299 300 return (0); 301 } 302 303 int 304 agp_amd_bind_page(void *sc, off_t offset, bus_addr_t physical) 305 { 306 struct agp_amd_softc *asc = sc; 307 308 if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT)) 309 return (EINVAL); 310 311 asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 312 return (0); 313 } 314 315 int 316 agp_amd_unbind_page(void *sc, off_t offset) 317 { 318 struct agp_amd_softc *asc = sc; 319 320 if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT)) 321 return (EINVAL); 322 323 asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 324 return (0); 325 } 326 327 void 328 agp_amd_flush_tlb(void *sc) 329 { 330 struct agp_amd_softc *asc = sc; 331 332 /* Set the cache invalidate bit and wait for the chipset to clear */ 333 WRITE4(AGP_AMD751_TLBCTRL, 1); 334 do { 335 DELAY(1); 336 } while (READ4(AGP_AMD751_TLBCTRL)); 337 } 338