xref: /openbsd-src/sys/dev/mii/nsgphy.c (revision d13be5d47e4149db2549a9828e244d59dbc43f15)
1 /*	$OpenBSD: nsgphy.c,v 1.22 2009/07/22 10:39:51 sthen Exp $	*/
2 /*
3  * Copyright (c) 2001 Wind River Systems
4  * Copyright (c) 2001
5  *	Bill Paul <wpaul@bsdi.com>.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Bill Paul.
18  * 4. Neither the name of the author nor the names of any co-contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32  * THE POSSIBILITY OF SUCH DAMAGE.
33  *
34  */
35 
36 /*
37  * Driver for the National Semiconductor DP83861, DP83865 and DP83891
38  * 10/100/1000 PHYs.
39  * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
40  * and at: http://www.national.com/ds/DP/DP83865.pdf
41  *
42  * The DP83891 is the older NatSemi gigE PHY which isn't being sold
43  * anymore. The DP83861 is its replacement, which is an 'enhanced'
44  * firmware driven component. The major difference between the
45  * two is that the 83891 can't generate interrupts, while the
46  * 83861 can. (I think it wasn't originally designed to do this, but
47  * it can now thanks to firmware updates.) The 83861 also allows
48  * access to its internal RAM via indirect register access.
49  *
50  * The DP83865 is a low power version of the DP83861.
51  */
52 
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/kernel.h>
56 #include <sys/device.h>
57 #include <sys/socket.h>
58 
59 #include <net/if.h>
60 #include <net/if_media.h>
61 
62 #include <dev/mii/mii.h>
63 #include <dev/mii/miivar.h>
64 #include <dev/mii/miidevs.h>
65 
66 #include <dev/mii/nsgphyreg.h>
67 
68 int	nsgphymatch(struct device*, void *, void *);
69 void	nsgphyattach(struct device *, struct device *, void *);
70 
71 struct cfattach nsgphy_ca = {
72 	sizeof(struct mii_softc), nsgphymatch, nsgphyattach, mii_phy_detach,
73 	mii_phy_activate
74 };
75 
76 struct cfdriver nsgphy_cd = {
77 	NULL, "nsgphy", DV_DULL
78 };
79 
80 int	nsgphy_service(struct mii_softc *, struct mii_data *, int);
81 void	nsgphy_status(struct mii_softc *);
82 
83 const struct mii_phy_funcs nsgphy_funcs = {
84 	nsgphy_service, nsgphy_status, mii_phy_reset,
85 };
86 
87 static const struct mii_phydesc nsgphys[] = {
88 	{ MII_OUI_NATSEMI,		MII_MODEL_NATSEMI_DP83861,
89 	  MII_STR_NATSEMI_DP83861 },
90 	{ MII_OUI_NATSEMI,		MII_MODEL_NATSEMI_DP83865,
91 	  MII_STR_NATSEMI_DP83865 },
92 	{ MII_OUI_NATSEMI,		MII_MODEL_NATSEMI_DP83891,
93 	  MII_STR_NATSEMI_DP83891 },
94 
95 	{ 0,			0,
96 	  NULL },
97 };
98 
99 int
100 nsgphymatch(struct device *parent, void *match, void *aux)
101 {
102 	struct mii_attach_args *ma = aux;
103 
104 	if (mii_phy_match(ma, nsgphys) != NULL)
105 		return (10);
106 
107 	return (0);
108 }
109 
110 void
111 nsgphyattach(struct device *parent, struct device *self, void *aux)
112 {
113 	struct mii_softc *sc = (struct mii_softc *)self;
114 	struct mii_attach_args *ma = aux;
115 	struct mii_data *mii = ma->mii_data;
116 	const struct mii_phydesc *mpd;
117 	int anar;
118 
119 	mpd = mii_phy_match(ma, nsgphys);
120 	printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
121 
122 	sc->mii_inst = mii->mii_instance;
123 	sc->mii_phy = ma->mii_phyno;
124 	sc->mii_funcs = &nsgphy_funcs;
125 	sc->mii_pdata = mii;
126 	sc->mii_flags = ma->mii_flags;
127 	sc->mii_anegticks = MII_ANEGTICKS;
128 
129 	PHY_RESET(sc);
130 
131 	sc->mii_capabilities =
132 		PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
133 	if (sc->mii_capabilities & BMSR_EXTSTAT)
134 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
135 
136 	/*
137 	 * The PHY seems to have the 10baseT BMSR bits
138 	 * hard-wired to 0, even though the device supports
139 	 * 10baseT.  What we do instead is read the post-reset
140 	 * ANAR, who's 10baseT-related bits are set by strapping
141 	 * pin 180, and fake the BMSR bits.
142 	 */
143 	anar = PHY_READ(sc, MII_ANAR);
144 	if (anar & ANAR_10)
145 		sc->mii_capabilities |= (BMSR_10THDX & ma->mii_capmask);
146 	if (anar & ANAR_10_FD)
147 		sc->mii_capabilities |= (BMSR_10TFDX & ma->mii_capmask);
148 
149 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
150 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK))
151 		mii_phy_add_media(sc);
152 }
153 
154 int
155 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
156 {
157 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
158 	int reg;
159 
160 	if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
161 		return (ENXIO);
162 
163 	switch (cmd) {
164 	case MII_POLLSTAT:
165 		/*
166 		 * If we're not polling our PHY instance, just return.
167 		 */
168 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
169 			return (0);
170 		break;
171 
172 	case MII_MEDIACHG:
173 		/*
174 		 * If the media indicates a different PHY instance,
175 		 * isolate ourselves.
176 		 */
177 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
178 			reg = PHY_READ(sc, MII_BMCR);
179 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
180 			return (0);
181 		}
182 
183 		/*
184 		 * If the interface is not up, don't do anything.
185 		 */
186 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
187 			break;
188 
189 		mii_phy_setmedia(sc);
190 		break;
191 
192 	case MII_TICK:
193 		/*
194 		 * If we're not currently selected, just return.
195 		 */
196 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
197 			return (0);
198 
199 		if (mii_phy_tick(sc) == EJUSTRETURN)
200 			return (0);
201 		break;
202 	case MII_DOWN:
203 		mii_phy_down(sc);
204 		return (0);
205 	}
206 
207 	/* Update the media status. */
208 	mii_phy_status(sc);
209 
210 	/* Callback if something changed. */
211 	mii_phy_update(sc, cmd);
212 	return (0);
213 }
214 
215 void
216 nsgphy_status(struct mii_softc *sc)
217 {
218 	struct mii_data *mii = sc->mii_pdata;
219 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
220 	int bmsr, bmcr, physup, gtsr;
221 
222 	mii->mii_media_status = IFM_AVALID;
223 	mii->mii_media_active = IFM_ETHER;
224 
225 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
226 
227 	physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
228 
229 	if (physup & PHY_SUP_LINK)
230 		mii->mii_media_status |= IFM_ACTIVE;
231 
232 	bmcr = PHY_READ(sc, MII_BMCR);
233 	if (bmcr & BMCR_ISO) {
234 		mii->mii_media_active |= IFM_NONE;
235 		mii->mii_media_status = 0;
236 		return;
237 	}
238 
239 	if (bmcr & BMCR_LOOP)
240 		mii->mii_media_active |= IFM_LOOP;
241 
242 	if (bmcr & BMCR_AUTOEN) {
243 		if ((bmsr & BMSR_ACOMP) == 0) {
244 			/* Erg, still trying, I guess... */
245 			mii->mii_media_active |= IFM_NONE;
246 			return;
247 		}
248 
249 		switch (physup & (PHY_SUP_SPEED1|PHY_SUP_SPEED0)) {
250 		case PHY_SUP_SPEED1:
251 			mii->mii_media_active |= IFM_1000_T;
252 			gtsr = PHY_READ(sc, MII_100T2SR);
253 			if (gtsr & GTSR_MS_RES)
254 				mii->mii_media_active |= IFM_ETH_MASTER;
255 			break;
256 
257 		case PHY_SUP_SPEED0:
258 			mii->mii_media_active |= IFM_100_TX;
259 			break;
260 
261 		case 0:
262 			mii->mii_media_active |= IFM_10_T;
263 			break;
264 
265 		default:
266 			mii->mii_media_active |= IFM_NONE;
267 			mii->mii_media_status = 0;
268 			return;
269 		}
270 
271 		if (physup & PHY_SUP_DUPLEX)
272 			mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX;
273 		else
274 			mii->mii_media_active |= IFM_HDX;
275 	} else
276 		mii->mii_media_active = ife->ifm_media;
277 }
278