1 /* $OpenBSD: dcphy.c,v 1.23 2008/09/11 17:20:18 brad Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.6 2000/10/05 17:36:14 wpaul Exp $ 35 */ 36 37 /* 38 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 39 * controllers. Technically we're abusing the miibus code to handle 40 * media selection and NWAY support here since there is no MII 41 * interface. However the logical operations are roughly the same, 42 * and the alternative is to create a fake MII interface in the driver, 43 * which is harder to do. 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/device.h> 50 #include <sys/socket.h> 51 #include <sys/errno.h> 52 53 #include <machine/bus.h> 54 55 #include <net/if.h> 56 #include <net/if_media.h> 57 58 #include <netinet/in.h> 59 #include <netinet/if_ether.h> 60 61 #include <dev/mii/mii.h> 62 #include <dev/mii/miivar.h> 63 #include <dev/mii/miidevs.h> 64 65 #include <dev/ic/dcreg.h> 66 67 #define DC_SETBIT(sc, reg, x) \ 68 CSR_WRITE_4(sc, reg, \ 69 CSR_READ_4(sc, reg) | x) 70 71 #define DC_CLRBIT(sc, reg, x) \ 72 CSR_WRITE_4(sc, reg, \ 73 CSR_READ_4(sc, reg) & ~x) 74 75 #define MIIF_AUTOTIMEOUT 0x0004 76 77 /* 78 * This is the subsystem ID for the built-in 21143 ethernet 79 * in several Compaq Presario systems. Apparently these are 80 * 10Mbps only, so we need to treat them specially. 81 */ 82 #define COMPAQ_PRESARIO_ID 0xb0bb0e11 83 84 int dcphy_match(struct device *, void *, void *); 85 void dcphy_attach(struct device *, struct device *, void *); 86 87 struct cfattach dcphy_ca = { 88 sizeof(struct mii_softc), dcphy_match, dcphy_attach, mii_phy_detach, 89 mii_phy_activate 90 }; 91 92 struct cfdriver dcphy_cd = { 93 NULL, "dcphy", DV_DULL 94 }; 95 96 int dcphy_service(struct mii_softc *, struct mii_data *, int); 97 void dcphy_status(struct mii_softc *); 98 int dcphy_mii_phy_auto(struct mii_softc *, int); 99 void dcphy_reset(struct mii_softc *); 100 101 const struct mii_phy_funcs dcphy_funcs = { 102 dcphy_service, dcphy_status, dcphy_reset, 103 }; 104 105 int 106 dcphy_match(struct device *parent, void *match, void *aux) 107 { 108 struct mii_attach_args *ma = aux; 109 110 /* 111 * The dc driver will report the 21143 vendor and device 112 * ID to let us know that it wants us to attach. 113 */ 114 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxDEC && 115 MII_MODEL(ma->mii_id2) == MII_MODEL_xxDEC_xxDC) 116 return (10); 117 118 return (0); 119 } 120 121 void 122 dcphy_attach(struct device *parent, struct device *self, void *aux) 123 { 124 struct mii_softc *sc = (struct mii_softc *)self; 125 struct mii_attach_args *ma = aux; 126 struct mii_data *mii = ma->mii_data; 127 struct dc_softc *dc_sc; 128 129 printf(": internal PHY\n"); 130 sc->mii_inst = mii->mii_instance; 131 sc->mii_phy = ma->mii_phyno; 132 sc->mii_funcs = &dcphy_funcs; 133 sc->mii_pdata = mii; 134 sc->mii_flags = ma->mii_flags; 135 sc->mii_anegticks = 50; 136 137 sc->mii_flags |= MIIF_NOISOLATE; 138 139 dc_sc = mii->mii_ifp->if_softc; 140 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 141 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 142 143 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 144 145 switch(dc_sc->dc_csid) { 146 case COMPAQ_PRESARIO_ID: 147 /* Example of how to only allow 10Mbps modes. */ 148 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 149 break; 150 default: 151 if (dc_sc->dc_pmode == DC_PMODE_SIA) { 152 sc->mii_capabilities = 153 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 154 } else { 155 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 156 sc->mii_inst), BMCR_LOOP|BMCR_S100); 157 158 sc->mii_capabilities = 159 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 160 BMSR_10TFDX|BMSR_10THDX; 161 } 162 break; 163 } 164 165 if (dc_sc->dc_type == DC_TYPE_21145) 166 sc->mii_capabilities = BMSR_10THDX; 167 168 sc->mii_capabilities &= ma->mii_capmask; 169 if (sc->mii_capabilities & BMSR_MEDIAMASK) 170 mii_phy_add_media(sc); 171 #undef ADD 172 } 173 174 int 175 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 176 { 177 struct dc_softc *dc_sc; 178 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 179 int reg; 180 u_int32_t mode; 181 182 if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0) 183 return (ENXIO); 184 185 dc_sc = mii->mii_ifp->if_softc; 186 187 switch (cmd) { 188 case MII_POLLSTAT: 189 /* 190 * If we're not polling our PHY instance, just return. 191 */ 192 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 193 return (0); 194 break; 195 196 case MII_MEDIACHG: 197 /* 198 * If the media indicates a different PHY instance, 199 * isolate ourselves. 200 */ 201 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 202 return (0); 203 204 /* 205 * If the interface is not up, don't do anything. 206 */ 207 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 208 break; 209 210 sc->mii_flags = 0; 211 mii->mii_media_active = IFM_NONE; 212 mode = CSR_READ_4(dc_sc, DC_NETCFG); 213 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 214 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 215 216 switch (IFM_SUBTYPE(ife->ifm_media)) { 217 case IFM_AUTO: 218 /*PHY_RESET(sc);*/ 219 sc->mii_flags &= ~MIIF_DOINGAUTO; 220 (void) dcphy_mii_phy_auto(sc, 0); 221 break; 222 case IFM_100_TX: 223 PHY_RESET(sc); 224 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 225 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 226 DC_NETCFG_SCRAMBLER; 227 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 228 mode |= DC_NETCFG_FULLDUPLEX; 229 else 230 mode &= ~DC_NETCFG_FULLDUPLEX; 231 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 232 break; 233 case IFM_10_T: 234 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 235 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 236 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 237 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 238 else 239 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 240 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 241 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 242 mode &= ~DC_NETCFG_PORTSEL; 243 mode |= DC_NETCFG_SPEEDSEL; 244 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 245 mode |= DC_NETCFG_FULLDUPLEX; 246 else 247 mode &= ~DC_NETCFG_FULLDUPLEX; 248 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 249 break; 250 default: 251 return (EINVAL); 252 } 253 break; 254 255 case MII_TICK: 256 /* 257 * If we're not currently selected, just return. 258 */ 259 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 260 return (0); 261 262 /* 263 * Is the interface even up? 264 */ 265 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 266 return (0); 267 268 /* 269 * Only used for autonegotiation. 270 */ 271 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 272 break; 273 274 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 275 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 276 break; 277 278 /* 279 * Only retry autonegotiation every mii_anegticks seconds. 280 * 281 * Otherwise, fall through to calling dcphy_status() 282 * since real Intel 21143 chips don't show valid link 283 * status until autonegotiation is switched off, and 284 * that only happens in dcphy_status(). Without this, 285 * successful autonegotiation is never recognised on 286 * these chips. 287 */ 288 if (++sc->mii_ticks <= sc->mii_anegticks) 289 break; 290 291 sc->mii_ticks = 0; 292 sc->mii_flags &= ~MIIF_DOINGAUTO; 293 dcphy_mii_phy_auto(sc, 0); 294 295 break; 296 } 297 298 /* Update the media status. */ 299 mii_phy_status(sc); 300 301 /* Callback if something changed. */ 302 mii_phy_update(sc, cmd); 303 return (0); 304 } 305 306 void 307 dcphy_status(struct mii_softc *sc) 308 { 309 struct mii_data *mii = sc->mii_pdata; 310 int reg, anlpar, tstat = 0; 311 struct dc_softc *dc_sc; 312 313 dc_sc = mii->mii_ifp->if_softc; 314 315 mii->mii_media_status = IFM_AVALID; 316 mii->mii_media_active = IFM_ETHER; 317 318 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 319 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 320 mii->mii_media_status |= IFM_ACTIVE; 321 322 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { 323 /* Erg, still trying, I guess... */ 324 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); 325 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { 326 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && 327 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) 328 goto skip; 329 mii->mii_media_active |= IFM_NONE; 330 return; 331 } 332 333 if (tstat & DC_TSTAT_LP_CAN_NWAY) { 334 anlpar = tstat >> 16; 335 if (anlpar & ANLPAR_TX_FD && 336 sc->mii_capabilities & BMSR_100TXFDX) 337 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 338 else if (anlpar & ANLPAR_T4 && 339 sc->mii_capabilities & BMSR_100T4) 340 mii->mii_media_active |= IFM_100_T4|IFM_HDX; 341 else if (anlpar & ANLPAR_TX && 342 sc->mii_capabilities & BMSR_100TXHDX) 343 mii->mii_media_active |= IFM_100_TX|IFM_HDX; 344 else if (anlpar & ANLPAR_10_FD) 345 mii->mii_media_active |= IFM_10_T|IFM_FDX; 346 else if (anlpar & ANLPAR_10) 347 mii->mii_media_active |= IFM_10_T|IFM_HDX; 348 else 349 mii->mii_media_active |= IFM_NONE; 350 if (DC_IS_INTEL(dc_sc)) 351 DC_CLRBIT(dc_sc, DC_10BTCTRL, 352 DC_TCTL_AUTONEGENBL); 353 return; 354 } 355 356 /* 357 * If the other side doesn't support NWAY, then the 358 * best we can do is determine if we have a 10Mbps or 359 * 100Mbps link. There's no way to know if the link 360 * is full or half duplex, so we default to half duplex 361 * and hope that the user is clever enough to manually 362 * change the media settings if we're wrong. 363 */ 364 if (!(reg & DC_TSTAT_LS100)) 365 mii->mii_media_active |= IFM_100_TX|IFM_HDX; 366 else if (!(reg & DC_TSTAT_LS10)) 367 mii->mii_media_active |= IFM_10_T|IFM_HDX; 368 else 369 mii->mii_media_active |= IFM_NONE; 370 if (DC_IS_INTEL(dc_sc)) 371 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 372 return; 373 } 374 375 skip: 376 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) 377 mii->mii_media_active |= IFM_10_T; 378 else 379 mii->mii_media_active |= IFM_100_TX; 380 381 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 382 mii->mii_media_active |= IFM_FDX; 383 else 384 mii->mii_media_active |= IFM_HDX; 385 } 386 387 int 388 dcphy_mii_phy_auto(struct mii_softc *mii, int waitfor) 389 { 390 int i; 391 struct dc_softc *sc; 392 393 sc = mii->mii_pdata->mii_ifp->if_softc; 394 395 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 396 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 397 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 398 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 399 if (mii->mii_capabilities & BMSR_100TXHDX) 400 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 401 else 402 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); 403 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 404 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 405 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 406 } 407 408 if (waitfor) { 409 /* Wait 500ms for it to complete. */ 410 for (i = 0; i < 500; i++) { 411 if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) 412 == DC_ASTAT_AUTONEGCMP) 413 return (0); 414 DELAY(1000); 415 } 416 /* 417 * Don't need to worry about clearing MIIF_DOINGAUTO. 418 * If that's set, a timeout is pending, and it will 419 * clear the flag. 420 */ 421 return (EIO); 422 } 423 424 /* 425 * Just let it finish asynchronously. This is for the benefit of 426 * the tick handler driving autonegotiation. Don't want 500ms 427 * delays all the time while the system is running! 428 */ 429 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) 430 mii->mii_flags |= MIIF_DOINGAUTO; 431 432 return (EJUSTRETURN); 433 } 434 435 void 436 dcphy_reset(struct mii_softc *mii) 437 { 438 struct dc_softc *sc; 439 440 sc = mii->mii_pdata->mii_ifp->if_softc; 441 442 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 443 DELAY(1000); 444 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 445 446 return; 447 } 448