xref: /openbsd-src/sys/dev/isa/isavar.h (revision b2ea75c1b17e1a9a339660e7ed45cd24946b230e)
1 /*	$OpenBSD: isavar.h,v 1.42 2001/07/06 00:23:09 smurph Exp $	*/
2 /*	$NetBSD: isavar.h,v 1.26 1997/06/06 23:43:57 thorpej Exp $	*/
3 
4 /*-
5  * Copyright (c) 1997 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. All advertising materials mentioning features or use of this software
21  *    must display the following acknowledgement:
22  *	This product includes software developed by the NetBSD
23  *	Foundation, Inc. and its contributors.
24  * 4. Neither the name of The NetBSD Foundation nor the names of its
25  *    contributors may be used to endorse or promote products derived
26  *    from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 /*
42  * Copyright (c) 1996 Christos Zoulas.  All rights reserved.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Christos Zoulas.
55  * 4. The name of the author may not be used to endorse or promote products
56  *    derived from this software without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
63  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
67  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68  */
69 
70 /*
71  * Copyright (c) 1995 Chris G. Demetriou
72  * Copyright (c) 1992 Berkeley Software Design, Inc.
73  * All rights reserved.
74  *
75  * Redistribution and use in source and binary forms, with or without
76  * modification, are permitted provided that the following conditions
77  * are met:
78  * 1. Redistributions of source code must retain the above copyright
79  *    notice, this list of conditions and the following disclaimer.
80  * 2. Redistributions in binary form must reproduce the above copyright
81  *    notice, this list of conditions and the following disclaimer in the
82  *    documentation and/or other materials provided with the distribution.
83  * 3. All advertising materials mentioning features or use of this software
84  *    must display the following acknowledgement:
85  *	This product includes software developed by Berkeley Software
86  *	Design, Inc.
87  * 4. The name of Berkeley Software Design must not be used to endorse
88  *    or promote products derived from this software without specific
89  *    prior written permission.
90  *
91  * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN, INC. ``AS IS'' AND
92  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
93  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
94  * ARE DISCLAIMED.  IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN, INC. BE LIABLE
95  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
96  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
97  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
98  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
99  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
100  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
101  * SUCH DAMAGE.
102  *
103  *	BSDI Id: isavar.h,v 1.5 1992/12/01 18:06:00 karels Exp
104  */
105 
106 #ifndef _DEV_ISA_ISAVAR_H_
107 #define	_DEV_ISA_ISAVAR_H_
108 
109 /*
110  * Definitions for ISA and ISA PnP autoconfiguration.
111  */
112 
113 #include <sys/queue.h>
114 #include <machine/bus.h>
115 
116 #ifndef NISADMA
117 #include "isadma.h"
118 #endif
119 
120 /*
121  * Structures and definitions needed by the machine-dependent header.
122  */
123 struct isabus_attach_args;
124 
125 #if (__alpha__ + amiga + __i386__ + arc + __wgrisc__ + __powerpc__ + __hppa__ != 1)
126 #error "COMPILING ISA FOR UNSUPPORTED MACHINE, OR MORE THAN ONE."
127 #endif
128 #ifdef __alpha__
129 #include <alpha/isa/isa_machdep.h>
130 #endif
131 #ifdef amiga
132 #include <amiga/isa/isa_machdep.h>
133 #endif
134 #ifdef __i386__
135 #include <i386/isa/isa_machdep.h>
136 #endif
137 #ifdef arc
138 #include <arc/isa/isa_machdep.h>
139 #endif
140 #ifdef __wgrisc__
141 #include <wgrisc/isa/isa_machdep.h>
142 #endif
143 #ifdef __powerpc__
144 #ifdef __mvmeppc__
145 #include <mvmeppc/isa/isa_machdep.h>
146 #else
147 #include <powerpc/isa/isa_machdep.h>
148 #endif
149 #endif
150 #ifdef __hppa__
151 #include <hppa/isa/isa_machdep.h>
152 #endif
153 
154 #include "isapnp.h"
155 
156 #if NISAPNP > 0
157 /*
158  * Structures and definitions needed by the machine-dependent header.
159  */
160 struct isapnp_softc;
161 
162 #if (__i386__ != 1 && __alpha__ != 1)
163 ERROR: COMPILING ISAPNP FOR UNSUPPORTED MACHINE, OR MORE THAN ONE.
164 #endif
165 #if __i386__
166 #include <i386/isa/isapnp_machdep.h>
167 #endif
168 #if __alpha__
169 #include <alpha/isa/isapnp_machdep.h>
170 #endif
171 #endif	/* NISAPNP */
172 
173 # define ISAPNP_WRITE_ADDR(sc, v) \
174     bus_space_write_1(sc->sc_iot, sc->sc_addr_ioh, 0, v)
175 # define ISAPNP_WRITE_DATA(sc, v) \
176     bus_space_write_1(sc->sc_iot, sc->sc_wrdata_ioh, 0, v)
177 # define ISAPNP_READ_DATA(sc) \
178     bus_space_read_1(sc->sc_iot, sc->sc_read_ioh, 0)
179 
180 # define ISAPNP_MALLOC(a) malloc(a, M_DEVBUF, M_WAITOK)
181 # define ISAPNP_FREE(a) free(a, M_DEVBUF)
182 
183 #ifndef _DEV_ISA_ISAPNPREG_H_
184 /*
185  * `reg' defines needed only for these structures.
186  */
187 #define ISAPNP_MAX_CARDS 	8
188 #define ISAPNP_MAX_IDENT	32
189 #define ISAPNP_MAX_DEVCLASS	16
190 #define ISAPNP_SERIAL_SIZE	9
191 
192 #define ISAPNP_NUM_MEM		4
193 #define ISAPNP_NUM_IO		8
194 #define ISAPNP_NUM_IRQ		16
195 #define ISAPNP_NUM_DRQ		8
196 #define ISAPNP_NUM_MEM32	4
197 #endif	/* _DEV_ISA_ISAPNPREG_H_ */
198 
199 /*
200  * ISA PnP-specific structures.
201  */
202 struct isapnp_softc {
203 	struct device		sc_dev;
204 	TAILQ_HEAD(, isadev)
205 		sc_subdevs;		/* list of all children */
206 
207 	bus_space_tag_t sc_iot;		/* isa io space tag */
208 	bus_space_tag_t sc_memt;	/* isa mem space tag */
209 #if NISADMA > 0
210 	bus_dma_tag_t sc_dmat;		/* isa DMA tag */
211 #endif /* NISADMA > 0 */
212 
213 	int			sc_read_port;
214 	bus_space_handle_t	sc_addr_ioh;
215 	bus_space_handle_t	sc_wrdata_ioh;
216 	bus_space_handle_t	sc_read_ioh;
217 	bus_space_handle_t	sc_memh;
218 	u_int8_t		sc_ncards;
219     	u_int8_t		sc_id[ISAPNP_MAX_CARDS][ISAPNP_SERIAL_SIZE];
220 };
221 
222 struct isapnp_region {
223 	bus_space_handle_t h;
224 	u_int32_t base;
225 
226 	u_int32_t minbase;
227 	u_int32_t maxbase;
228 	u_int32_t length;
229 	u_int32_t align;
230 	u_int8_t  flags;
231 };
232 
233 struct isapnp_pin {
234 	int16_t	  num;
235 	u_int8_t  flags:4;
236 	u_int8_t  type:4;
237 	u_int16_t bits;
238 };
239 
240 struct isapnp_knowndev {
241 	const char pnpid[8];
242 	const char driver[5];
243 };
244 
245 /*
246  * ISA bus attach arguments
247  */
248 struct isabus_attach_args {
249 	char	*iba_busname;		/* XXX should be common */
250 	bus_space_tag_t iba_iot;	/* isa i/o space tag */
251 	bus_space_tag_t iba_memt;	/* isa mem space tag */
252 #if NISADMA > 0
253 	bus_dma_tag_t iba_dmat;		/* isa DMA tag */
254 #endif
255 	isa_chipset_tag_t iba_ic;
256 };
257 
258 /*
259  * ISA/ISA PnP shared driver attach arguments
260  */
261 struct isa_attach_args {
262 	struct device  *ia_isa;		/* isa device */
263 	bus_space_tag_t ia_iot;		/* isa i/o space tag */
264 	bus_space_tag_t ia_memt;	/* isa mem space tag */
265 #if NISADMA > 0
266 	bus_dma_tag_t ia_dmat;		/* DMA tag */
267 #endif
268 	bus_space_handle_t ia_delaybah;	/* i/o handle for `delay port' */
269 
270 	isa_chipset_tag_t ia_ic;
271 
272 	/*
273 	 * ISA PnP configuration support.  `ipa_' prefixes are used to denote
274 	 * PnP specific members of this structure.
275 	 */
276 	struct isa_attach_args	*ipa_sibling;
277 	struct isa_attach_args	*ipa_child;
278 
279 	char	ipa_devident[ISAPNP_MAX_IDENT];
280 	char	ipa_devlogic[ISAPNP_MAX_DEVCLASS];
281 	char	ipa_devcompat[ISAPNP_MAX_DEVCLASS];
282 	char	ipa_devclass[ISAPNP_MAX_DEVCLASS];
283 
284 	u_char	ipa_pref;
285 	u_char	ipa_devnum;
286 
287 	u_char	ipa_nio;
288 	u_char	ipa_nirq;
289 	u_char	ipa_ndrq;
290 	u_char	ipa_nmem;
291 	u_char	ipa_nmem32;
292 
293 	struct isapnp_region	ipa_io[ISAPNP_NUM_IO];
294 	struct isapnp_region	ipa_mem[ISAPNP_NUM_MEM];
295 	struct isapnp_region	ipa_mem32[ISAPNP_NUM_MEM32];
296 	struct isapnp_pin	ipa_irq[ISAPNP_NUM_IRQ];
297 	struct isapnp_pin	ipa_drq[ISAPNP_NUM_DRQ];
298 
299 	/*
300 	 * Compatibility defines for ISA drivers.
301 	 */
302 #define ia_iobase	ipa_io[0].base
303 #define ia_iosize	ipa_io[0].length
304 #define ia_ioh		ipa_io[0].h
305 #define ia_irq		ipa_irq[0].num
306 #define	ia_drq		ipa_drq[0].num
307 #define	ia_drq2		ipa_drq[1].num
308 #define ia_maddr	ipa_mem[0].base
309 #define ia_msize	ipa_mem[0].length
310 #define ia_memh		ipa_mem[0].h
311 
312 	void	*ia_aux;		/* driver specific */
313 };
314 
315 #define	IOBASEUNK	-1		/* i/o address is unknown */
316 #define	IRQUNK		-1		/* interrupt request line is unknown */
317 #define	DRQUNK		-1		/* DMA request line is unknown */
318 #define	MADDRUNK	-1		/* shared memory address is unknown */
319 
320 /*
321  * Per-device ISA variables
322  */
323 struct isadev {
324 	struct  device *id_dev;		/* back pointer to generic */
325 	TAILQ_ENTRY(isadev)
326 		id_bchain;		/* bus chain */
327 };
328 
329 /*
330  * ISA master bus
331  */
332 struct isa_softc {
333 	struct	device sc_dev;		/* base device */
334 	TAILQ_HEAD(, isadev)
335 		sc_subdevs;		/* list of all children */
336 
337 	bus_space_tag_t sc_iot;		/* isa io space tag */
338 	bus_space_tag_t sc_memt;	/* isa mem space tag */
339 #if NISADMA > 0
340 	bus_dma_tag_t sc_dmat;		/* isa DMA tag */
341 #endif /* NISADMA > 0 */
342 
343 	isa_chipset_tag_t sc_ic;
344 
345 #if NISADMA > 0
346 	/*
347 	 * Bitmap representing the DRQ channels available
348 	 * for ISA.
349 	 */
350 	int	sc_drqmap;
351 #define sc_drq	sc_drqmap		/* XXX compatibility mode */
352 
353 	bus_space_handle_t sc_dma1h;	/* i/o handle for DMA controller #1 */
354 	bus_space_handle_t sc_dma2h;	/* i/o handle for DMA controller #2 */
355 	bus_space_handle_t sc_dmapgh;	/* i/o handle for DMA page registers */
356 
357 	/*
358 	 * DMA maps used for the 8 DMA channels.
359 	 */
360 	bus_dmamap_t	sc_dmamaps[8];
361 	bus_size_t 	sc_dmalength[8];
362 
363 	int	sc_dmareads;		/* state for isa_dmadone() */
364 	int	sc_dmafinished;		/* DMA completion state */
365 #endif /* NISADMA > 0 */
366 
367 	/*
368 	 * This i/o handle is used to map port 0x84, which is
369 	 * read to provide a 1.25us delay.  This access handle
370 	 * is mapped in isaattach(), and exported to drivers
371 	 * via isa_attach_args.
372 	 */
373 	bus_space_handle_t   sc_delaybah;
374 };
375 
376 #define	ISA_DRQ_ISFREE(isadev, drq) \
377 	((((struct isa_softc *)(isadev))->sc_drqmap & (1 << (drq))) == 0)
378 
379 #define	ISA_DRQ_ALLOC(isadev, drq) \
380 	((struct isa_softc *)(isadev))->sc_drqmap |= (1 << (drq))
381 
382 #define	ISA_DRQ_FREE(isadev, drq) \
383 	((struct isa_softc *)(isadev))->sc_drqmap &= ~(1 << (drq))
384 
385 #define		cf_iobase		cf_loc[0]
386 #define		cf_iosize		cf_loc[1]
387 #define		cf_maddr		cf_loc[2]
388 #define		cf_msize		cf_loc[3]
389 #define		cf_irq			cf_loc[4]
390 #define		cf_drq			cf_loc[5]
391 #define		cf_drq2			cf_loc[6]
392 
393 /*
394  * ISA interrupt handler manipulation.
395  *
396  * To establish an ISA interrupt handler, a driver calls isa_intr_establish()
397  * with the interrupt number, type, level, function, and function argument of
398  * the interrupt it wants to handle.  Isa_intr_establish() returns an opaque
399  * handle to an event descriptor if it succeeds, and invokes panic() if it
400  * fails.  (XXX It should return NULL, then drivers should handle that, but
401  * what should they do?)  Interrupt handlers should return 0 for "interrupt
402  * not for me", 1  for "I took care of it", or -1 for "I guess it was mine,
403  * but I wasn't expecting it."
404  *
405  * To remove an interrupt handler, the driver calls isa_intr_disestablish()
406  * with the handle returned by isa_intr_establish() for that handler.
407  */
408 
409 /* ISA interrupt sharing types */
410 char	*isa_intr_typename __P((int type));
411 
412 void	isascan __P((struct device *parent, void *match));
413 int	isaprint __P((void *, const char *));
414 
415 /*
416  * Some ISA devices (e.g. on a VLB) can perform 32-bit DMA.  This
417  * flag is passed to bus_dmamap_create() to indicate that fact.
418  */
419 #define	ISABUS_DMA_32BIT	BUS_DMA_BUS1
420 
421 /*
422  * ISA PnP prototypes and support macros.
423  */
424 static __inline void isapnp_write_reg __P((struct isapnp_softc *, int, u_char));
425 static __inline u_char isapnp_read_reg __P((struct isapnp_softc *, int));
426 
427 static __inline void
428 isapnp_write_reg(sc, r, v)
429 	struct isapnp_softc *sc;
430 	int r;
431 	u_char v;
432 {
433 	ISAPNP_WRITE_ADDR(sc, r);
434 	ISAPNP_WRITE_DATA(sc, v);
435 }
436 
437 static __inline u_char
438 isapnp_read_reg(sc, r)
439 	struct isapnp_softc *sc;
440 {
441 	ISAPNP_WRITE_ADDR(sc, r);
442 	return ISAPNP_READ_DATA(sc);
443 }
444 
445 struct isa_attach_args *
446     isapnp_get_resource __P((struct isapnp_softc *, int));
447 char *isapnp_id_to_vendor __P((char *, const u_char *));
448 
449 int isapnp_config __P((bus_space_tag_t, bus_space_tag_t,
450     struct isa_attach_args *));
451 void isapnp_unconfig __P((bus_space_tag_t, bus_space_tag_t,
452     struct isa_attach_args *));
453 
454 void isapnp_isa_attach_hook __P((struct isa_softc *));
455 #ifdef DEBUG_ISAPNP
456 void isapnp_print_mem __P((const char *, const struct isapnp_region *));
457 void isapnp_print_io __P((const char *, const struct isapnp_region *));
458 void isapnp_print_irq __P((const char *, const struct isapnp_pin *));
459 void isapnp_print_drq __P((const char *, const struct isapnp_pin *));
460 void isapnp_print_dep_start __P((const char *, const u_char));
461 void isapnp_print_attach __P((const struct isa_attach_args *));
462 void isapnp_get_config __P((struct isapnp_softc *,
463 	struct isa_attach_args *));
464 void isapnp_print_config __P((const struct isa_attach_args *));
465 #endif	/* DEBUG_ISAPNP */
466 #endif /* _DEV_ISA_ISAVAR_H_ */
467