1 /* $OpenBSD: ad1848.c,v 1.38 2010/07/31 08:08:18 ratchov Exp $ */ 2 /* $NetBSD: ad1848.c,v 1.45 1998/01/30 02:02:38 augustss Exp $ */ 3 4 /* 5 * Copyright (c) 1994 John Brezak 6 * Copyright (c) 1991-1993 Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the Computer Systems 20 * Engineering Group at Lawrence Berkeley Laboratory. 21 * 4. Neither the name of the University nor of the Laboratory may be used 22 * to endorse or promote products derived from this software without 23 * specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 */ 38 39 /* 40 * Copyright by Hannu Savolainen 1994 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions are 44 * met: 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 2. 46 * Redistributions in binary form must reproduce the above copyright notice, 47 * this list of conditions and the following disclaimer in the documentation 48 * and/or other materials provided with the distribution. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 51 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 52 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 53 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 54 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 56 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 57 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 60 * SUCH DAMAGE. 61 * 62 */ 63 /* 64 * Portions of this code are from the VOXware support for the ad1848 65 * by Hannu Savolainen <hannu@voxware.pp.fi> 66 * 67 * Portions also supplied from the SoundBlaster driver for NetBSD. 68 */ 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/ioctl.h> 74 #include <sys/syslog.h> 75 #include <sys/device.h> 76 #include <sys/proc.h> 77 #include <sys/buf.h> 78 79 #include <machine/cpu.h> 80 #include <machine/bus.h> 81 82 #include <sys/audioio.h> 83 84 #include <dev/audio_if.h> 85 #include <dev/auconv.h> 86 87 #include <dev/isa/isavar.h> 88 #include <dev/isa/isadmavar.h> 89 90 #include <dev/ic/ad1848reg.h> 91 #include <dev/ic/cs4231reg.h> 92 #include <dev/isa/ad1848var.h> 93 #include <dev/isa/cs4231var.h> 94 95 #ifdef AUDIO_DEBUG 96 #define DPRINTF(x) do { if (ad1848debug) printf x; } while (0); 97 int ad1848debug = 0; 98 #else 99 #define DPRINTF(x) 100 #endif 101 102 /* 103 * Initial values for the indirect registers of CS4248/AD1848. 104 */ 105 static int ad1848_init_values[] = { 106 GAIN_12 | INPUT_MIC_GAIN_ENABLE, /* Left Input Control */ 107 GAIN_12 | INPUT_MIC_GAIN_ENABLE, /* Right Input Control */ 108 ATTEN_12, /* Left Aux #1 Input Control */ 109 ATTEN_12, /* Right Aux #1 Input Control */ 110 ATTEN_12, /* Left Aux #2 Input Control */ 111 ATTEN_12, /* Right Aux #2 Input Control */ 112 /* bits 5-0 are attenuation select */ 113 ATTEN_12, /* Left DAC output Control */ 114 ATTEN_12, /* Right DAC output Control */ 115 CLOCK_XTAL1 | FMT_PCM8, /* Clock and Data Format */ 116 SINGLE_DMA | AUTO_CAL_ENABLE, /* Interface Config */ 117 INTERRUPT_ENABLE, /* Pin control */ 118 0x00, /* Test and Init */ 119 MODE2, /* Misc control */ 120 ATTEN_0 << 2, /* Digital Mix Control */ 121 0, /* Upper base Count */ 122 0, /* Lower base Count */ 123 124 /* These are for CS4231 &c. only (additional registers): */ 125 0, /* Alt feature 1 */ 126 0, /* Alt feature 2 */ 127 ATTEN_12, /* Left line in */ 128 ATTEN_12, /* Right line in */ 129 0, /* Timer low */ 130 0, /* Timer high */ 131 0, /* unused */ 132 0, /* unused */ 133 0, /* IRQ status */ 134 0, /* unused */ 135 136 /* Mono input (a.k.a speaker) (mic) Control */ 137 MONO_INPUT_MUTE|ATTEN_6, /* mute speaker by default */ 138 0, /* unused */ 139 0, /* record format */ 140 0, /* Crystal Clock Select */ 141 0, /* upper record count */ 142 0 /* lower record count */ 143 }; 144 145 void ad1848_reset(struct ad1848_softc *); 146 int ad1848_set_speed(struct ad1848_softc *, u_long *); 147 void ad1848_mute_monitor(void *, int); 148 149 /* indirect register access */ 150 static int ad_read(struct ad1848_softc *, int); 151 static void ad_write(struct ad1848_softc *, int, int); 152 static void ad_set_MCE(struct ad1848_softc *, int); 153 static void wait_for_calibration(struct ad1848_softc *); 154 155 /* direct register (AD1848_{IADDR,IDATA,STATUS} only) access */ 156 #define ADREAD(sc, addr) bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_iooffs+(addr)) 157 #define ADWRITE(sc, addr, data) bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_iooffs+(addr), (data)) 158 159 static int 160 ad_read(struct ad1848_softc *sc, int reg) 161 { 162 int x, s; 163 164 s = splaudio(); 165 ADWRITE(sc, AD1848_IADDR, (reg & 0xff) | sc->MCE_bit); 166 x = ADREAD(sc, AD1848_IDATA); 167 splx(s); 168 /* printf("(%02x<-%02x) ", reg|sc->MCE_bit, x); */ 169 170 return x; 171 } 172 173 static void 174 ad_write(struct ad1848_softc *sc, int reg, int data) 175 { 176 int s = splaudio(); 177 ADWRITE(sc, AD1848_IADDR, (reg & 0xff) | sc->MCE_bit); 178 ADWRITE(sc, AD1848_IDATA, data & 0xff); 179 splx(s); 180 /* printf("(%02x->%02x) ", reg|sc->MCE_bit, data); */ 181 } 182 183 static void 184 ad_set_MCE(struct ad1848_softc *sc, int state) 185 { 186 if (state) 187 sc->MCE_bit = MODE_CHANGE_ENABLE; 188 else 189 sc->MCE_bit = 0; 190 191 ADWRITE(sc, AD1848_IADDR, sc->MCE_bit); 192 } 193 194 static void 195 wait_for_calibration(struct ad1848_softc *sc) 196 { 197 int timeout; 198 199 DPRINTF(("ad1848: Auto calibration started.\n")); 200 /* 201 * Wait until the auto calibration process has finished. 202 * 203 * 1) Wait until the chip becomes ready (reads don't return SP_IN_INIT). 204 * 2) Wait until the ACI bit of I11 goes hi and then lo. 205 * a) With AD1848 alike, ACI goes hi within 5 sample cycles 206 * and remains hi for ~384 sample periods. 207 * b) With CS4231 alike, ACI goes hi immediately and remains 208 * hi for at least 168 sample periods. 209 */ 210 timeout = AD1848_TIMO; 211 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 212 timeout--; 213 214 if (ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 215 DPRINTF(("ad1848: Auto calibration timed out(1).\n")); 216 217 if (!(sc->sc_flags & AD1848_FLAG_32REGS)) { 218 timeout = AD1848_TIMO; 219 while (timeout > 0 && 220 !(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) 221 timeout--; 222 223 if (!(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) { 224 DPRINTF(("ad1848: Auto calibration timed out(2).\n")); 225 } 226 } 227 228 timeout = AD1848_TIMO; 229 while (timeout > 0 && ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG) 230 timeout--; 231 if (ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG) 232 DPRINTF(("ad1848: Auto calibration timed out(3).\n")); 233 } 234 235 #ifdef AUDIO_DEBUG 236 void ad1848_dump_regs(struct ad1848_softc *); 237 238 void 239 ad1848_dump_regs(struct ad1848_softc *sc) 240 { 241 int i; 242 u_char r; 243 244 printf("ad1848 status=%02x", ADREAD(sc, AD1848_STATUS)); 245 printf(" regs: "); 246 for (i = 0; i < 16; i++) { 247 r = ad_read(sc, i); 248 printf("%02x ", r); 249 } 250 if (sc->mode == 2) { 251 for (i = 16; i < 32; i++) { 252 r = ad_read(sc, i); 253 printf("%02x ", r); 254 } 255 } 256 printf("\n"); 257 } 258 #endif 259 260 /* 261 * Map and probe for the ad1848 chip 262 */ 263 int 264 ad1848_mapprobe(struct ad1848_softc *sc, int iobase) 265 { 266 if (!AD1848_BASE_VALID(iobase)) { 267 #ifdef AUDIO_DEBUG 268 printf("ad1848: configured iobase %04x invalid\n", iobase); 269 #endif 270 return 0; 271 } 272 273 sc->sc_iooffs = 0; 274 /* Map the AD1848 ports */ 275 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 276 return 0; 277 278 if (!ad1848_probe(sc)) { 279 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 280 return 0; 281 } else 282 return 1; 283 } 284 285 /* 286 * Probe for the ad1848 chip 287 */ 288 int 289 ad1848_probe(struct ad1848_softc *sc) 290 { 291 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 292 #if 0 293 int i; 294 #endif 295 296 /* Is there an ad1848 chip ? */ 297 sc->MCE_bit = MODE_CHANGE_ENABLE; 298 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 299 sc->sc_flags = 0; 300 301 /* 302 * Check that the I/O address is in use. 303 * 304 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 305 * chip has performed its power-on initialization. Just assume 306 * this has happened before the OS is starting. 307 * 308 * If the I/O address is unused, inb() typically returns 0xff. 309 */ 310 tmp = ADREAD(sc, AD1848_IADDR); 311 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 312 #if 0 313 DPRINTF(("ad_detect_A %x\n", tmp)); 314 #endif 315 goto bad; 316 } 317 318 /* 319 * Test if it's possible to change contents of the indirect registers. 320 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 321 * only so try to avoid using it. 322 */ 323 ad_write(sc, 0, 0xaa); 324 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 325 326 if ((tmp1 = ad_read(sc, 0)) != 0xaa || 327 (tmp2 = ad_read(sc, 1)) != 0x45) { 328 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 329 goto bad; 330 } 331 332 ad_write(sc, 0, 0x45); 333 ad_write(sc, 1, 0xaa); 334 335 if ((tmp1 = ad_read(sc, 0)) != 0x45 || 336 (tmp2 = ad_read(sc, 1)) != 0xaa) { 337 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 338 goto bad; 339 } 340 341 /* 342 * The indirect register I12 has some read only bits. Lets 343 * try to change them. 344 */ 345 tmp = ad_read(sc, SP_MISC_INFO); 346 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 347 348 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 349 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 350 goto bad; 351 } 352 353 /* 354 * MSB and 4 LSBs of the reg I12 tell the chip revision. 355 * 356 * A preliminary version of the AD1846 data sheet stated that it 357 * used an ID field of 0x0B. The current version, however, 358 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 359 * 360 * this switch statement will need updating as newer clones arrive.... 361 */ 362 switch (tmp1 & 0x8f) { 363 case 0x09: 364 sc->chip_name = "AD1848J"; 365 break; 366 case 0x0A: 367 sc->chip_name = "AD1848K"; 368 break; 369 #if 0 /* See above */ 370 case 0x0B: 371 sc->chip_name = "AD1846"; 372 break; 373 #endif 374 case 0x81: 375 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 376 break; 377 case 0x89: 378 sc->chip_name = "CS4248"; 379 break; 380 case 0x8A: 381 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 382 break; 383 default: 384 sc->chip_name = "unknown"; 385 DPRINTF(("ad1848: unknown codec version %#02X\n", (tmp1 & 0x8f))); 386 } 387 388 #if 0 389 /* 390 * XXX I don't know why, but this probe fails on an otherwise 391 * well-working AW35/pro card, so I'll just take it out for now. 392 * [niklas@openbsd.org] 393 */ 394 395 /* 396 * The original AD1848/CS4248 has just 16 indirect registers. This 397 * means that I0 and I16 should return the same value (etc.). 398 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 399 * fails with CS4231, AD1845, etc. 400 */ 401 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 402 403 for (i = 0; i < 16; i++) { 404 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 405 if (i != SP_TEST_AND_INIT) { 406 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 407 goto bad; 408 } 409 } 410 } 411 #endif 412 413 /* 414 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 415 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 416 */ 417 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 418 419 tmp1 = ad_read(sc, SP_MISC_INFO); 420 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 421 /* 422 * CS4231 or AD1845 detected - is it? 423 * 424 * Verify that setting I2 doesn't change I18. 425 */ 426 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 427 428 ad_write(sc, 2, 0x45); 429 if ((tmp2 = ad_read(sc, 18)) != 0x45) { 430 /* No change -> CS4231? */ 431 ad_write(sc, 2, 0xaa); 432 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { 433 /* Rotten bits? */ 434 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 435 goto bad; 436 } 437 438 /* 439 * It's a CS4231, or another clone with 32 registers. 440 * Let's find out which by checking I25. 441 */ 442 if ((tmp1 & 0x8f) == 0x8a) { 443 tmp1 = ad_read(sc, CS_VERSION_ID); 444 switch (tmp1 & 0xe7) { 445 case 0xA0: 446 sc->chip_name = "CS4231A"; 447 break; 448 case 0x80: 449 /* I25 no good, AD1845 same as CS4231 */ 450 sc->chip_name = "CS4231 or AD1845"; 451 break; 452 case 0x82: 453 sc->chip_name = "CS4232"; 454 break; 455 case 0xa2: 456 sc->chip_name = "CS4232C"; 457 break; 458 case 0x03: 459 sc->chip_name = "CS4236/CS4236B"; 460 break; 461 } 462 } 463 sc->mode = 2; 464 sc->sc_flags |= AD1848_FLAG_32REGS; 465 } 466 } 467 468 /* Wait for 1848 to init */ 469 while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 470 ; 471 472 /* Wait for 1848 to autocal */ 473 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 474 while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 475 ; 476 477 return 1; 478 bad: 479 return 0; 480 } 481 482 /* Unmap the I/O ports */ 483 void 484 ad1848_unmap(struct ad1848_softc *sc) 485 { 486 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 487 } 488 489 /* 490 * Attach hardware to driver, attach hardware driver to audio 491 * pseudo-device driver . 492 */ 493 void 494 ad1848_attach(struct ad1848_softc *sc) 495 { 496 int i; 497 struct ad1848_volume vol_mid = {220, 220}; 498 struct ad1848_volume vol_0 = {0, 0}; 499 struct audio_params pparams, rparams; 500 int timeout; 501 502 sc->sc_playrun = 0; 503 sc->sc_recrun = 0; 504 505 if (sc->sc_drq != -1) { 506 if (isa_dmamap_create(sc->sc_isa, sc->sc_drq, MAX_ISADMA, 507 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 508 printf("ad1848_attach: can't create map for drq %d\n", 509 sc->sc_drq); 510 return; 511 } 512 } 513 if (sc->sc_recdrq != -1 && sc->sc_recdrq != sc->sc_drq) { 514 if (isa_dmamap_create(sc->sc_isa, sc->sc_recdrq, MAX_ISADMA, 515 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 516 printf("ad1848_attach: can't create map for second drq %d\n", 517 sc->sc_recdrq); 518 return; 519 } 520 } 521 522 /* Initialize the ad1848... */ 523 for (i = 0; i < 0x10; i++) { 524 ad_write(sc, i, ad1848_init_values[i]); 525 timeout = AD1848_TIMO; 526 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 527 timeout--; 528 } 529 /* need 2 separate drqs for mode 2 */ 530 if ((sc->mode == 2) && 531 ((sc->sc_recdrq == -1) || (sc->sc_recdrq == sc->sc_drq))) { 532 ad_write(sc, SP_MISC_INFO, ad_read(sc, SP_MISC_INFO) & ~MODE2); 533 if (!(ad_read(sc, SP_MISC_INFO) & MODE2)) 534 sc->mode = 1; 535 } 536 /* ...and additional CS4231 stuff too */ 537 if (sc->mode == 2) { 538 ad_write(sc, SP_INTERFACE_CONFIG, 0); /* disable SINGLE_DMA */ 539 for (i = 0x10; i < 0x20; i++) { 540 if (ad1848_init_values[i] != 0) { 541 ad_write(sc, i, ad1848_init_values[i]); 542 timeout = AD1848_TIMO; 543 while (timeout > 0 && 544 ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 545 timeout--; 546 } 547 } 548 } 549 ad1848_reset(sc); 550 551 pparams = audio_default; 552 rparams = audio_default; 553 (void) ad1848_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, 554 &pparams, &rparams); 555 556 /* Set default gains */ 557 (void) ad1848_set_rec_gain(sc, &vol_mid); 558 (void) ad1848_set_channel_gain(sc, AD1848_DAC_CHANNEL, &vol_mid); 559 (void) ad1848_set_channel_gain(sc, AD1848_MONITOR_CHANNEL, &vol_0); 560 /* CD volume */ 561 (void) ad1848_set_channel_gain(sc, AD1848_AUX1_CHANNEL, &vol_mid); 562 if (sc->mode == 2) { 563 /* CD volume */ 564 (void) ad1848_set_channel_gain(sc, AD1848_AUX2_CHANNEL, &vol_mid); 565 (void) ad1848_set_channel_gain(sc, AD1848_LINE_CHANNEL, &vol_mid); 566 (void) ad1848_set_channel_gain(sc, AD1848_MONO_CHANNEL, &vol_0); 567 sc->mute[AD1848_MONO_CHANNEL] = MUTE_ALL; 568 } else 569 (void) ad1848_set_channel_gain(sc, AD1848_AUX2_CHANNEL, &vol_0); 570 571 /* Set default port */ 572 (void) ad1848_set_rec_port(sc, MIC_IN_PORT); 573 574 if (sc->chip_name) 575 printf(": %s", sc->chip_name); 576 } 577 578 /* 579 * Various routines to interface to higher level audio driver 580 */ 581 struct ad1848_mixerinfo { 582 int left_reg; 583 int right_reg; 584 int atten_bits; 585 int atten_mask; 586 } mixer_channel_info[] = { 587 { SP_LEFT_AUX2_CONTROL, SP_RIGHT_AUX2_CONTROL, AUX_INPUT_ATTEN_BITS, 588 AUX_INPUT_ATTEN_MASK }, 589 { SP_LEFT_AUX1_CONTROL, SP_RIGHT_AUX1_CONTROL, AUX_INPUT_ATTEN_BITS, 590 AUX_INPUT_ATTEN_MASK }, 591 { SP_LEFT_OUTPUT_CONTROL, SP_RIGHT_OUTPUT_CONTROL, OUTPUT_ATTEN_BITS, 592 OUTPUT_ATTEN_MASK }, 593 { CS_LEFT_LINE_CONTROL, CS_RIGHT_LINE_CONTROL, LINE_INPUT_ATTEN_BITS, 594 LINE_INPUT_ATTEN_MASK }, 595 { CS_MONO_IO_CONTROL, 0, MONO_INPUT_ATTEN_BITS, MONO_INPUT_ATTEN_MASK }, 596 { SP_DIGITAL_MIX, 0, OUTPUT_ATTEN_BITS, MIX_ATTEN_MASK } 597 }; 598 599 /* 600 * This function doesn't set the mute flags but does use them. 601 * The mute flags reflect the mutes that have been applied by the user. 602 * However, the driver occasionally wants to mute devices (e.g. when chaing 603 * sampling rate). These operations should not affect the mute flags. 604 */ 605 void 606 ad1848_mute_channel(struct ad1848_softc *sc, int device, int mute) 607 { 608 u_char reg; 609 610 reg = ad_read(sc, mixer_channel_info[device].left_reg); 611 612 if (mute & MUTE_LEFT) { 613 if (device == AD1848_MONITOR_CHANNEL) { 614 ad_write(sc, mixer_channel_info[device].left_reg, 615 reg & 0xFE); 616 } else { 617 ad_write(sc, mixer_channel_info[device].left_reg, 618 reg | 0x80); 619 } 620 } else if (!(sc->mute[device] & MUTE_LEFT)) { 621 if (device == AD1848_MONITOR_CHANNEL) { 622 ad_write(sc, mixer_channel_info[device].left_reg, 623 reg | 0x01); 624 } else { 625 ad_write(sc, mixer_channel_info[device].left_reg, 626 reg & ~0x80); 627 } 628 } 629 630 if (!mixer_channel_info[device].right_reg) { 631 return; 632 } 633 634 reg = ad_read(sc, mixer_channel_info[device].right_reg); 635 636 if (mute & MUTE_RIGHT) { 637 ad_write(sc, mixer_channel_info[device].right_reg, reg | 0x80); 638 } else if (!(sc->mute[device] & MUTE_RIGHT)) { 639 ad_write(sc, mixer_channel_info[device].right_reg, reg & ~0x80); 640 } 641 } 642 643 int 644 ad1848_set_channel_gain(struct ad1848_softc *sc, int device, 645 struct ad1848_volume *gp) 646 { 647 struct ad1848_mixerinfo *info = &mixer_channel_info[device]; 648 u_char reg; 649 u_int atten; 650 651 sc->gains[device] = *gp; 652 653 atten = ((AUDIO_MAX_GAIN - gp->left) * info->atten_bits) / 654 AUDIO_MAX_GAIN; 655 656 reg = ad_read(sc, info->left_reg) & (info->atten_mask); 657 if (device == AD1848_MONITOR_CHANNEL) 658 reg |= ((atten & info->atten_bits) << 2); 659 else 660 reg |= ((atten & info->atten_bits)); 661 662 ad_write(sc, info->left_reg, reg); 663 664 if (!info->right_reg) 665 return 0; 666 667 atten = ((AUDIO_MAX_GAIN - gp->right) * info->atten_bits) / 668 AUDIO_MAX_GAIN; 669 reg = ad_read(sc, info->right_reg); 670 reg &= (info->atten_mask); 671 ad_write(sc, info->right_reg, (atten & info->atten_bits) | reg); 672 673 return 0; 674 } 675 676 int 677 ad1848_get_device_gain(struct ad1848_softc *sc, int device, 678 struct ad1848_volume *gp) 679 { 680 *gp = sc->gains[device]; 681 return 0; 682 } 683 684 int 685 ad1848_get_rec_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 686 { 687 *gp = sc->rec_gain; 688 return 0; 689 } 690 691 int 692 ad1848_set_rec_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 693 { 694 u_char reg, gain; 695 696 DPRINTF(("ad1848_set_rec_gain: %d:%d\n", gp->left, gp->right)); 697 698 sc->rec_gain = *gp; 699 700 gain = (gp->left * GAIN_22_5) / AUDIO_MAX_GAIN; 701 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 702 reg &= INPUT_GAIN_MASK; 703 ad_write(sc, SP_LEFT_INPUT_CONTROL, (gain & 0x0f) | reg); 704 705 gain = (gp->right * GAIN_22_5) / AUDIO_MAX_GAIN; 706 reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL); 707 reg &= INPUT_GAIN_MASK; 708 ad_write(sc, SP_RIGHT_INPUT_CONTROL, (gain & 0x0f) | reg); 709 710 return 0; 711 } 712 713 void 714 ad1848_mute_monitor(void *addr, int mute) 715 { 716 struct ad1848_softc *sc = addr; 717 718 DPRINTF(("ad1848_mute_monitor: %smuting\n", mute ? "" : "un")); 719 if (sc->mode == 2) { 720 ad1848_mute_channel(sc, AD1848_DAC_CHANNEL, 721 mute ? MUTE_ALL : 0); 722 ad1848_mute_channel(sc, AD1848_MONO_CHANNEL, 723 mute ? MUTE_MONO : 0); 724 ad1848_mute_channel(sc, AD1848_LINE_CHANNEL, 725 mute ? MUTE_ALL : 0); 726 } 727 728 ad1848_mute_channel(sc, AD1848_AUX2_CHANNEL, mute ? MUTE_ALL : 0); 729 ad1848_mute_channel(sc, AD1848_AUX1_CHANNEL, mute ? MUTE_ALL : 0); 730 } 731 732 int 733 ad1848_set_mic_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 734 { 735 u_char reg; 736 737 DPRINTF(("cs4231_set_mic_gain: %d\n", gp->left)); 738 739 if (gp->left > AUDIO_MAX_GAIN / 2) { 740 sc->mic_gain_on = 1; 741 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 742 ad_write(sc, SP_LEFT_INPUT_CONTROL, 743 reg | INPUT_MIC_GAIN_ENABLE); 744 } else { 745 sc->mic_gain_on = 0; 746 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 747 ad_write(sc, SP_LEFT_INPUT_CONTROL, 748 reg & ~INPUT_MIC_GAIN_ENABLE); 749 } 750 751 return 0; 752 } 753 754 int 755 ad1848_get_mic_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 756 { 757 if (sc->mic_gain_on) 758 gp->left = gp->right = AUDIO_MAX_GAIN; 759 else 760 gp->left = gp->right = AUDIO_MIN_GAIN; 761 762 return 0; 763 } 764 765 766 static ad1848_devmap_t *ad1848_mixer_find_dev(ad1848_devmap_t *, int, mixer_ctrl_t *); 767 768 static ad1848_devmap_t * 769 ad1848_mixer_find_dev(ad1848_devmap_t *map, int cnt, mixer_ctrl_t *cp) 770 { 771 int idx; 772 773 for (idx = 0; idx < cnt; idx++) { 774 if (map[idx].id == cp->dev) { 775 return &map[idx]; 776 } 777 } 778 return NULL; 779 } 780 781 int 782 ad1848_mixer_get_port(struct ad1848_softc *ac, struct ad1848_devmap *map, 783 int cnt, mixer_ctrl_t *cp) 784 { 785 ad1848_devmap_t *entry; 786 struct ad1848_volume vol; 787 int error = EINVAL; 788 int dev; 789 790 if (!(entry = ad1848_mixer_find_dev(map, cnt, cp))) 791 return (ENXIO); 792 793 dev = entry->dev; 794 795 switch (entry->kind) { 796 case AD1848_KIND_LVL: 797 if (cp->type != AUDIO_MIXER_VALUE) 798 break; 799 if (dev < AD1848_AUX2_CHANNEL || 800 dev > AD1848_MONITOR_CHANNEL) 801 break; 802 if (cp->un.value.num_channels != 1 && 803 mixer_channel_info[dev].right_reg == 0) 804 break; 805 error = ad1848_get_device_gain(ac, dev, &vol); 806 if (!error) 807 ad1848_from_vol(cp, &vol); 808 break; 809 810 case AD1848_KIND_MUTE: 811 if (cp->type != AUDIO_MIXER_ENUM) 812 break; 813 cp->un.ord = ac->mute[dev] ? 1 : 0; 814 error = 0; 815 break; 816 817 case AD1848_KIND_RECORDGAIN: 818 if (cp->type != AUDIO_MIXER_VALUE) 819 break; 820 error = ad1848_get_rec_gain(ac, &vol); 821 if (!error) 822 ad1848_from_vol(cp, &vol); 823 break; 824 825 case AD1848_KIND_MICGAIN: 826 if (cp->type != AUDIO_MIXER_VALUE) 827 break; 828 error = ad1848_get_mic_gain(ac, &vol); 829 if (!error) 830 ad1848_from_vol(cp, &vol); 831 break; 832 833 case AD1848_KIND_RECORDSOURCE: 834 if (cp->type != AUDIO_MIXER_ENUM) 835 break; 836 cp->un.ord = ad1848_get_rec_port(ac); 837 error = 0; 838 break; 839 840 default: 841 printf("Invalid kind\n"); 842 break; 843 } 844 845 return error; 846 } 847 848 int 849 ad1848_mixer_set_port(struct ad1848_softc *ac, struct ad1848_devmap *map, 850 int cnt, mixer_ctrl_t *cp) 851 { 852 ad1848_devmap_t *entry; 853 struct ad1848_volume vol; 854 int error = EINVAL; 855 int dev; 856 857 if (!(entry = ad1848_mixer_find_dev(map, cnt, cp))) 858 return (ENXIO); 859 860 dev = entry->dev; 861 862 switch (entry->kind) { 863 case AD1848_KIND_LVL: 864 if (cp->type != AUDIO_MIXER_VALUE) 865 break; 866 if (dev < AD1848_AUX2_CHANNEL || 867 dev > AD1848_MONITOR_CHANNEL) 868 break; 869 if (cp->un.value.num_channels != 1 && 870 mixer_channel_info[dev].right_reg == 0) 871 break; 872 ad1848_to_vol(cp, &vol); 873 error = ad1848_set_channel_gain(ac, dev, &vol); 874 break; 875 876 case AD1848_KIND_MUTE: 877 if (cp->type != AUDIO_MIXER_ENUM) 878 break; 879 ac->mute[dev] = (cp->un.ord ? MUTE_ALL : 0); 880 ad1848_mute_channel(ac, dev, ac->mute[dev]); 881 error = 0; 882 break; 883 884 case AD1848_KIND_RECORDGAIN: 885 if (cp->type != AUDIO_MIXER_VALUE) 886 break; 887 ad1848_to_vol(cp, &vol); 888 error = ad1848_set_rec_gain(ac, &vol); 889 break; 890 891 case AD1848_KIND_MICGAIN: 892 if (cp->type != AUDIO_MIXER_VALUE) 893 break; 894 ad1848_to_vol(cp, &vol); 895 error = ad1848_set_mic_gain(ac, &vol); 896 break; 897 898 case AD1848_KIND_RECORDSOURCE: 899 if (cp->type != AUDIO_MIXER_ENUM) 900 break; 901 error = ad1848_set_rec_port(ac, cp->un.ord); 902 break; 903 904 default: 905 printf("Invalid kind\n"); 906 break; 907 } 908 909 return (error); 910 } 911 912 int 913 ad1848_query_encoding(void *addr, struct audio_encoding *fp) 914 { 915 struct ad1848_softc *sc = addr; 916 917 switch (fp->index) { 918 case 0: 919 strlcpy(fp->name, AudioEmulaw, sizeof fp->name); 920 fp->encoding = AUDIO_ENCODING_ULAW; 921 fp->precision = 8; 922 fp->flags = 0; 923 break; 924 case 1: 925 strlcpy(fp->name, AudioEalaw, sizeof fp->name); 926 fp->encoding = AUDIO_ENCODING_ALAW; 927 fp->precision = 8; 928 fp->flags = 0; 929 break; 930 case 2: 931 strlcpy(fp->name, AudioEslinear_le, sizeof fp->name); 932 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 933 fp->precision = 16; 934 fp->flags = 0; 935 break; 936 case 3: 937 strlcpy(fp->name, AudioEulinear, sizeof fp->name); 938 fp->encoding = AUDIO_ENCODING_ULINEAR; 939 fp->precision = 8; 940 fp->flags = 0; 941 break; 942 case 4: /* only on CS4231 */ 943 strlcpy(fp->name, AudioEslinear_be, sizeof fp->name); 944 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 945 fp->precision = 16; 946 fp->flags = sc->mode == 1 ? AUDIO_ENCODINGFLAG_EMULATED : 0; 947 break; 948 949 /* emulate some modes */ 950 case 5: 951 strlcpy(fp->name, AudioEslinear, sizeof fp->name); 952 fp->encoding = AUDIO_ENCODING_SLINEAR; 953 fp->precision = 8; 954 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 955 break; 956 case 6: 957 strlcpy(fp->name, AudioEulinear_le, sizeof fp->name); 958 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 959 fp->precision = 16; 960 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 961 break; 962 case 7: 963 strlcpy(fp->name, AudioEulinear_be, sizeof fp->name); 964 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 965 fp->precision = 16; 966 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 967 break; 968 case 8: /* only on CS4231 */ 969 if (sc->mode == 1) 970 return EINVAL; 971 strlcpy(fp->name, AudioEadpcm, sizeof fp->name); 972 fp->encoding = AUDIO_ENCODING_ADPCM; 973 fp->precision = 8; 974 fp->flags = 0; 975 break; 976 default: 977 return EINVAL; 978 /*NOTREACHED*/ 979 } 980 fp->bps = AUDIO_BPS(fp->precision); 981 fp->msb = 1; 982 983 return (0); 984 } 985 986 int 987 ad1848_set_params(void *addr, int setmode, int usemode, struct audio_params *p, 988 struct audio_params *r) 989 { 990 struct ad1848_softc *sc = addr; 991 int error, bits, enc; 992 void (*pswcode)(void *, u_char *buf, int cnt); 993 void (*rswcode)(void *, u_char *buf, int cnt); 994 995 DPRINTF(("ad1848_set_params: %d %d %d %ld\n", 996 p->encoding, p->precision, p->channels, p->sample_rate)); 997 998 enc = p->encoding; 999 pswcode = rswcode = 0; 1000 switch (enc) { 1001 case AUDIO_ENCODING_SLINEAR_LE: 1002 if (p->precision == 8) { 1003 enc = AUDIO_ENCODING_ULINEAR_LE; 1004 pswcode = rswcode = change_sign8; 1005 } 1006 break; 1007 case AUDIO_ENCODING_SLINEAR_BE: 1008 if (p->precision == 16 && sc->mode == 1) { 1009 enc = AUDIO_ENCODING_SLINEAR_LE; 1010 pswcode = rswcode = swap_bytes; 1011 } 1012 break; 1013 case AUDIO_ENCODING_ULINEAR_LE: 1014 if (p->precision == 16) { 1015 enc = AUDIO_ENCODING_SLINEAR_LE; 1016 pswcode = rswcode = change_sign16_le; 1017 } 1018 break; 1019 case AUDIO_ENCODING_ULINEAR_BE: 1020 if (p->precision == 16) { 1021 enc = AUDIO_ENCODING_SLINEAR_LE; 1022 pswcode = swap_bytes_change_sign16_le; 1023 rswcode = change_sign16_swap_bytes_le; 1024 } 1025 break; 1026 } 1027 switch (enc) { 1028 case AUDIO_ENCODING_ULAW: 1029 bits = FMT_ULAW; 1030 break; 1031 case AUDIO_ENCODING_ALAW: 1032 bits = FMT_ALAW; 1033 break; 1034 case AUDIO_ENCODING_ADPCM: 1035 bits = FMT_ADPCM; 1036 break; 1037 case AUDIO_ENCODING_SLINEAR_LE: 1038 if (p->precision == 16) 1039 bits = FMT_TWOS_COMP; 1040 else 1041 return EINVAL; 1042 break; 1043 case AUDIO_ENCODING_SLINEAR_BE: 1044 if (p->precision == 16) 1045 bits = FMT_TWOS_COMP_BE; 1046 else 1047 return EINVAL; 1048 break; 1049 case AUDIO_ENCODING_ULINEAR_LE: 1050 if (p->precision == 8) 1051 bits = FMT_PCM8; 1052 else 1053 return EINVAL; 1054 break; 1055 default: 1056 return EINVAL; 1057 } 1058 1059 if (p->channels < 1 || p->channels > 2) 1060 return EINVAL; 1061 1062 error = ad1848_set_speed(sc, &p->sample_rate); 1063 if (error) 1064 return error; 1065 1066 p->sw_code = pswcode; 1067 r->sw_code = rswcode; 1068 p->bps = AUDIO_BPS(p->precision); 1069 r->bps = AUDIO_BPS(r->precision); 1070 p->msb = 1; 1071 r->msb = 1; 1072 1073 sc->format_bits = bits; 1074 sc->channels = p->channels; 1075 sc->precision = p->precision; 1076 sc->need_commit = 1; 1077 1078 DPRINTF(("ad1848_set_params succeeded, bits=%x\n", bits)); 1079 return (0); 1080 } 1081 1082 int 1083 ad1848_set_rec_port(struct ad1848_softc *sc, int port) 1084 { 1085 u_char inp, reg; 1086 1087 DPRINTF(("ad1848_set_rec_port: 0x%x\n", port)); 1088 1089 if (port == MIC_IN_PORT) { 1090 inp = MIC_INPUT; 1091 } else if (port == LINE_IN_PORT) { 1092 inp = LINE_INPUT; 1093 } else if (port == DAC_IN_PORT) { 1094 inp = MIXED_DAC_INPUT; 1095 } else if (sc->mode == 2 && port == AUX1_IN_PORT) { 1096 inp = AUX_INPUT; 1097 } else 1098 return EINVAL; 1099 1100 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 1101 reg &= INPUT_SOURCE_MASK; 1102 ad_write(sc, SP_LEFT_INPUT_CONTROL, (inp | reg)); 1103 1104 reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL); 1105 reg &= INPUT_SOURCE_MASK; 1106 ad_write(sc, SP_RIGHT_INPUT_CONTROL, (inp | reg)); 1107 1108 sc->rec_port = port; 1109 1110 return 0; 1111 } 1112 1113 int 1114 ad1848_get_rec_port(struct ad1848_softc *sc) 1115 { 1116 return sc->rec_port; 1117 } 1118 1119 int 1120 ad1848_round_blocksize(void *addr, int blk) 1121 { 1122 /* Round to a multiple of the biggest sample size. */ 1123 blk = (blk + 3) & -4; 1124 1125 return blk; 1126 } 1127 1128 int 1129 ad1848_open(void *addr, int flags) 1130 { 1131 struct ad1848_softc *sc = addr; 1132 1133 DPRINTF(("ad1848_open: sc=%p\n", sc)); 1134 1135 sc->sc_pintr = sc->sc_parg = NULL; 1136 sc->sc_rintr = sc->sc_rarg = NULL; 1137 1138 /* Enable interrupts */ 1139 DPRINTF(("ad1848_open: enable intrs\n")); 1140 ad_write(sc, SP_PIN_CONTROL, 1141 INTERRUPT_ENABLE | ad_read(sc, SP_PIN_CONTROL)); 1142 1143 #ifdef AUDIO_DEBUG 1144 if (ad1848debug > 2) 1145 ad1848_dump_regs(sc); 1146 #endif 1147 1148 return 0; 1149 } 1150 1151 /* 1152 * Close function is called at splaudio(). 1153 */ 1154 void 1155 ad1848_close(void *addr) 1156 { 1157 struct ad1848_softc *sc = addr; 1158 u_char r; 1159 1160 ad1848_halt_output(sc); 1161 ad1848_halt_input(sc); 1162 1163 sc->sc_pintr = NULL; 1164 sc->sc_rintr = NULL; 1165 1166 DPRINTF(("ad1848_close: stop DMA\n")); 1167 1168 ad_write(sc, SP_LOWER_BASE_COUNT, (u_char)0); 1169 ad_write(sc, SP_UPPER_BASE_COUNT, (u_char)0); 1170 1171 /* Disable interrupts */ 1172 DPRINTF(("ad1848_close: disable intrs\n")); 1173 ad_write(sc, SP_PIN_CONTROL, 1174 ad_read(sc, SP_PIN_CONTROL) & ~INTERRUPT_ENABLE); 1175 1176 DPRINTF(("ad1848_close: disable capture and playback\n")); 1177 r = ad_read(sc, SP_INTERFACE_CONFIG); 1178 r &= ~(CAPTURE_ENABLE | PLAYBACK_ENABLE); 1179 ad_write(sc, SP_INTERFACE_CONFIG, r); 1180 1181 #ifdef AUDIO_DEBUG 1182 if (ad1848debug > 2) 1183 ad1848_dump_regs(sc); 1184 #endif 1185 } 1186 1187 /* 1188 * Lower-level routines 1189 */ 1190 int 1191 ad1848_commit_settings(void *addr) 1192 { 1193 struct ad1848_softc *sc = addr; 1194 int timeout; 1195 u_char fs; 1196 int s; 1197 1198 if (!sc->need_commit) 1199 return 0; 1200 1201 s = splaudio(); 1202 1203 ad1848_mute_monitor(sc, 1); 1204 1205 /* Enables changes to the format select reg */ 1206 ad_set_MCE(sc, 1); 1207 1208 fs = sc->speed_bits | sc->format_bits; 1209 1210 if (sc->channels == 2) 1211 fs |= FMT_STEREO; 1212 1213 ad_write(sc, SP_CLOCK_DATA_FORMAT, fs); 1214 1215 /* 1216 * If mode == 2 (CS4231), set I28 also. It's the capture format 1217 * register. 1218 */ 1219 if (sc->mode == 2) { 1220 /* Gravis Ultrasound MAX SDK sources says something about 1221 * errata sheets, with the implication that these inb()s 1222 * are necessary. 1223 */ 1224 (void)ADREAD(sc, AD1848_IDATA); 1225 (void)ADREAD(sc, AD1848_IDATA); 1226 1227 /* 1228 * Write to I8 starts resynchronization. Wait until it 1229 * completes. 1230 */ 1231 timeout = AD1848_TIMO; 1232 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 1233 timeout--; 1234 1235 ad_write(sc, CS_REC_FORMAT, fs); 1236 /* Gravis Ultrasound MAX SDK sources says something about 1237 * errata sheets, with the implication that these inb()s 1238 * are necessary. 1239 */ 1240 (void)ADREAD(sc, AD1848_IDATA); 1241 (void)ADREAD(sc, AD1848_IDATA); 1242 /* Now wait for resync for capture side of the house */ 1243 } 1244 /* 1245 * Write to I8 starts resynchronization. Wait until it completes. 1246 */ 1247 timeout = AD1848_TIMO; 1248 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 1249 timeout--; 1250 1251 if (ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 1252 printf("ad1848_commit: Auto calibration timed out\n"); 1253 1254 /* 1255 * Starts the calibration process and enters playback mode after it. 1256 */ 1257 ad_set_MCE(sc, 0); 1258 wait_for_calibration(sc); 1259 1260 ad1848_mute_monitor(sc, 0); 1261 1262 splx(s); 1263 1264 sc->need_commit = 0; 1265 1266 return 0; 1267 } 1268 1269 void 1270 ad1848_reset(struct ad1848_softc *sc) 1271 { 1272 u_char r; 1273 1274 DPRINTF(("ad1848_reset\n")); 1275 1276 /* Clear the PEN and CEN bits */ 1277 r = ad_read(sc, SP_INTERFACE_CONFIG); 1278 r &= ~(CAPTURE_ENABLE | PLAYBACK_ENABLE); 1279 ad_write(sc, SP_INTERFACE_CONFIG, r); 1280 1281 /* Clear interrupt status */ 1282 if (sc->mode == 2) 1283 ad_write(sc, CS_IRQ_STATUS, 0); 1284 ADWRITE(sc, AD1848_STATUS, 0); 1285 1286 #ifdef AUDIO_DEBUG 1287 if (ad1848debug > 2) 1288 ad1848_dump_regs(sc); 1289 #endif 1290 } 1291 1292 int 1293 ad1848_set_speed(struct ad1848_softc *sc, u_long *argp) 1294 { 1295 /* 1296 * The sampling speed is encoded in the least significant nible of I8. 1297 * The LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and 1298 * other three bits select the divisor (indirectly): 1299 * 1300 * The available speeds are in the following table. Keep the speeds in 1301 * the increasing order. 1302 */ 1303 typedef struct { 1304 int speed; 1305 u_char bits; 1306 } speed_struct; 1307 u_long arg = *argp; 1308 1309 static speed_struct speed_table[] = { 1310 {5510, (0 << 1) | 1}, 1311 {5510, (0 << 1) | 1}, 1312 {6620, (7 << 1) | 1}, 1313 {8000, (0 << 1) | 0}, 1314 {9600, (7 << 1) | 0}, 1315 {11025, (1 << 1) | 1}, 1316 {16000, (1 << 1) | 0}, 1317 {18900, (2 << 1) | 1}, 1318 {22050, (3 << 1) | 1}, 1319 {27420, (2 << 1) | 0}, 1320 {32000, (3 << 1) | 0}, 1321 {33075, (6 << 1) | 1}, 1322 {37800, (4 << 1) | 1}, 1323 {44100, (5 << 1) | 1}, 1324 {48000, (6 << 1) | 0} 1325 }; 1326 1327 int i, n, selected = -1; 1328 1329 n = sizeof(speed_table) / sizeof(speed_struct); 1330 1331 if (arg < speed_table[0].speed) 1332 selected = 0; 1333 if (arg > speed_table[n - 1].speed) 1334 selected = n - 1; 1335 1336 for (i = 1 /*really*/ ; selected == -1 && i < n; i++) 1337 if (speed_table[i].speed == arg) 1338 selected = i; 1339 else if (speed_table[i].speed > arg) { 1340 int diff1, diff2; 1341 1342 diff1 = arg - speed_table[i - 1].speed; 1343 diff2 = speed_table[i].speed - arg; 1344 1345 if (diff1 < diff2) 1346 selected = i - 1; 1347 else 1348 selected = i; 1349 } 1350 1351 if (selected == -1) { 1352 printf("ad1848: Can't find speed???\n"); 1353 selected = 3; 1354 } 1355 1356 sc->speed_bits = speed_table[selected].bits; 1357 sc->need_commit = 1; 1358 *argp = speed_table[selected].speed; 1359 1360 return 0; 1361 } 1362 1363 /* 1364 * Halt a DMA in progress. 1365 */ 1366 int 1367 ad1848_halt_output(void *addr) 1368 { 1369 struct ad1848_softc *sc = addr; 1370 u_char reg; 1371 1372 DPRINTF(("ad1848: ad1848_halt_output\n")); 1373 1374 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1375 ad_write(sc, SP_INTERFACE_CONFIG, (reg & ~PLAYBACK_ENABLE)); 1376 1377 if (sc->sc_playrun == 1) { 1378 isa_dmaabort(sc->sc_isa, sc->sc_drq); 1379 sc->sc_playrun = 0; 1380 } 1381 1382 return 0; 1383 } 1384 1385 int 1386 ad1848_halt_input(void *addr) 1387 { 1388 struct ad1848_softc *sc = addr; 1389 u_char reg; 1390 1391 DPRINTF(("ad1848: ad1848_halt_input\n")); 1392 1393 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1394 ad_write(sc, SP_INTERFACE_CONFIG, (reg & ~CAPTURE_ENABLE)); 1395 1396 if (sc->sc_recrun == 1) { 1397 isa_dmaabort(sc->sc_isa, sc->sc_recdrq); 1398 sc->sc_recrun = 0; 1399 } 1400 1401 return 0; 1402 } 1403 1404 int 1405 ad1848_trigger_input(void *addr, void *start, void *end, int blksize, 1406 void (*intr)(void *), void *arg, struct audio_params *param) 1407 { 1408 struct ad1848_softc *sc = addr; 1409 u_char reg; 1410 1411 if (sc->sc_recdrq == -1) { 1412 DPRINTF(("ad1848_trigger_input: invalid recording drq\n")); 1413 return ENXIO; 1414 } 1415 1416 isa_dmastart(sc->sc_isa, sc->sc_recdrq, start, 1417 (char *)end - (char *)start, NULL, DMAMODE_READ | DMAMODE_LOOP, 1418 BUS_DMA_NOWAIT); 1419 1420 sc->sc_recrun = 1; 1421 sc->sc_rintr = intr; 1422 sc->sc_rarg = arg; 1423 1424 blksize = (blksize * NBBY) / (param->precision * param->channels) - 1; 1425 1426 if (sc->mode == 2) { 1427 ad_write(sc, CS_LOWER_REC_CNT, (blksize & 0xff)); 1428 ad_write(sc, CS_UPPER_REC_CNT, ((blksize >> 8) & 0xff)); 1429 } else { 1430 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 1431 ad_write(sc, SP_UPPER_BASE_COUNT, (blksize >> 8) & 0xff); 1432 } 1433 1434 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1435 ad_write(sc, SP_INTERFACE_CONFIG, (CAPTURE_ENABLE | reg)); 1436 1437 #ifdef AUDIO_DEBUG 1438 if (ad1848debug > 1) 1439 printf("ad1848_trigger_input: started capture\n"); 1440 #endif 1441 1442 return 0; 1443 } 1444 1445 int 1446 ad1848_trigger_output(void *addr, void *start, void *end, int blksize, 1447 void (*intr)(void *), void *arg, struct audio_params *param) 1448 { 1449 struct ad1848_softc *sc = addr; 1450 u_char reg; 1451 1452 isa_dmastart(sc->sc_isa, sc->sc_drq, start, 1453 (char *)end - (char *)start, NULL, 1454 DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1455 1456 sc->sc_playrun = 1; 1457 sc->sc_pintr = intr; 1458 sc->sc_parg = arg; 1459 1460 blksize = (blksize * NBBY) / (param->precision * param->channels) - 1; 1461 1462 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 1463 ad_write(sc, SP_UPPER_BASE_COUNT, (blksize >> 8) & 0xff); 1464 1465 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1466 ad_write(sc, SP_INTERFACE_CONFIG, (PLAYBACK_ENABLE | reg)); 1467 1468 #ifdef AUDIO_DEBUG 1469 if (ad1848debug > 1) 1470 printf("ad1848_trigger_output: started playback\n"); 1471 #endif 1472 1473 return 0; 1474 } 1475 1476 int 1477 ad1848_intr(void *arg) 1478 { 1479 struct ad1848_softc *sc = arg; 1480 int retval = 0; 1481 u_char status; 1482 1483 /* Get intr status */ 1484 status = ADREAD(sc, AD1848_STATUS); 1485 1486 #ifdef AUDIO_DEBUG 1487 if (ad1848debug > 1) 1488 printf("ad1848_intr: mode=%d pintr=%p prun=%d rintr=%p rrun=%d status=0x%x\n", 1489 sc->mode, sc->sc_pintr, sc->sc_playrun, sc->sc_rintr, sc->sc_recrun, status); 1490 #endif 1491 1492 /* Handle interrupt */ 1493 if ((status & INTERRUPT_STATUS) != 0) { 1494 if (sc->mode == 2) { 1495 status = ad_read(sc, CS_IRQ_STATUS); 1496 #ifdef AUDIO_DEBUG 1497 if (ad1848debug > 2) 1498 printf("ad1848_intr: cs_irq_status=0x%x (play=0x%x rec0x%x)\n", 1499 status, CS_IRQ_PI, CS_IRQ_CI); 1500 #endif 1501 if ((status & CS_IRQ_PI) && sc->sc_playrun) { 1502 (*sc->sc_pintr)(sc->sc_parg); 1503 retval = 1; 1504 } 1505 if ((status & CS_IRQ_CI) && sc->sc_recrun) { 1506 (*sc->sc_rintr)(sc->sc_rarg); 1507 retval = 1; 1508 } 1509 } else { 1510 if (sc->sc_playrun) { 1511 (*sc->sc_pintr)(sc->sc_parg); 1512 retval = 1; 1513 } else if (sc->sc_recrun) { 1514 (*sc->sc_rintr)(sc->sc_rarg); 1515 retval = 1; 1516 } 1517 } 1518 /* clear interrupt */ 1519 ADWRITE(sc, AD1848_STATUS, 0); 1520 } 1521 1522 return(retval); 1523 } 1524 1525 void * 1526 ad1848_malloc(void *addr, int direction, size_t size, int pool, int flags) 1527 { 1528 struct ad1848_softc *sc = addr; 1529 int drq; 1530 1531 if (direction == AUMODE_PLAY) 1532 drq = sc->sc_drq; 1533 else 1534 drq = sc->sc_recdrq; 1535 1536 return isa_malloc(sc->sc_isa, drq, size, pool, flags); 1537 } 1538 1539 void 1540 ad1848_free(void *addr, void *ptr, int pool) 1541 { 1542 isa_free(ptr, pool); 1543 } 1544 1545 size_t 1546 ad1848_round(void *addr, int direction, size_t size) 1547 { 1548 if (size > MAX_ISADMA) 1549 size = MAX_ISADMA; 1550 return size; 1551 } 1552 1553 paddr_t 1554 ad1848_mappage(void *addr, void *mem, off_t off, int prot) 1555 { 1556 return isa_mappage(mem, off, prot); 1557 } 1558 1559 int 1560 ad1848_get_props(void *addr) 1561 { 1562 struct ad1848_softc *sc = addr; 1563 1564 return AUDIO_PROP_MMAP | 1565 (sc->mode == 2 ? AUDIO_PROP_FULLDUPLEX : 0); 1566 } 1567