1 /* $OpenBSD: ad1848.c,v 1.39 2013/05/15 08:29:24 ratchov Exp $ */ 2 /* $NetBSD: ad1848.c,v 1.45 1998/01/30 02:02:38 augustss Exp $ */ 3 4 /* 5 * Copyright (c) 1994 John Brezak 6 * Copyright (c) 1991-1993 Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the Computer Systems 20 * Engineering Group at Lawrence Berkeley Laboratory. 21 * 4. Neither the name of the University nor of the Laboratory may be used 22 * to endorse or promote products derived from this software without 23 * specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 */ 38 39 /* 40 * Copyright by Hannu Savolainen 1994 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions are 44 * met: 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 2. 46 * Redistributions in binary form must reproduce the above copyright notice, 47 * this list of conditions and the following disclaimer in the documentation 48 * and/or other materials provided with the distribution. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 51 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 52 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 53 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 54 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 56 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 57 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 60 * SUCH DAMAGE. 61 * 62 */ 63 /* 64 * Portions of this code are from the VOXware support for the ad1848 65 * by Hannu Savolainen <hannu@voxware.pp.fi> 66 * 67 * Portions also supplied from the SoundBlaster driver for NetBSD. 68 */ 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/ioctl.h> 74 #include <sys/syslog.h> 75 #include <sys/device.h> 76 #include <sys/proc.h> 77 #include <sys/buf.h> 78 79 #include <machine/cpu.h> 80 #include <machine/bus.h> 81 82 #include <sys/audioio.h> 83 84 #include <dev/audio_if.h> 85 #include <dev/auconv.h> 86 87 #include <dev/isa/isavar.h> 88 #include <dev/isa/isadmavar.h> 89 90 #include <dev/ic/ad1848reg.h> 91 #include <dev/ic/cs4231reg.h> 92 #include <dev/isa/ad1848var.h> 93 #include <dev/isa/cs4231var.h> 94 95 #ifdef AUDIO_DEBUG 96 #define DPRINTF(x) do { if (ad1848debug) printf x; } while (0); 97 int ad1848debug = 0; 98 #else 99 #define DPRINTF(x) 100 #endif 101 102 /* 103 * Initial values for the indirect registers of CS4248/AD1848. 104 */ 105 static int ad1848_init_values[] = { 106 GAIN_12 | INPUT_MIC_GAIN_ENABLE, /* Left Input Control */ 107 GAIN_12 | INPUT_MIC_GAIN_ENABLE, /* Right Input Control */ 108 ATTEN_12, /* Left Aux #1 Input Control */ 109 ATTEN_12, /* Right Aux #1 Input Control */ 110 ATTEN_12, /* Left Aux #2 Input Control */ 111 ATTEN_12, /* Right Aux #2 Input Control */ 112 /* bits 5-0 are attenuation select */ 113 ATTEN_12, /* Left DAC output Control */ 114 ATTEN_12, /* Right DAC output Control */ 115 CLOCK_XTAL1 | FMT_PCM8, /* Clock and Data Format */ 116 SINGLE_DMA | AUTO_CAL_ENABLE, /* Interface Config */ 117 INTERRUPT_ENABLE, /* Pin control */ 118 0x00, /* Test and Init */ 119 MODE2, /* Misc control */ 120 ATTEN_0 << 2, /* Digital Mix Control */ 121 0, /* Upper base Count */ 122 0, /* Lower base Count */ 123 124 /* These are for CS4231 &c. only (additional registers): */ 125 0, /* Alt feature 1 */ 126 0, /* Alt feature 2 */ 127 ATTEN_12, /* Left line in */ 128 ATTEN_12, /* Right line in */ 129 0, /* Timer low */ 130 0, /* Timer high */ 131 0, /* unused */ 132 0, /* unused */ 133 0, /* IRQ status */ 134 0, /* unused */ 135 136 /* Mono input (a.k.a speaker) (mic) Control */ 137 MONO_INPUT_MUTE|ATTEN_6, /* mute speaker by default */ 138 0, /* unused */ 139 0, /* record format */ 140 0, /* Crystal Clock Select */ 141 0, /* upper record count */ 142 0 /* lower record count */ 143 }; 144 145 void ad1848_reset(struct ad1848_softc *); 146 int ad1848_set_speed(struct ad1848_softc *, u_long *); 147 void ad1848_mute_monitor(void *, int); 148 149 /* indirect register access */ 150 static int ad_read(struct ad1848_softc *, int); 151 static void ad_write(struct ad1848_softc *, int, int); 152 static void ad_set_MCE(struct ad1848_softc *, int); 153 static void wait_for_calibration(struct ad1848_softc *); 154 155 /* direct register (AD1848_{IADDR,IDATA,STATUS} only) access */ 156 #define ADREAD(sc, addr) bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_iooffs+(addr)) 157 #define ADWRITE(sc, addr, data) bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_iooffs+(addr), (data)) 158 159 static int 160 ad_read(struct ad1848_softc *sc, int reg) 161 { 162 int x; 163 164 ADWRITE(sc, AD1848_IADDR, (reg & 0xff) | sc->MCE_bit); 165 x = ADREAD(sc, AD1848_IDATA); 166 /* printf("(%02x<-%02x) ", reg|sc->MCE_bit, x); */ 167 168 return x; 169 } 170 171 static void 172 ad_write(struct ad1848_softc *sc, int reg, int data) 173 { 174 ADWRITE(sc, AD1848_IADDR, (reg & 0xff) | sc->MCE_bit); 175 ADWRITE(sc, AD1848_IDATA, data & 0xff); 176 /* printf("(%02x->%02x) ", reg|sc->MCE_bit, data); */ 177 } 178 179 static void 180 ad_set_MCE(struct ad1848_softc *sc, int state) 181 { 182 if (state) 183 sc->MCE_bit = MODE_CHANGE_ENABLE; 184 else 185 sc->MCE_bit = 0; 186 187 ADWRITE(sc, AD1848_IADDR, sc->MCE_bit); 188 } 189 190 static void 191 wait_for_calibration(struct ad1848_softc *sc) 192 { 193 int timeout; 194 195 DPRINTF(("ad1848: Auto calibration started.\n")); 196 /* 197 * Wait until the auto calibration process has finished. 198 * 199 * 1) Wait until the chip becomes ready (reads don't return SP_IN_INIT). 200 * 2) Wait until the ACI bit of I11 goes hi and then lo. 201 * a) With AD1848 alike, ACI goes hi within 5 sample cycles 202 * and remains hi for ~384 sample periods. 203 * b) With CS4231 alike, ACI goes hi immediately and remains 204 * hi for at least 168 sample periods. 205 */ 206 timeout = AD1848_TIMO; 207 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 208 timeout--; 209 210 if (ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 211 DPRINTF(("ad1848: Auto calibration timed out(1).\n")); 212 213 if (!(sc->sc_flags & AD1848_FLAG_32REGS)) { 214 timeout = AD1848_TIMO; 215 while (timeout > 0 && 216 !(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) 217 timeout--; 218 219 if (!(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) { 220 DPRINTF(("ad1848: Auto calibration timed out(2).\n")); 221 } 222 } 223 224 timeout = AD1848_TIMO; 225 while (timeout > 0 && ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG) 226 timeout--; 227 if (ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG) 228 DPRINTF(("ad1848: Auto calibration timed out(3).\n")); 229 } 230 231 #ifdef AUDIO_DEBUG 232 void ad1848_dump_regs(struct ad1848_softc *); 233 234 void 235 ad1848_dump_regs(struct ad1848_softc *sc) 236 { 237 int i; 238 u_char r; 239 240 printf("ad1848 status=%02x", ADREAD(sc, AD1848_STATUS)); 241 printf(" regs: "); 242 for (i = 0; i < 16; i++) { 243 r = ad_read(sc, i); 244 printf("%02x ", r); 245 } 246 if (sc->mode == 2) { 247 for (i = 16; i < 32; i++) { 248 r = ad_read(sc, i); 249 printf("%02x ", r); 250 } 251 } 252 printf("\n"); 253 } 254 #endif 255 256 /* 257 * Map and probe for the ad1848 chip 258 */ 259 int 260 ad1848_mapprobe(struct ad1848_softc *sc, int iobase) 261 { 262 if (!AD1848_BASE_VALID(iobase)) { 263 #ifdef AUDIO_DEBUG 264 printf("ad1848: configured iobase %04x invalid\n", iobase); 265 #endif 266 return 0; 267 } 268 269 sc->sc_iooffs = 0; 270 /* Map the AD1848 ports */ 271 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 272 return 0; 273 274 if (!ad1848_probe(sc)) { 275 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 276 return 0; 277 } else 278 return 1; 279 } 280 281 /* 282 * Probe for the ad1848 chip 283 */ 284 int 285 ad1848_probe(struct ad1848_softc *sc) 286 { 287 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 288 #if 0 289 int i; 290 #endif 291 292 /* Is there an ad1848 chip ? */ 293 sc->MCE_bit = MODE_CHANGE_ENABLE; 294 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 295 sc->sc_flags = 0; 296 297 /* 298 * Check that the I/O address is in use. 299 * 300 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 301 * chip has performed its power-on initialization. Just assume 302 * this has happened before the OS is starting. 303 * 304 * If the I/O address is unused, inb() typically returns 0xff. 305 */ 306 tmp = ADREAD(sc, AD1848_IADDR); 307 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 308 #if 0 309 DPRINTF(("ad_detect_A %x\n", tmp)); 310 #endif 311 goto bad; 312 } 313 314 /* 315 * Test if it's possible to change contents of the indirect registers. 316 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 317 * only so try to avoid using it. 318 */ 319 ad_write(sc, 0, 0xaa); 320 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 321 322 if ((tmp1 = ad_read(sc, 0)) != 0xaa || 323 (tmp2 = ad_read(sc, 1)) != 0x45) { 324 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 325 goto bad; 326 } 327 328 ad_write(sc, 0, 0x45); 329 ad_write(sc, 1, 0xaa); 330 331 if ((tmp1 = ad_read(sc, 0)) != 0x45 || 332 (tmp2 = ad_read(sc, 1)) != 0xaa) { 333 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 334 goto bad; 335 } 336 337 /* 338 * The indirect register I12 has some read only bits. Lets 339 * try to change them. 340 */ 341 tmp = ad_read(sc, SP_MISC_INFO); 342 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 343 344 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 345 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 346 goto bad; 347 } 348 349 /* 350 * MSB and 4 LSBs of the reg I12 tell the chip revision. 351 * 352 * A preliminary version of the AD1846 data sheet stated that it 353 * used an ID field of 0x0B. The current version, however, 354 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 355 * 356 * this switch statement will need updating as newer clones arrive.... 357 */ 358 switch (tmp1 & 0x8f) { 359 case 0x09: 360 sc->chip_name = "AD1848J"; 361 break; 362 case 0x0A: 363 sc->chip_name = "AD1848K"; 364 break; 365 #if 0 /* See above */ 366 case 0x0B: 367 sc->chip_name = "AD1846"; 368 break; 369 #endif 370 case 0x81: 371 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 372 break; 373 case 0x89: 374 sc->chip_name = "CS4248"; 375 break; 376 case 0x8A: 377 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 378 break; 379 default: 380 sc->chip_name = "unknown"; 381 DPRINTF(("ad1848: unknown codec version %#02X\n", (tmp1 & 0x8f))); 382 } 383 384 #if 0 385 /* 386 * XXX I don't know why, but this probe fails on an otherwise 387 * well-working AW35/pro card, so I'll just take it out for now. 388 * [niklas@openbsd.org] 389 */ 390 391 /* 392 * The original AD1848/CS4248 has just 16 indirect registers. This 393 * means that I0 and I16 should return the same value (etc.). 394 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 395 * fails with CS4231, AD1845, etc. 396 */ 397 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 398 399 for (i = 0; i < 16; i++) { 400 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 401 if (i != SP_TEST_AND_INIT) { 402 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 403 goto bad; 404 } 405 } 406 } 407 #endif 408 409 /* 410 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 411 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 412 */ 413 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 414 415 tmp1 = ad_read(sc, SP_MISC_INFO); 416 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 417 /* 418 * CS4231 or AD1845 detected - is it? 419 * 420 * Verify that setting I2 doesn't change I18. 421 */ 422 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 423 424 ad_write(sc, 2, 0x45); 425 if ((tmp2 = ad_read(sc, 18)) != 0x45) { 426 /* No change -> CS4231? */ 427 ad_write(sc, 2, 0xaa); 428 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { 429 /* Rotten bits? */ 430 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 431 goto bad; 432 } 433 434 /* 435 * It's a CS4231, or another clone with 32 registers. 436 * Let's find out which by checking I25. 437 */ 438 if ((tmp1 & 0x8f) == 0x8a) { 439 tmp1 = ad_read(sc, CS_VERSION_ID); 440 switch (tmp1 & 0xe7) { 441 case 0xA0: 442 sc->chip_name = "CS4231A"; 443 break; 444 case 0x80: 445 /* I25 no good, AD1845 same as CS4231 */ 446 sc->chip_name = "CS4231 or AD1845"; 447 break; 448 case 0x82: 449 sc->chip_name = "CS4232"; 450 break; 451 case 0xa2: 452 sc->chip_name = "CS4232C"; 453 break; 454 case 0x03: 455 sc->chip_name = "CS4236/CS4236B"; 456 break; 457 } 458 } 459 sc->mode = 2; 460 sc->sc_flags |= AD1848_FLAG_32REGS; 461 } 462 } 463 464 /* Wait for 1848 to init */ 465 while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 466 ; 467 468 /* Wait for 1848 to autocal */ 469 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 470 while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 471 ; 472 473 return 1; 474 bad: 475 return 0; 476 } 477 478 /* Unmap the I/O ports */ 479 void 480 ad1848_unmap(struct ad1848_softc *sc) 481 { 482 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 483 } 484 485 /* 486 * Attach hardware to driver, attach hardware driver to audio 487 * pseudo-device driver . 488 */ 489 void 490 ad1848_attach(struct ad1848_softc *sc) 491 { 492 int i; 493 struct ad1848_volume vol_mid = {220, 220}; 494 struct ad1848_volume vol_0 = {0, 0}; 495 struct audio_params pparams, rparams; 496 int timeout; 497 498 sc->sc_playrun = 0; 499 sc->sc_recrun = 0; 500 501 if (sc->sc_drq != -1) { 502 if (isa_dmamap_create(sc->sc_isa, sc->sc_drq, MAX_ISADMA, 503 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 504 printf("ad1848_attach: can't create map for drq %d\n", 505 sc->sc_drq); 506 return; 507 } 508 } 509 if (sc->sc_recdrq != -1 && sc->sc_recdrq != sc->sc_drq) { 510 if (isa_dmamap_create(sc->sc_isa, sc->sc_recdrq, MAX_ISADMA, 511 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 512 printf("ad1848_attach: can't create map for second drq %d\n", 513 sc->sc_recdrq); 514 return; 515 } 516 } 517 518 /* Initialize the ad1848... */ 519 for (i = 0; i < 0x10; i++) { 520 ad_write(sc, i, ad1848_init_values[i]); 521 timeout = AD1848_TIMO; 522 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 523 timeout--; 524 } 525 /* need 2 separate drqs for mode 2 */ 526 if ((sc->mode == 2) && 527 ((sc->sc_recdrq == -1) || (sc->sc_recdrq == sc->sc_drq))) { 528 ad_write(sc, SP_MISC_INFO, ad_read(sc, SP_MISC_INFO) & ~MODE2); 529 if (!(ad_read(sc, SP_MISC_INFO) & MODE2)) 530 sc->mode = 1; 531 } 532 /* ...and additional CS4231 stuff too */ 533 if (sc->mode == 2) { 534 ad_write(sc, SP_INTERFACE_CONFIG, 0); /* disable SINGLE_DMA */ 535 for (i = 0x10; i < 0x20; i++) { 536 if (ad1848_init_values[i] != 0) { 537 ad_write(sc, i, ad1848_init_values[i]); 538 timeout = AD1848_TIMO; 539 while (timeout > 0 && 540 ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 541 timeout--; 542 } 543 } 544 } 545 ad1848_reset(sc); 546 547 pparams = audio_default; 548 rparams = audio_default; 549 (void) ad1848_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, 550 &pparams, &rparams); 551 552 /* Set default gains */ 553 (void) ad1848_set_rec_gain(sc, &vol_mid); 554 (void) ad1848_set_channel_gain(sc, AD1848_DAC_CHANNEL, &vol_mid); 555 (void) ad1848_set_channel_gain(sc, AD1848_MONITOR_CHANNEL, &vol_0); 556 /* CD volume */ 557 (void) ad1848_set_channel_gain(sc, AD1848_AUX1_CHANNEL, &vol_mid); 558 if (sc->mode == 2) { 559 /* CD volume */ 560 (void) ad1848_set_channel_gain(sc, AD1848_AUX2_CHANNEL, &vol_mid); 561 (void) ad1848_set_channel_gain(sc, AD1848_LINE_CHANNEL, &vol_mid); 562 (void) ad1848_set_channel_gain(sc, AD1848_MONO_CHANNEL, &vol_0); 563 sc->mute[AD1848_MONO_CHANNEL] = MUTE_ALL; 564 } else 565 (void) ad1848_set_channel_gain(sc, AD1848_AUX2_CHANNEL, &vol_0); 566 567 /* Set default port */ 568 (void) ad1848_set_rec_port(sc, MIC_IN_PORT); 569 570 if (sc->chip_name) 571 printf(": %s", sc->chip_name); 572 } 573 574 /* 575 * Various routines to interface to higher level audio driver 576 */ 577 struct ad1848_mixerinfo { 578 int left_reg; 579 int right_reg; 580 int atten_bits; 581 int atten_mask; 582 } mixer_channel_info[] = { 583 { SP_LEFT_AUX2_CONTROL, SP_RIGHT_AUX2_CONTROL, AUX_INPUT_ATTEN_BITS, 584 AUX_INPUT_ATTEN_MASK }, 585 { SP_LEFT_AUX1_CONTROL, SP_RIGHT_AUX1_CONTROL, AUX_INPUT_ATTEN_BITS, 586 AUX_INPUT_ATTEN_MASK }, 587 { SP_LEFT_OUTPUT_CONTROL, SP_RIGHT_OUTPUT_CONTROL, OUTPUT_ATTEN_BITS, 588 OUTPUT_ATTEN_MASK }, 589 { CS_LEFT_LINE_CONTROL, CS_RIGHT_LINE_CONTROL, LINE_INPUT_ATTEN_BITS, 590 LINE_INPUT_ATTEN_MASK }, 591 { CS_MONO_IO_CONTROL, 0, MONO_INPUT_ATTEN_BITS, MONO_INPUT_ATTEN_MASK }, 592 { SP_DIGITAL_MIX, 0, OUTPUT_ATTEN_BITS, MIX_ATTEN_MASK } 593 }; 594 595 /* 596 * This function doesn't set the mute flags but does use them. 597 * The mute flags reflect the mutes that have been applied by the user. 598 * However, the driver occasionally wants to mute devices (e.g. when chaing 599 * sampling rate). These operations should not affect the mute flags. 600 */ 601 void 602 ad1848_mute_channel(struct ad1848_softc *sc, int device, int mute) 603 { 604 u_char reg; 605 606 reg = ad_read(sc, mixer_channel_info[device].left_reg); 607 608 if (mute & MUTE_LEFT) { 609 if (device == AD1848_MONITOR_CHANNEL) { 610 ad_write(sc, mixer_channel_info[device].left_reg, 611 reg & 0xFE); 612 } else { 613 ad_write(sc, mixer_channel_info[device].left_reg, 614 reg | 0x80); 615 } 616 } else if (!(sc->mute[device] & MUTE_LEFT)) { 617 if (device == AD1848_MONITOR_CHANNEL) { 618 ad_write(sc, mixer_channel_info[device].left_reg, 619 reg | 0x01); 620 } else { 621 ad_write(sc, mixer_channel_info[device].left_reg, 622 reg & ~0x80); 623 } 624 } 625 626 if (!mixer_channel_info[device].right_reg) { 627 return; 628 } 629 630 reg = ad_read(sc, mixer_channel_info[device].right_reg); 631 632 if (mute & MUTE_RIGHT) { 633 ad_write(sc, mixer_channel_info[device].right_reg, reg | 0x80); 634 } else if (!(sc->mute[device] & MUTE_RIGHT)) { 635 ad_write(sc, mixer_channel_info[device].right_reg, reg & ~0x80); 636 } 637 } 638 639 int 640 ad1848_set_channel_gain(struct ad1848_softc *sc, int device, 641 struct ad1848_volume *gp) 642 { 643 struct ad1848_mixerinfo *info = &mixer_channel_info[device]; 644 u_char reg; 645 u_int atten; 646 647 sc->gains[device] = *gp; 648 649 atten = ((AUDIO_MAX_GAIN - gp->left) * info->atten_bits) / 650 AUDIO_MAX_GAIN; 651 652 reg = ad_read(sc, info->left_reg) & (info->atten_mask); 653 if (device == AD1848_MONITOR_CHANNEL) 654 reg |= ((atten & info->atten_bits) << 2); 655 else 656 reg |= ((atten & info->atten_bits)); 657 658 ad_write(sc, info->left_reg, reg); 659 660 if (!info->right_reg) 661 return 0; 662 663 atten = ((AUDIO_MAX_GAIN - gp->right) * info->atten_bits) / 664 AUDIO_MAX_GAIN; 665 reg = ad_read(sc, info->right_reg); 666 reg &= (info->atten_mask); 667 ad_write(sc, info->right_reg, (atten & info->atten_bits) | reg); 668 669 return 0; 670 } 671 672 int 673 ad1848_get_device_gain(struct ad1848_softc *sc, int device, 674 struct ad1848_volume *gp) 675 { 676 *gp = sc->gains[device]; 677 return 0; 678 } 679 680 int 681 ad1848_get_rec_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 682 { 683 *gp = sc->rec_gain; 684 return 0; 685 } 686 687 int 688 ad1848_set_rec_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 689 { 690 u_char reg, gain; 691 692 DPRINTF(("ad1848_set_rec_gain: %d:%d\n", gp->left, gp->right)); 693 694 sc->rec_gain = *gp; 695 696 gain = (gp->left * GAIN_22_5) / AUDIO_MAX_GAIN; 697 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 698 reg &= INPUT_GAIN_MASK; 699 ad_write(sc, SP_LEFT_INPUT_CONTROL, (gain & 0x0f) | reg); 700 701 gain = (gp->right * GAIN_22_5) / AUDIO_MAX_GAIN; 702 reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL); 703 reg &= INPUT_GAIN_MASK; 704 ad_write(sc, SP_RIGHT_INPUT_CONTROL, (gain & 0x0f) | reg); 705 706 return 0; 707 } 708 709 void 710 ad1848_mute_monitor(void *addr, int mute) 711 { 712 struct ad1848_softc *sc = addr; 713 714 DPRINTF(("ad1848_mute_monitor: %smuting\n", mute ? "" : "un")); 715 if (sc->mode == 2) { 716 ad1848_mute_channel(sc, AD1848_DAC_CHANNEL, 717 mute ? MUTE_ALL : 0); 718 ad1848_mute_channel(sc, AD1848_MONO_CHANNEL, 719 mute ? MUTE_MONO : 0); 720 ad1848_mute_channel(sc, AD1848_LINE_CHANNEL, 721 mute ? MUTE_ALL : 0); 722 } 723 724 ad1848_mute_channel(sc, AD1848_AUX2_CHANNEL, mute ? MUTE_ALL : 0); 725 ad1848_mute_channel(sc, AD1848_AUX1_CHANNEL, mute ? MUTE_ALL : 0); 726 } 727 728 int 729 ad1848_set_mic_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 730 { 731 u_char reg; 732 733 DPRINTF(("cs4231_set_mic_gain: %d\n", gp->left)); 734 735 if (gp->left > AUDIO_MAX_GAIN / 2) { 736 sc->mic_gain_on = 1; 737 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 738 ad_write(sc, SP_LEFT_INPUT_CONTROL, 739 reg | INPUT_MIC_GAIN_ENABLE); 740 } else { 741 sc->mic_gain_on = 0; 742 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 743 ad_write(sc, SP_LEFT_INPUT_CONTROL, 744 reg & ~INPUT_MIC_GAIN_ENABLE); 745 } 746 747 return 0; 748 } 749 750 int 751 ad1848_get_mic_gain(struct ad1848_softc *sc, struct ad1848_volume *gp) 752 { 753 if (sc->mic_gain_on) 754 gp->left = gp->right = AUDIO_MAX_GAIN; 755 else 756 gp->left = gp->right = AUDIO_MIN_GAIN; 757 758 return 0; 759 } 760 761 762 static ad1848_devmap_t *ad1848_mixer_find_dev(ad1848_devmap_t *, int, mixer_ctrl_t *); 763 764 static ad1848_devmap_t * 765 ad1848_mixer_find_dev(ad1848_devmap_t *map, int cnt, mixer_ctrl_t *cp) 766 { 767 int idx; 768 769 for (idx = 0; idx < cnt; idx++) { 770 if (map[idx].id == cp->dev) { 771 return &map[idx]; 772 } 773 } 774 return NULL; 775 } 776 777 int 778 ad1848_mixer_get_port(struct ad1848_softc *ac, struct ad1848_devmap *map, 779 int cnt, mixer_ctrl_t *cp) 780 { 781 ad1848_devmap_t *entry; 782 struct ad1848_volume vol; 783 int error = EINVAL; 784 int dev; 785 786 if (!(entry = ad1848_mixer_find_dev(map, cnt, cp))) 787 return (ENXIO); 788 789 dev = entry->dev; 790 mtx_enter(&audio_lock); 791 switch (entry->kind) { 792 case AD1848_KIND_LVL: 793 if (cp->type != AUDIO_MIXER_VALUE) 794 break; 795 if (dev < AD1848_AUX2_CHANNEL || 796 dev > AD1848_MONITOR_CHANNEL) 797 break; 798 if (cp->un.value.num_channels != 1 && 799 mixer_channel_info[dev].right_reg == 0) 800 break; 801 error = ad1848_get_device_gain(ac, dev, &vol); 802 if (!error) 803 ad1848_from_vol(cp, &vol); 804 break; 805 806 case AD1848_KIND_MUTE: 807 if (cp->type != AUDIO_MIXER_ENUM) 808 break; 809 cp->un.ord = ac->mute[dev] ? 1 : 0; 810 error = 0; 811 break; 812 813 case AD1848_KIND_RECORDGAIN: 814 if (cp->type != AUDIO_MIXER_VALUE) 815 break; 816 error = ad1848_get_rec_gain(ac, &vol); 817 if (!error) 818 ad1848_from_vol(cp, &vol); 819 break; 820 821 case AD1848_KIND_MICGAIN: 822 if (cp->type != AUDIO_MIXER_VALUE) 823 break; 824 error = ad1848_get_mic_gain(ac, &vol); 825 if (!error) 826 ad1848_from_vol(cp, &vol); 827 break; 828 829 case AD1848_KIND_RECORDSOURCE: 830 if (cp->type != AUDIO_MIXER_ENUM) 831 break; 832 cp->un.ord = ad1848_get_rec_port(ac); 833 error = 0; 834 break; 835 836 default: 837 printf("Invalid kind\n"); 838 break; 839 } 840 mtx_leave(&audio_lock); 841 return error; 842 } 843 844 int 845 ad1848_mixer_set_port(struct ad1848_softc *ac, struct ad1848_devmap *map, 846 int cnt, mixer_ctrl_t *cp) 847 { 848 ad1848_devmap_t *entry; 849 struct ad1848_volume vol; 850 int error = EINVAL; 851 int dev; 852 853 if (!(entry = ad1848_mixer_find_dev(map, cnt, cp))) 854 return (ENXIO); 855 856 dev = entry->dev; 857 mtx_enter(&audio_lock); 858 switch (entry->kind) { 859 case AD1848_KIND_LVL: 860 if (cp->type != AUDIO_MIXER_VALUE) 861 break; 862 if (dev < AD1848_AUX2_CHANNEL || 863 dev > AD1848_MONITOR_CHANNEL) 864 break; 865 if (cp->un.value.num_channels != 1 && 866 mixer_channel_info[dev].right_reg == 0) 867 break; 868 ad1848_to_vol(cp, &vol); 869 error = ad1848_set_channel_gain(ac, dev, &vol); 870 break; 871 872 case AD1848_KIND_MUTE: 873 if (cp->type != AUDIO_MIXER_ENUM) 874 break; 875 ac->mute[dev] = (cp->un.ord ? MUTE_ALL : 0); 876 ad1848_mute_channel(ac, dev, ac->mute[dev]); 877 error = 0; 878 break; 879 880 case AD1848_KIND_RECORDGAIN: 881 if (cp->type != AUDIO_MIXER_VALUE) 882 break; 883 ad1848_to_vol(cp, &vol); 884 error = ad1848_set_rec_gain(ac, &vol); 885 break; 886 887 case AD1848_KIND_MICGAIN: 888 if (cp->type != AUDIO_MIXER_VALUE) 889 break; 890 ad1848_to_vol(cp, &vol); 891 error = ad1848_set_mic_gain(ac, &vol); 892 break; 893 894 case AD1848_KIND_RECORDSOURCE: 895 if (cp->type != AUDIO_MIXER_ENUM) 896 break; 897 error = ad1848_set_rec_port(ac, cp->un.ord); 898 break; 899 900 default: 901 printf("Invalid kind\n"); 902 break; 903 } 904 mtx_leave(&audio_lock); 905 return (error); 906 } 907 908 int 909 ad1848_query_encoding(void *addr, struct audio_encoding *fp) 910 { 911 struct ad1848_softc *sc = addr; 912 913 switch (fp->index) { 914 case 0: 915 strlcpy(fp->name, AudioEmulaw, sizeof fp->name); 916 fp->encoding = AUDIO_ENCODING_ULAW; 917 fp->precision = 8; 918 fp->flags = 0; 919 break; 920 case 1: 921 strlcpy(fp->name, AudioEalaw, sizeof fp->name); 922 fp->encoding = AUDIO_ENCODING_ALAW; 923 fp->precision = 8; 924 fp->flags = 0; 925 break; 926 case 2: 927 strlcpy(fp->name, AudioEslinear_le, sizeof fp->name); 928 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 929 fp->precision = 16; 930 fp->flags = 0; 931 break; 932 case 3: 933 strlcpy(fp->name, AudioEulinear, sizeof fp->name); 934 fp->encoding = AUDIO_ENCODING_ULINEAR; 935 fp->precision = 8; 936 fp->flags = 0; 937 break; 938 case 4: /* only on CS4231 */ 939 strlcpy(fp->name, AudioEslinear_be, sizeof fp->name); 940 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 941 fp->precision = 16; 942 fp->flags = sc->mode == 1 ? AUDIO_ENCODINGFLAG_EMULATED : 0; 943 break; 944 945 /* emulate some modes */ 946 case 5: 947 strlcpy(fp->name, AudioEslinear, sizeof fp->name); 948 fp->encoding = AUDIO_ENCODING_SLINEAR; 949 fp->precision = 8; 950 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 951 break; 952 case 6: 953 strlcpy(fp->name, AudioEulinear_le, sizeof fp->name); 954 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 955 fp->precision = 16; 956 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 957 break; 958 case 7: 959 strlcpy(fp->name, AudioEulinear_be, sizeof fp->name); 960 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 961 fp->precision = 16; 962 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 963 break; 964 case 8: /* only on CS4231 */ 965 if (sc->mode == 1) 966 return EINVAL; 967 strlcpy(fp->name, AudioEadpcm, sizeof fp->name); 968 fp->encoding = AUDIO_ENCODING_ADPCM; 969 fp->precision = 8; 970 fp->flags = 0; 971 break; 972 default: 973 return EINVAL; 974 /*NOTREACHED*/ 975 } 976 fp->bps = AUDIO_BPS(fp->precision); 977 fp->msb = 1; 978 979 return (0); 980 } 981 982 int 983 ad1848_set_params(void *addr, int setmode, int usemode, struct audio_params *p, 984 struct audio_params *r) 985 { 986 struct ad1848_softc *sc = addr; 987 int error, bits, enc; 988 void (*pswcode)(void *, u_char *buf, int cnt); 989 void (*rswcode)(void *, u_char *buf, int cnt); 990 991 DPRINTF(("ad1848_set_params: %d %d %d %ld\n", 992 p->encoding, p->precision, p->channels, p->sample_rate)); 993 994 enc = p->encoding; 995 pswcode = rswcode = 0; 996 switch (enc) { 997 case AUDIO_ENCODING_SLINEAR_LE: 998 if (p->precision == 8) { 999 enc = AUDIO_ENCODING_ULINEAR_LE; 1000 pswcode = rswcode = change_sign8; 1001 } 1002 break; 1003 case AUDIO_ENCODING_SLINEAR_BE: 1004 if (p->precision == 16 && sc->mode == 1) { 1005 enc = AUDIO_ENCODING_SLINEAR_LE; 1006 pswcode = rswcode = swap_bytes; 1007 } 1008 break; 1009 case AUDIO_ENCODING_ULINEAR_LE: 1010 if (p->precision == 16) { 1011 enc = AUDIO_ENCODING_SLINEAR_LE; 1012 pswcode = rswcode = change_sign16_le; 1013 } 1014 break; 1015 case AUDIO_ENCODING_ULINEAR_BE: 1016 if (p->precision == 16) { 1017 enc = AUDIO_ENCODING_SLINEAR_LE; 1018 pswcode = swap_bytes_change_sign16_le; 1019 rswcode = change_sign16_swap_bytes_le; 1020 } 1021 break; 1022 } 1023 switch (enc) { 1024 case AUDIO_ENCODING_ULAW: 1025 bits = FMT_ULAW; 1026 break; 1027 case AUDIO_ENCODING_ALAW: 1028 bits = FMT_ALAW; 1029 break; 1030 case AUDIO_ENCODING_ADPCM: 1031 bits = FMT_ADPCM; 1032 break; 1033 case AUDIO_ENCODING_SLINEAR_LE: 1034 if (p->precision == 16) 1035 bits = FMT_TWOS_COMP; 1036 else 1037 return EINVAL; 1038 break; 1039 case AUDIO_ENCODING_SLINEAR_BE: 1040 if (p->precision == 16) 1041 bits = FMT_TWOS_COMP_BE; 1042 else 1043 return EINVAL; 1044 break; 1045 case AUDIO_ENCODING_ULINEAR_LE: 1046 if (p->precision == 8) 1047 bits = FMT_PCM8; 1048 else 1049 return EINVAL; 1050 break; 1051 default: 1052 return EINVAL; 1053 } 1054 1055 if (p->channels < 1 || p->channels > 2) 1056 return EINVAL; 1057 1058 error = ad1848_set_speed(sc, &p->sample_rate); 1059 if (error) 1060 return error; 1061 1062 p->sw_code = pswcode; 1063 r->sw_code = rswcode; 1064 p->bps = AUDIO_BPS(p->precision); 1065 r->bps = AUDIO_BPS(r->precision); 1066 p->msb = 1; 1067 r->msb = 1; 1068 1069 sc->format_bits = bits; 1070 sc->channels = p->channels; 1071 sc->precision = p->precision; 1072 sc->need_commit = 1; 1073 1074 DPRINTF(("ad1848_set_params succeeded, bits=%x\n", bits)); 1075 return (0); 1076 } 1077 1078 int 1079 ad1848_set_rec_port(struct ad1848_softc *sc, int port) 1080 { 1081 u_char inp, reg; 1082 1083 DPRINTF(("ad1848_set_rec_port: 0x%x\n", port)); 1084 1085 if (port == MIC_IN_PORT) { 1086 inp = MIC_INPUT; 1087 } else if (port == LINE_IN_PORT) { 1088 inp = LINE_INPUT; 1089 } else if (port == DAC_IN_PORT) { 1090 inp = MIXED_DAC_INPUT; 1091 } else if (sc->mode == 2 && port == AUX1_IN_PORT) { 1092 inp = AUX_INPUT; 1093 } else 1094 return EINVAL; 1095 1096 reg = ad_read(sc, SP_LEFT_INPUT_CONTROL); 1097 reg &= INPUT_SOURCE_MASK; 1098 ad_write(sc, SP_LEFT_INPUT_CONTROL, (inp | reg)); 1099 1100 reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL); 1101 reg &= INPUT_SOURCE_MASK; 1102 ad_write(sc, SP_RIGHT_INPUT_CONTROL, (inp | reg)); 1103 1104 sc->rec_port = port; 1105 1106 return 0; 1107 } 1108 1109 int 1110 ad1848_get_rec_port(struct ad1848_softc *sc) 1111 { 1112 return sc->rec_port; 1113 } 1114 1115 int 1116 ad1848_round_blocksize(void *addr, int blk) 1117 { 1118 /* Round to a multiple of the biggest sample size. */ 1119 blk = (blk + 3) & -4; 1120 1121 return blk; 1122 } 1123 1124 int 1125 ad1848_open(void *addr, int flags) 1126 { 1127 struct ad1848_softc *sc = addr; 1128 1129 DPRINTF(("ad1848_open: sc=%p\n", sc)); 1130 1131 sc->sc_pintr = sc->sc_parg = NULL; 1132 sc->sc_rintr = sc->sc_rarg = NULL; 1133 1134 /* Enable interrupts */ 1135 DPRINTF(("ad1848_open: enable intrs\n")); 1136 ad_write(sc, SP_PIN_CONTROL, 1137 INTERRUPT_ENABLE | ad_read(sc, SP_PIN_CONTROL)); 1138 1139 #ifdef AUDIO_DEBUG 1140 if (ad1848debug > 2) 1141 ad1848_dump_regs(sc); 1142 #endif 1143 1144 return 0; 1145 } 1146 1147 /* 1148 * Close function is called at splaudio(). 1149 */ 1150 void 1151 ad1848_close(void *addr) 1152 { 1153 struct ad1848_softc *sc = addr; 1154 u_char r; 1155 1156 ad1848_halt_output(sc); 1157 ad1848_halt_input(sc); 1158 1159 sc->sc_pintr = NULL; 1160 sc->sc_rintr = NULL; 1161 1162 DPRINTF(("ad1848_close: stop DMA\n")); 1163 1164 ad_write(sc, SP_LOWER_BASE_COUNT, (u_char)0); 1165 ad_write(sc, SP_UPPER_BASE_COUNT, (u_char)0); 1166 1167 /* Disable interrupts */ 1168 DPRINTF(("ad1848_close: disable intrs\n")); 1169 ad_write(sc, SP_PIN_CONTROL, 1170 ad_read(sc, SP_PIN_CONTROL) & ~INTERRUPT_ENABLE); 1171 1172 DPRINTF(("ad1848_close: disable capture and playback\n")); 1173 r = ad_read(sc, SP_INTERFACE_CONFIG); 1174 r &= ~(CAPTURE_ENABLE | PLAYBACK_ENABLE); 1175 ad_write(sc, SP_INTERFACE_CONFIG, r); 1176 1177 #ifdef AUDIO_DEBUG 1178 if (ad1848debug > 2) 1179 ad1848_dump_regs(sc); 1180 #endif 1181 } 1182 1183 /* 1184 * Lower-level routines 1185 */ 1186 int 1187 ad1848_commit_settings(void *addr) 1188 { 1189 struct ad1848_softc *sc = addr; 1190 int timeout; 1191 u_char fs; 1192 1193 if (!sc->need_commit) 1194 return 0; 1195 1196 mtx_enter(&audio_lock); 1197 1198 ad1848_mute_monitor(sc, 1); 1199 1200 /* Enables changes to the format select reg */ 1201 ad_set_MCE(sc, 1); 1202 1203 fs = sc->speed_bits | sc->format_bits; 1204 1205 if (sc->channels == 2) 1206 fs |= FMT_STEREO; 1207 1208 ad_write(sc, SP_CLOCK_DATA_FORMAT, fs); 1209 1210 /* 1211 * If mode == 2 (CS4231), set I28 also. It's the capture format 1212 * register. 1213 */ 1214 if (sc->mode == 2) { 1215 /* Gravis Ultrasound MAX SDK sources says something about 1216 * errata sheets, with the implication that these inb()s 1217 * are necessary. 1218 */ 1219 (void)ADREAD(sc, AD1848_IDATA); 1220 (void)ADREAD(sc, AD1848_IDATA); 1221 1222 /* 1223 * Write to I8 starts resynchronization. Wait until it 1224 * completes. 1225 */ 1226 timeout = AD1848_TIMO; 1227 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 1228 timeout--; 1229 1230 ad_write(sc, CS_REC_FORMAT, fs); 1231 /* Gravis Ultrasound MAX SDK sources says something about 1232 * errata sheets, with the implication that these inb()s 1233 * are necessary. 1234 */ 1235 (void)ADREAD(sc, AD1848_IDATA); 1236 (void)ADREAD(sc, AD1848_IDATA); 1237 /* Now wait for resync for capture side of the house */ 1238 } 1239 /* 1240 * Write to I8 starts resynchronization. Wait until it completes. 1241 */ 1242 timeout = AD1848_TIMO; 1243 while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 1244 timeout--; 1245 1246 if (ADREAD(sc, AD1848_IADDR) == SP_IN_INIT) 1247 printf("ad1848_commit: Auto calibration timed out\n"); 1248 1249 /* 1250 * Starts the calibration process and enters playback mode after it. 1251 */ 1252 ad_set_MCE(sc, 0); 1253 wait_for_calibration(sc); 1254 1255 ad1848_mute_monitor(sc, 0); 1256 1257 mtx_leave(&audio_lock); 1258 1259 sc->need_commit = 0; 1260 1261 return 0; 1262 } 1263 1264 void 1265 ad1848_reset(struct ad1848_softc *sc) 1266 { 1267 u_char r; 1268 1269 DPRINTF(("ad1848_reset\n")); 1270 1271 /* Clear the PEN and CEN bits */ 1272 r = ad_read(sc, SP_INTERFACE_CONFIG); 1273 r &= ~(CAPTURE_ENABLE | PLAYBACK_ENABLE); 1274 ad_write(sc, SP_INTERFACE_CONFIG, r); 1275 1276 /* Clear interrupt status */ 1277 if (sc->mode == 2) 1278 ad_write(sc, CS_IRQ_STATUS, 0); 1279 ADWRITE(sc, AD1848_STATUS, 0); 1280 1281 #ifdef AUDIO_DEBUG 1282 if (ad1848debug > 2) 1283 ad1848_dump_regs(sc); 1284 #endif 1285 } 1286 1287 int 1288 ad1848_set_speed(struct ad1848_softc *sc, u_long *argp) 1289 { 1290 /* 1291 * The sampling speed is encoded in the least significant nible of I8. 1292 * The LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and 1293 * other three bits select the divisor (indirectly): 1294 * 1295 * The available speeds are in the following table. Keep the speeds in 1296 * the increasing order. 1297 */ 1298 typedef struct { 1299 int speed; 1300 u_char bits; 1301 } speed_struct; 1302 u_long arg = *argp; 1303 1304 static speed_struct speed_table[] = { 1305 {5510, (0 << 1) | 1}, 1306 {5510, (0 << 1) | 1}, 1307 {6620, (7 << 1) | 1}, 1308 {8000, (0 << 1) | 0}, 1309 {9600, (7 << 1) | 0}, 1310 {11025, (1 << 1) | 1}, 1311 {16000, (1 << 1) | 0}, 1312 {18900, (2 << 1) | 1}, 1313 {22050, (3 << 1) | 1}, 1314 {27420, (2 << 1) | 0}, 1315 {32000, (3 << 1) | 0}, 1316 {33075, (6 << 1) | 1}, 1317 {37800, (4 << 1) | 1}, 1318 {44100, (5 << 1) | 1}, 1319 {48000, (6 << 1) | 0} 1320 }; 1321 1322 int i, n, selected = -1; 1323 1324 n = sizeof(speed_table) / sizeof(speed_struct); 1325 1326 if (arg < speed_table[0].speed) 1327 selected = 0; 1328 if (arg > speed_table[n - 1].speed) 1329 selected = n - 1; 1330 1331 for (i = 1 /*really*/ ; selected == -1 && i < n; i++) 1332 if (speed_table[i].speed == arg) 1333 selected = i; 1334 else if (speed_table[i].speed > arg) { 1335 int diff1, diff2; 1336 1337 diff1 = arg - speed_table[i - 1].speed; 1338 diff2 = speed_table[i].speed - arg; 1339 1340 if (diff1 < diff2) 1341 selected = i - 1; 1342 else 1343 selected = i; 1344 } 1345 1346 if (selected == -1) { 1347 printf("ad1848: Can't find speed???\n"); 1348 selected = 3; 1349 } 1350 1351 sc->speed_bits = speed_table[selected].bits; 1352 sc->need_commit = 1; 1353 *argp = speed_table[selected].speed; 1354 1355 return 0; 1356 } 1357 1358 /* 1359 * Halt a DMA in progress. 1360 */ 1361 int 1362 ad1848_halt_output(void *addr) 1363 { 1364 struct ad1848_softc *sc = addr; 1365 u_char reg; 1366 1367 DPRINTF(("ad1848: ad1848_halt_output\n")); 1368 mtx_enter(&audio_lock); 1369 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1370 ad_write(sc, SP_INTERFACE_CONFIG, (reg & ~PLAYBACK_ENABLE)); 1371 1372 if (sc->sc_playrun == 1) { 1373 isa_dmaabort(sc->sc_isa, sc->sc_drq); 1374 sc->sc_playrun = 0; 1375 } 1376 mtx_leave(&audio_lock); 1377 return 0; 1378 } 1379 1380 int 1381 ad1848_halt_input(void *addr) 1382 { 1383 struct ad1848_softc *sc = addr; 1384 u_char reg; 1385 1386 DPRINTF(("ad1848: ad1848_halt_input\n")); 1387 mtx_enter(&audio_lock); 1388 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1389 ad_write(sc, SP_INTERFACE_CONFIG, (reg & ~CAPTURE_ENABLE)); 1390 1391 if (sc->sc_recrun == 1) { 1392 isa_dmaabort(sc->sc_isa, sc->sc_recdrq); 1393 sc->sc_recrun = 0; 1394 } 1395 mtx_leave(&audio_lock); 1396 return 0; 1397 } 1398 1399 int 1400 ad1848_trigger_input(void *addr, void *start, void *end, int blksize, 1401 void (*intr)(void *), void *arg, struct audio_params *param) 1402 { 1403 struct ad1848_softc *sc = addr; 1404 u_char reg; 1405 1406 if (sc->sc_recdrq == -1) { 1407 DPRINTF(("ad1848_trigger_input: invalid recording drq\n")); 1408 return ENXIO; 1409 } 1410 mtx_enter(&audio_lock); 1411 isa_dmastart(sc->sc_isa, sc->sc_recdrq, start, 1412 (char *)end - (char *)start, NULL, DMAMODE_READ | DMAMODE_LOOP, 1413 BUS_DMA_NOWAIT); 1414 1415 sc->sc_recrun = 1; 1416 sc->sc_rintr = intr; 1417 sc->sc_rarg = arg; 1418 1419 blksize = (blksize * NBBY) / (param->precision * param->channels) - 1; 1420 1421 if (sc->mode == 2) { 1422 ad_write(sc, CS_LOWER_REC_CNT, (blksize & 0xff)); 1423 ad_write(sc, CS_UPPER_REC_CNT, ((blksize >> 8) & 0xff)); 1424 } else { 1425 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 1426 ad_write(sc, SP_UPPER_BASE_COUNT, (blksize >> 8) & 0xff); 1427 } 1428 1429 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1430 ad_write(sc, SP_INTERFACE_CONFIG, (CAPTURE_ENABLE | reg)); 1431 1432 #ifdef AUDIO_DEBUG 1433 if (ad1848debug > 1) 1434 printf("ad1848_trigger_input: started capture\n"); 1435 #endif 1436 mtx_leave(&audio_lock); 1437 return 0; 1438 } 1439 1440 int 1441 ad1848_trigger_output(void *addr, void *start, void *end, int blksize, 1442 void (*intr)(void *), void *arg, struct audio_params *param) 1443 { 1444 struct ad1848_softc *sc = addr; 1445 u_char reg; 1446 1447 mtx_enter(&audio_lock); 1448 isa_dmastart(sc->sc_isa, sc->sc_drq, start, 1449 (char *)end - (char *)start, NULL, 1450 DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1451 1452 sc->sc_playrun = 1; 1453 sc->sc_pintr = intr; 1454 sc->sc_parg = arg; 1455 1456 blksize = (blksize * NBBY) / (param->precision * param->channels) - 1; 1457 1458 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 1459 ad_write(sc, SP_UPPER_BASE_COUNT, (blksize >> 8) & 0xff); 1460 1461 reg = ad_read(sc, SP_INTERFACE_CONFIG); 1462 ad_write(sc, SP_INTERFACE_CONFIG, (PLAYBACK_ENABLE | reg)); 1463 1464 #ifdef AUDIO_DEBUG 1465 if (ad1848debug > 1) 1466 printf("ad1848_trigger_output: started playback\n"); 1467 #endif 1468 mtx_leave(&audio_lock); 1469 return 0; 1470 } 1471 1472 int 1473 ad1848_intr(void *arg) 1474 { 1475 struct ad1848_softc *sc = arg; 1476 int retval = 0; 1477 u_char status; 1478 1479 mtx_enter(&audio_lock); 1480 /* Get intr status */ 1481 status = ADREAD(sc, AD1848_STATUS); 1482 1483 #ifdef AUDIO_DEBUG 1484 if (ad1848debug > 1) 1485 printf("ad1848_intr: mode=%d pintr=%p prun=%d rintr=%p rrun=%d status=0x%x\n", 1486 sc->mode, sc->sc_pintr, sc->sc_playrun, sc->sc_rintr, sc->sc_recrun, status); 1487 #endif 1488 1489 /* Handle interrupt */ 1490 if ((status & INTERRUPT_STATUS) != 0) { 1491 if (sc->mode == 2) { 1492 status = ad_read(sc, CS_IRQ_STATUS); 1493 #ifdef AUDIO_DEBUG 1494 if (ad1848debug > 2) 1495 printf("ad1848_intr: cs_irq_status=0x%x (play=0x%x rec0x%x)\n", 1496 status, CS_IRQ_PI, CS_IRQ_CI); 1497 #endif 1498 if ((status & CS_IRQ_PI) && sc->sc_playrun) { 1499 (*sc->sc_pintr)(sc->sc_parg); 1500 retval = 1; 1501 } 1502 if ((status & CS_IRQ_CI) && sc->sc_recrun) { 1503 (*sc->sc_rintr)(sc->sc_rarg); 1504 retval = 1; 1505 } 1506 } else { 1507 if (sc->sc_playrun) { 1508 (*sc->sc_pintr)(sc->sc_parg); 1509 retval = 1; 1510 } else if (sc->sc_recrun) { 1511 (*sc->sc_rintr)(sc->sc_rarg); 1512 retval = 1; 1513 } 1514 } 1515 /* clear interrupt */ 1516 ADWRITE(sc, AD1848_STATUS, 0); 1517 } 1518 mtx_leave(&audio_lock); 1519 return(retval); 1520 } 1521 1522 void * 1523 ad1848_malloc(void *addr, int direction, size_t size, int pool, int flags) 1524 { 1525 struct ad1848_softc *sc = addr; 1526 int drq; 1527 1528 if (direction == AUMODE_PLAY) 1529 drq = sc->sc_drq; 1530 else 1531 drq = sc->sc_recdrq; 1532 1533 return isa_malloc(sc->sc_isa, drq, size, pool, flags); 1534 } 1535 1536 void 1537 ad1848_free(void *addr, void *ptr, int pool) 1538 { 1539 isa_free(ptr, pool); 1540 } 1541 1542 size_t 1543 ad1848_round(void *addr, int direction, size_t size) 1544 { 1545 if (size > MAX_ISADMA) 1546 size = MAX_ISADMA; 1547 return size; 1548 } 1549 1550 paddr_t 1551 ad1848_mappage(void *addr, void *mem, off_t off, int prot) 1552 { 1553 return isa_mappage(mem, off, prot); 1554 } 1555 1556 int 1557 ad1848_get_props(void *addr) 1558 { 1559 struct ad1848_softc *sc = addr; 1560 1561 return AUDIO_PROP_MMAP | 1562 (sc->mode == 2 ? AUDIO_PROP_FULLDUPLEX : 0); 1563 } 1564