1 /* $OpenBSD: smc91cxx.c,v 1.34 2013/08/07 01:06:31 bluhm Exp $ */ 2 /* $NetBSD: smc91cxx.c,v 1.11 1998/08/08 23:51:41 mycroft Exp $ */ 3 4 /*- 5 * Copyright (c) 1997 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Gardner Buchanan. 49 * 4. The name of Gardner Buchanan may not be used to endorse or promote 50 * products derived from this software without specific prior written 51 * permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 57 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 58 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 62 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 * 64 * from FreeBSD Id: if_sn.c,v 1.4 1996/03/18 15:47:16 gardner Exp 65 */ 66 67 /* 68 * Core driver for the SMC 91Cxx family of Ethernet chips. 69 * 70 * Memory allocation interrupt logic is drived from an SMC 91C90 driver 71 * written for NetBSD/amiga by Michael Hitch. 72 */ 73 74 #include "bpfilter.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/mbuf.h> 79 #include <sys/syslog.h> 80 #include <sys/socket.h> 81 #include <sys/device.h> 82 #include <sys/timeout.h> 83 #include <sys/kernel.h> 84 #include <sys/malloc.h> 85 #include <sys/ioctl.h> 86 #include <sys/errno.h> 87 88 #include <machine/bus.h> 89 #include <machine/intr.h> 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_media.h> 94 95 #ifdef INET 96 #include <netinet/in.h> 97 #include <netinet/if_ether.h> 98 #include <netinet/in_systm.h> 99 #include <netinet/ip.h> 100 #endif 101 102 #if NBPFILTER > 0 103 #include <net/bpf.h> 104 #endif 105 106 #include <dev/mii/mii.h> 107 #include <dev/mii/miivar.h> 108 #include <dev/mii/mii_bitbang.h> 109 110 #include <dev/ic/smc91cxxreg.h> 111 #include <dev/ic/smc91cxxvar.h> 112 113 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 114 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 115 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 116 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 117 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 118 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 119 120 /* XXX Hardware padding doesn't work yet(?) */ 121 #define SMC91CXX_SW_PAD 122 123 const char *smc91cxx_idstrs[] = { 124 NULL, /* 0 */ 125 NULL, /* 1 */ 126 NULL, /* 2 */ 127 "SMC91C90/91C92", /* 3 */ 128 "SMC91C94/91C96", /* 4 */ 129 "SMC91C95", /* 5 */ 130 NULL, /* 6 */ 131 "SMC91C100", /* 7 */ 132 "SMC91C100FD", /* 8 */ 133 NULL, /* 9 */ 134 NULL, /* 10 */ 135 NULL, /* 11 */ 136 NULL, /* 12 */ 137 NULL, /* 13 */ 138 NULL, /* 14 */ 139 NULL, /* 15 */ 140 }; 141 142 /* Supported media types. */ 143 const int smc91cxx_media[] = { 144 IFM_ETHER|IFM_10_T, 145 IFM_ETHER|IFM_10_5, 146 }; 147 #define NSMC91CxxMEDIA (sizeof(smc91cxx_media) / sizeof(smc91cxx_media[0])) 148 149 /* 150 * MII bit-bang glue. 151 */ 152 u_int32_t smc91cxx_mii_bitbang_read(struct device *); 153 void smc91cxx_mii_bitbang_write(struct device *, u_int32_t); 154 155 const struct mii_bitbang_ops smc91cxx_mii_bitbang_ops = { 156 smc91cxx_mii_bitbang_read, 157 smc91cxx_mii_bitbang_write, 158 { 159 MR_MDO, /* MII_BIT_MDO */ 160 MR_MDI, /* MII_BIT_MDI */ 161 MR_MCLK, /* MII_BIT_MDC */ 162 MR_MDOE, /* MII_BIT_DIR_HOST_PHY */ 163 0, /* MII_BIT_DIR_PHY_HOST */ 164 } 165 }; 166 167 struct cfdriver sm_cd = { 168 NULL, "sm", DV_IFNET 169 }; 170 171 /* MII callbacks */ 172 int smc91cxx_mii_readreg(struct device *, int, int); 173 void smc91cxx_mii_writereg(struct device *, int, int, int); 174 void smc91cxx_statchg(struct device *); 175 void smc91cxx_tick(void *); 176 177 int smc91cxx_mediachange(struct ifnet *); 178 void smc91cxx_mediastatus(struct ifnet *, struct ifmediareq *); 179 180 int smc91cxx_set_media(struct smc91cxx_softc *, int); 181 182 void smc91cxx_read(struct smc91cxx_softc *); 183 void smc91cxx_reset(struct smc91cxx_softc *); 184 void smc91cxx_start(struct ifnet *); 185 void smc91cxx_resume(struct smc91cxx_softc *); 186 void smc91cxx_watchdog(struct ifnet *); 187 int smc91cxx_ioctl(struct ifnet *, u_long, caddr_t); 188 189 static __inline int ether_cmp(void *, void *); 190 static __inline int 191 ether_cmp(va, vb) 192 void *va, *vb; 193 { 194 u_int8_t *a = va; 195 u_int8_t *b = vb; 196 197 return ((a[5] != b[5]) || (a[4] != b[4]) || (a[3] != b[3]) || 198 (a[2] != b[2]) || (a[1] != b[1]) || (a[0] != b[0])); 199 } 200 201 void 202 smc91cxx_attach(sc, myea) 203 struct smc91cxx_softc *sc; 204 u_int8_t *myea; 205 { 206 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 207 bus_space_tag_t bst = sc->sc_bst; 208 bus_space_handle_t bsh = sc->sc_bsh; 209 struct ifmedia *ifm = &sc->sc_mii.mii_media; 210 u_int32_t miicapabilities; 211 u_int16_t tmp; 212 int i, aui; 213 const char *idstr; 214 215 /* Make sure the chip is stopped. */ 216 smc91cxx_stop(sc); 217 218 SMC_SELECT_BANK(sc, 3); 219 tmp = bus_space_read_2(bst, bsh, REVISION_REG_W); 220 sc->sc_chipid = RR_ID(tmp); 221 /* check magic number */ 222 if ((tmp & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 223 idstr = NULL; 224 printf("%s: invalid BSR 0x%04x\n", sc->sc_dev.dv_xname, tmp); 225 } else 226 idstr = smc91cxx_idstrs[RR_ID(tmp)]; 227 #ifdef SMC_DEBUG 228 printf("\n%s: ", sc->sc_dev.dv_xname); 229 if (idstr != NULL) 230 printf("%s, ", idstr); 231 else 232 printf("unknown chip id %d, ", sc->sc_chipid); 233 printf("revision %d", RR_REV(tmp)); 234 #endif 235 236 /* Read the station address from the chip. */ 237 SMC_SELECT_BANK(sc, 1); 238 if (myea == NULL) { 239 for (i = 0; i < ETHER_ADDR_LEN; i += 2) { 240 tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i); 241 sc->sc_arpcom.ac_enaddr[i + 1] = (tmp >>8) & 0xff; 242 sc->sc_arpcom.ac_enaddr[i] = tmp & 0xff; 243 } 244 } else { 245 bcopy(myea, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN); 246 } 247 248 printf(": address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr)); 249 250 /* Initialize the ifnet structure. */ 251 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 252 ifp->if_softc = sc; 253 ifp->if_start = smc91cxx_start; 254 ifp->if_ioctl = smc91cxx_ioctl; 255 ifp->if_watchdog = smc91cxx_watchdog; 256 ifp->if_flags = 257 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 258 IFQ_SET_READY(&ifp->if_snd); 259 260 /* Attach the interface. */ 261 if_attach(ifp); 262 ether_ifattach(ifp); 263 264 /* 265 * Initialize our media structures and MII info. We will 266 * probe the MII if we are on the SMC91Cxx 267 */ 268 sc->sc_mii.mii_ifp = ifp; 269 sc->sc_mii.mii_readreg = smc91cxx_mii_readreg; 270 sc->sc_mii.mii_writereg = smc91cxx_mii_writereg; 271 sc->sc_mii.mii_statchg = smc91cxx_statchg; 272 ifmedia_init(ifm, 0, smc91cxx_mediachange, smc91cxx_mediastatus); 273 274 SMC_SELECT_BANK(sc, 1); 275 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W); 276 277 miicapabilities = BMSR_MEDIAMASK|BMSR_ANEG; 278 switch (sc->sc_chipid) { 279 case CHIP_91100: 280 /* 281 * The 91100 does not have full-duplex capabilities, 282 * even if the PHY does. 283 */ 284 miicapabilities &= ~(BMSR_100TXFDX | BMSR_10TFDX); 285 /* FALLTHROUGH */ 286 case CHIP_91100FD: 287 if (tmp & CR_MII_SELECT) { 288 #ifdef SMC_DEBUG 289 printf("%s: default media MII\n", 290 sc->sc_dev.dv_xname); 291 #endif 292 mii_attach(&sc->sc_dev, &sc->sc_mii, miicapabilities, 293 MII_PHY_ANY, MII_OFFSET_ANY, 0); 294 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 295 ifmedia_add(&sc->sc_mii.mii_media, 296 IFM_ETHER|IFM_NONE, 0, NULL); 297 ifmedia_set(&sc->sc_mii.mii_media, 298 IFM_ETHER|IFM_NONE); 299 } else { 300 ifmedia_set(&sc->sc_mii.mii_media, 301 IFM_ETHER|IFM_AUTO); 302 } 303 sc->sc_flags |= SMC_FLAGS_HAS_MII; 304 break; 305 } 306 /* FALLTHROUGH */ 307 default: 308 aui = tmp & CR_AUI_SELECT; 309 #ifdef SMC_DEBUG 310 printf("%s: default media %s\n", sc->sc_dev.dv_xname, 311 aui ? "AUI" : "UTP"); 312 #endif 313 for (i = 0; i < NSMC91CxxMEDIA; i++) 314 ifmedia_add(ifm, smc91cxx_media[i], 0, NULL); 315 ifmedia_set(ifm, IFM_ETHER | (aui ? IFM_10_5 : IFM_10_T)); 316 break; 317 } 318 319 /* The attach is successful. */ 320 sc->sc_flags |= SMC_FLAGS_ATTACHED; 321 } 322 323 /* 324 * Change media according to request. 325 */ 326 int 327 smc91cxx_mediachange(ifp) 328 struct ifnet *ifp; 329 { 330 struct smc91cxx_softc *sc = ifp->if_softc; 331 332 return (smc91cxx_set_media(sc, sc->sc_mii.mii_media.ifm_media)); 333 } 334 335 int 336 smc91cxx_set_media(sc, media) 337 struct smc91cxx_softc *sc; 338 int media; 339 { 340 bus_space_tag_t bst = sc->sc_bst; 341 bus_space_handle_t bsh = sc->sc_bsh; 342 u_int16_t tmp; 343 344 /* 345 * If the interface is not currently powered on, just return. 346 * When it is enabled later, smc91cxx_init() will properly set 347 * up the media for us. 348 */ 349 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) 350 return (0); 351 352 if (IFM_TYPE(media) != IFM_ETHER) 353 return (EINVAL); 354 355 if (sc->sc_flags & SMC_FLAGS_HAS_MII) 356 return (mii_mediachg(&sc->sc_mii)); 357 358 switch (IFM_SUBTYPE(media)) { 359 case IFM_10_T: 360 case IFM_10_5: 361 SMC_SELECT_BANK(sc, 1); 362 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W); 363 if (IFM_SUBTYPE(media) == IFM_10_5) 364 tmp |= CR_AUI_SELECT; 365 else 366 tmp &= ~CR_AUI_SELECT; 367 bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp); 368 delay(20000); /* XXX is this needed? */ 369 break; 370 371 default: 372 return (EINVAL); 373 } 374 375 return (0); 376 } 377 378 /* 379 * Notify the world which media we're using. 380 */ 381 void 382 smc91cxx_mediastatus(ifp, ifmr) 383 struct ifnet *ifp; 384 struct ifmediareq *ifmr; 385 { 386 struct smc91cxx_softc *sc = ifp->if_softc; 387 bus_space_tag_t bst = sc->sc_bst; 388 bus_space_handle_t bsh = sc->sc_bsh; 389 u_int16_t tmp; 390 391 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) { 392 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 393 ifmr->ifm_status = 0; 394 return; 395 } 396 397 /* 398 * If we have MII, go ask the PHY what's going on. 399 */ 400 if (sc->sc_flags & SMC_FLAGS_HAS_MII) { 401 mii_pollstat(&sc->sc_mii); 402 ifmr->ifm_active = sc->sc_mii.mii_media_active; 403 ifmr->ifm_status = sc->sc_mii.mii_media_status; 404 return; 405 } 406 407 SMC_SELECT_BANK(sc, 1); 408 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W); 409 ifmr->ifm_active = 410 IFM_ETHER | ((tmp & CR_AUI_SELECT) ? IFM_10_5 : IFM_10_T); 411 } 412 413 /* 414 * Reset and initialize the chip. 415 */ 416 void 417 smc91cxx_init(sc) 418 struct smc91cxx_softc *sc; 419 { 420 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 421 bus_space_tag_t bst = sc->sc_bst; 422 bus_space_handle_t bsh = sc->sc_bsh; 423 u_int16_t tmp; 424 int s, i; 425 426 s = splnet(); 427 428 /* 429 * This resets the registers mostly to defaults, but doesn't 430 * affect the EEPROM. After the reset cycle, we pause briefly 431 * for the chip to recover. 432 * 433 * XXX how long are we really supposed to delay? --thorpej 434 */ 435 SMC_SELECT_BANK(sc, 0); 436 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, RCR_SOFTRESET); 437 delay(100); 438 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0); 439 delay(200); 440 441 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0); 442 443 /* Set the Ethernet address. */ 444 SMC_SELECT_BANK(sc, 1); 445 for (i = 0; i < ETHER_ADDR_LEN; i++ ) 446 bus_space_write_1(bst, bsh, IAR_ADDR0_REG_W + i, 447 sc->sc_arpcom.ac_enaddr[i]); 448 449 /* 450 * Set the control register to automatically release successfully 451 * transmitted packets (making the best use of our limited memory) 452 * and enable the EPH interrupt on certain TX errors. 453 */ 454 bus_space_write_2(bst, bsh, CONTROL_REG_W, (CTR_AUTO_RELEASE | 455 CTR_TE_ENABLE | CTR_CR_ENABLE | CTR_LE_ENABLE)); 456 457 /* 458 * Reset the MMU and wait for it to be un-busy. 459 */ 460 SMC_SELECT_BANK(sc, 2); 461 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET); 462 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY) 463 /* XXX bound this loop! */ ; 464 465 /* 466 * Disable all interrupts. 467 */ 468 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0); 469 470 /* 471 * Set current media. 472 */ 473 smc91cxx_set_media(sc, sc->sc_mii.mii_media.ifm_cur->ifm_media); 474 475 /* 476 * Set the receive filter. We want receive enable and auto 477 * strip of CRC from received packet. If we are in promisc. mode, 478 * then set that bit as well. 479 * 480 * XXX Initialize multicast filter. For now, we just accept 481 * XXX all multicast. 482 */ 483 SMC_SELECT_BANK(sc, 0); 484 485 tmp = RCR_ENABLE | RCR_STRIP_CRC | RCR_ALMUL; 486 if (ifp->if_flags & IFF_PROMISC) 487 tmp |= RCR_PROMISC; 488 489 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp); 490 491 /* 492 * Set transmitter control to "enabled". 493 */ 494 tmp = TCR_ENABLE; 495 496 #ifndef SMC91CXX_SW_PAD 497 /* 498 * Enable hardware padding of transmitted packets. 499 * XXX doesn't work? 500 */ 501 tmp |= TCR_PAD_ENABLE; 502 #endif 503 504 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp); 505 506 /* 507 * Now, enable interrupts. 508 */ 509 SMC_SELECT_BANK(sc, 2); 510 511 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 512 IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT | IM_TX_INT); 513 514 /* Interface is now running, with no output active. */ 515 ifp->if_flags |= IFF_RUNNING; 516 ifp->if_flags &= ~IFF_OACTIVE; 517 518 if (sc->sc_flags & SMC_FLAGS_HAS_MII) { 519 /* Start the one second clock. */ 520 timeout_set(&sc->sc_mii_timeout, smc91cxx_tick, sc); 521 timeout_add_sec(&sc->sc_mii_timeout, 1); 522 } 523 524 /* 525 * Attempt to start any pending transmission. 526 */ 527 smc91cxx_start(ifp); 528 529 splx(s); 530 } 531 532 /* 533 * Start output on an interface. 534 * Must be called at splnet or interrupt level. 535 */ 536 void 537 smc91cxx_start(ifp) 538 struct ifnet *ifp; 539 { 540 struct smc91cxx_softc *sc = ifp->if_softc; 541 bus_space_tag_t bst = sc->sc_bst; 542 bus_space_handle_t bsh = sc->sc_bsh; 543 u_int len; 544 struct mbuf *m, *top; 545 u_int16_t length, npages; 546 u_int8_t packetno; 547 int timo, pad; 548 549 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 550 return; 551 552 again: 553 /* 554 * Peek at the next packet. 555 */ 556 IFQ_POLL(&ifp->if_snd, m); 557 if (m == NULL) 558 return; 559 560 /* 561 * Compute the frame length and set pad to give an overall even 562 * number of bytes. Below, we assume that the packet length 563 * is even. 564 */ 565 for (len = 0, top = m; m != NULL; m = m->m_next) 566 len += m->m_len; 567 pad = (len & 1); 568 569 /* 570 * We drop packets that are too large. Perhaps we should 571 * truncate them instead? 572 */ 573 if ((len + pad) > (ETHER_MAX_LEN - ETHER_CRC_LEN)) { 574 printf("%s: large packet discarded\n", sc->sc_dev.dv_xname); 575 ifp->if_oerrors++; 576 IFQ_DEQUEUE(&ifp->if_snd, m); 577 m_freem(m); 578 goto readcheck; 579 } 580 581 #ifdef SMC91CXX_SW_PAD 582 /* 583 * Not using hardware padding; pad to ETHER_MIN_LEN. 584 */ 585 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) 586 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 587 #endif 588 589 length = pad + len; 590 591 /* 592 * The MMU has a 256 byte page size. The MMU expects us to 593 * ask for "npages - 1". We include space for the status word, 594 * byte count, and control bytes in the allocation request. 595 */ 596 npages = (length + 6) >> 8; 597 598 /* 599 * Now allocate the memory. 600 */ 601 SMC_SELECT_BANK(sc, 2); 602 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages); 603 604 timo = MEMORY_WAIT_TIME; 605 do { 606 if (bus_space_read_1(bst, bsh, INTR_STAT_REG_B) & IM_ALLOC_INT) 607 break; 608 delay(1); 609 } while (--timo); 610 611 packetno = bus_space_read_1(bst, bsh, ALLOC_RESULT_REG_B); 612 613 if (packetno & ARR_FAILED || timo == 0) { 614 /* 615 * No transmit memory is available. Record the number 616 * of requestd pages and enable the allocation completion 617 * interrupt. Set up the watchdog timer in case we miss 618 * the interrupt. Mark the interface as active so that 619 * no one else attempts to transmit while we're allocating 620 * memory. 621 */ 622 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 623 bus_space_read_1(bst, bsh, INTR_MASK_REG_B) | IM_ALLOC_INT); 624 625 ifp->if_timer = 5; 626 ifp->if_flags |= IFF_OACTIVE; 627 628 return; 629 } 630 631 /* 632 * We have a packet number - set the data window. 633 */ 634 bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno); 635 636 /* 637 * Point to the beginning of the packet. 638 */ 639 bus_space_write_2(bst, bsh, POINTER_REG_W, PTR_AUTOINC /* | 0x0000 */); 640 641 /* 642 * Send the packet length (+6 for stats, length, and control bytes) 643 * and the status word (set to zeros). 644 */ 645 bus_space_write_2(bst, bsh, DATA_REG_W, 0); 646 bus_space_write_1(bst, bsh, DATA_REG_B, (length + 6) & 0xff); 647 bus_space_write_1(bst, bsh, DATA_REG_B, ((length + 6) >> 8) & 0xff); 648 649 /* 650 * Get the packet from the kernel. This will include the Ethernet 651 * frame header, MAC address, etc. 652 */ 653 IFQ_DEQUEUE(&ifp->if_snd, m); 654 655 /* 656 * Push the packet out to the card. 657 */ 658 for (top = m; m != NULL; m = m->m_next) { 659 /* Words... */ 660 if (m->m_len > 1) 661 bus_space_write_multi_stream_2(bst, bsh, DATA_REG_W, 662 mtod(m, u_int16_t *), m->m_len >> 1); 663 664 /* ...and the remaining byte, if any. */ 665 if (m->m_len & 1) 666 bus_space_write_1(bst, bsh, DATA_REG_B, 667 *(u_int8_t *)(mtod(m, u_int8_t *) + (m->m_len - 1))); 668 } 669 670 #ifdef SMC91CXX_SW_PAD 671 /* 672 * Push out padding. 673 */ 674 while (pad > 1) { 675 bus_space_write_2(bst, bsh, DATA_REG_W, 0); 676 pad -= 2; 677 } 678 if (pad) 679 bus_space_write_1(bst, bsh, DATA_REG_B, 0); 680 #endif 681 682 /* 683 * Push out control byte and unused packet byte. The control byte 684 * is 0, meaning the packet is even lengthed and no special 685 * CRC handling is necessary. 686 */ 687 bus_space_write_2(bst, bsh, DATA_REG_W, 0); 688 689 /* 690 * Enable transmit interrupts and let the chip go. Set a watchdog 691 * in case we miss the interrupt. 692 */ 693 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 694 bus_space_read_1(bst, bsh, INTR_MASK_REG_B) | 695 IM_TX_INT | IM_TX_EMPTY_INT); 696 697 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE); 698 699 ifp->if_timer = 5; 700 701 #if NBPFILTER > 0 702 /* Hand off a copy to the bpf. */ 703 if (ifp->if_bpf) 704 bpf_mtap(ifp->if_bpf, top, BPF_DIRECTION_OUT); 705 #endif 706 707 ifp->if_opackets++; 708 m_freem(top); 709 710 readcheck: 711 /* 712 * Check for incoming pcakets. We don't want to overflow the small 713 * RX FIFO. If nothing has arrived, attempt to queue another 714 * transmit packet. 715 */ 716 if (bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & FIFO_REMPTY) 717 goto again; 718 } 719 720 /* 721 * Interrupt service routine. 722 */ 723 int 724 smc91cxx_intr(arg) 725 void *arg; 726 { 727 struct smc91cxx_softc *sc = arg; 728 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 729 bus_space_tag_t bst = sc->sc_bst; 730 bus_space_handle_t bsh = sc->sc_bsh; 731 u_int8_t mask, interrupts, status; 732 u_int16_t packetno, tx_status, card_stats; 733 734 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0 || 735 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 736 return (0); 737 738 SMC_SELECT_BANK(sc, 2); 739 740 /* 741 * Obtain the current interrupt mask. 742 */ 743 mask = bus_space_read_1(bst, bsh, INTR_MASK_REG_B); 744 745 /* 746 * Get the set of interrupt which occurred and eliminate any 747 * which are not enabled. 748 */ 749 interrupts = bus_space_read_1(bst, bsh, INTR_STAT_REG_B); 750 status = interrupts & mask; 751 752 /* Ours? */ 753 if (status == 0) 754 return (0); 755 756 /* 757 * It's ours; disable all interrupts while we process them. 758 */ 759 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0); 760 761 /* 762 * Receive overrun interrupts. 763 */ 764 if (status & IM_RX_OVRN_INT) { 765 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_RX_OVRN_INT); 766 ifp->if_ierrors++; 767 } 768 769 /* 770 * Receive interrupts. 771 */ 772 if (status & IM_RCV_INT) { 773 #if 1 /* DIAGNOSTIC */ 774 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W); 775 if (packetno & FIFO_REMPTY) { 776 printf("%s: receive interrupt on empty fifo\n", 777 sc->sc_dev.dv_xname); 778 goto out; 779 } else 780 #endif 781 smc91cxx_read(sc); 782 } 783 784 /* 785 * Memory allocation interrupts. 786 */ 787 if (status & IM_ALLOC_INT) { 788 /* Disable this interrupt. */ 789 mask &= ~IM_ALLOC_INT; 790 791 /* 792 * Release the just-allocated memory. We will reallocate 793 * it through the normal start logic. 794 */ 795 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY) 796 /* XXX bound this loop! */ ; 797 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT); 798 799 ifp->if_flags &= ~IFF_OACTIVE; 800 ifp->if_timer = 0; 801 } 802 803 /* 804 * Transmit complete interrupt. Handle transmission error messages. 805 * This will only be called on error condition because of AUTO RELEASE 806 * mode. 807 */ 808 if (status & IM_TX_INT) { 809 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_INT); 810 811 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & 812 FIFO_TX_MASK; 813 814 /* 815 * Select this as the packet to read from. 816 */ 817 bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno); 818 819 /* 820 * Position the pointer to the beginning of the packet. 821 */ 822 bus_space_write_2(bst, bsh, POINTER_REG_W, 823 PTR_AUTOINC | PTR_READ /* | 0x0000 */); 824 825 /* 826 * Fetch the TX status word. This will be a copy of 827 * the EPH_STATUS_REG_W at the time of the transmission 828 * failure. 829 */ 830 tx_status = bus_space_read_2(bst, bsh, DATA_REG_W); 831 832 if (tx_status & EPHSR_TX_SUC) 833 printf("%s: successful packet caused TX interrupt?!\n", 834 sc->sc_dev.dv_xname); 835 else 836 ifp->if_oerrors++; 837 838 if (tx_status & EPHSR_LATCOL) 839 ifp->if_collisions++; 840 841 /* 842 * Some of these errors disable the transmitter; reenable it. 843 */ 844 SMC_SELECT_BANK(sc, 0); 845 #ifdef SMC91CXX_SW_PAD 846 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, TCR_ENABLE); 847 #else 848 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 849 TCR_ENABLE | TCR_PAD_ENABLE); 850 #endif 851 852 /* 853 * Kill the failed packet and wait for the MMU to unbusy. 854 */ 855 SMC_SELECT_BANK(sc, 2); 856 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY) 857 /* XXX bound this loop! */ ; 858 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT); 859 860 ifp->if_timer = 0; 861 } 862 863 /* 864 * Transmit underrun interrupts. We use this opportunity to 865 * update transmit statistics from the card. 866 */ 867 if (status & IM_TX_EMPTY_INT) { 868 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_EMPTY_INT); 869 870 /* Disable this interrupt. */ 871 mask &= ~IM_TX_EMPTY_INT; 872 873 SMC_SELECT_BANK(sc, 0); 874 card_stats = bus_space_read_2(bst, bsh, COUNTER_REG_W); 875 876 /* Single collisions. */ 877 ifp->if_collisions += card_stats & ECR_COLN_MASK; 878 879 /* Multiple collisions. */ 880 ifp->if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 881 882 SMC_SELECT_BANK(sc, 2); 883 884 ifp->if_timer = 0; 885 } 886 887 /* 888 * Other errors. Reset the interface. 889 */ 890 if (status & IM_EPH_INT) { 891 smc91cxx_stop(sc); 892 smc91cxx_init(sc); 893 } 894 895 /* 896 * Attempt to queue more packets for transmission. 897 */ 898 smc91cxx_start(ifp); 899 900 out: 901 /* 902 * Reenable the interrupts we wish to receive now that processing 903 * is complete. 904 */ 905 mask |= bus_space_read_1(bst, bsh, INTR_MASK_REG_B); 906 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, mask); 907 908 return (1); 909 } 910 911 /* 912 * Read a packet from the card and pass it up to the kernel. 913 * NOTE! WE EXPECT TO BE IN REGISTER WINDOW 2! 914 */ 915 void 916 smc91cxx_read(sc) 917 struct smc91cxx_softc *sc; 918 { 919 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 920 bus_space_tag_t bst = sc->sc_bst; 921 bus_space_handle_t bsh = sc->sc_bsh; 922 struct mbuf *m; 923 u_int16_t status, packetno, packetlen; 924 u_int8_t *data; 925 926 again: 927 /* 928 * Set data pointer to the beginning of the packet. Since 929 * PTR_RCV is set, the packet number will be found automatically 930 * in FIFO_PORTS_REG_W, FIFO_RX_MASK. 931 */ 932 bus_space_write_2(bst, bsh, POINTER_REG_W, 933 PTR_READ | PTR_RCV | PTR_AUTOINC /* | 0x0000 */); 934 935 /* 936 * First two words are status and packet length. 937 */ 938 status = bus_space_read_2(bst, bsh, DATA_REG_W); 939 packetlen = bus_space_read_2(bst, bsh, DATA_REG_W); 940 941 /* 942 * The packet length includes 3 extra words: status, length, 943 * and an extra word that includes the control byte. 944 */ 945 packetlen -= 6; 946 947 /* 948 * Account for receive errors and discard. 949 */ 950 if (status & RS_ERRORS) { 951 ifp->if_ierrors++; 952 goto out; 953 } 954 955 /* 956 * Adjust for odd-length packet. 957 */ 958 if (status & RS_ODDFRAME) 959 packetlen++; 960 961 /* 962 * Allocate a header mbuf. 963 */ 964 MGETHDR(m, M_DONTWAIT, MT_DATA); 965 if (m == NULL) 966 goto out; 967 m->m_pkthdr.rcvif = ifp; 968 m->m_pkthdr.len = packetlen; 969 970 /* 971 * Always put the packet in a cluster. 972 * XXX should chain small mbufs if less than threshold. 973 */ 974 MCLGET(m, M_DONTWAIT); 975 if ((m->m_flags & M_EXT) == 0) { 976 m_freem(m); 977 ifp->if_ierrors++; 978 printf("%s: can't allocate cluster for incoming packet\n", 979 sc->sc_dev.dv_xname); 980 goto out; 981 } 982 983 /* 984 * Pull the packet off the interface. Make sure the payload 985 * is aligned. 986 */ 987 m->m_data = (caddr_t) ALIGN(mtod(m, caddr_t) + 988 sizeof(struct ether_header)) - sizeof(struct ether_header); 989 990 data = mtod(m, u_int8_t *); 991 if (packetlen > 1) 992 bus_space_read_multi_stream_2(bst, bsh, DATA_REG_W, 993 (u_int16_t *)data, packetlen >> 1); 994 if (packetlen & 1) { 995 data += packetlen & ~1; 996 *data = bus_space_read_1(bst, bsh, DATA_REG_B); 997 } 998 999 ifp->if_ipackets++; 1000 1001 #if NBPFILTER > 0 1002 /* 1003 * Hand the packet off to bpf listeners. If there's a bpf listener, 1004 * we need to check if the packet is ours. 1005 */ 1006 if (ifp->if_bpf) 1007 bpf_mtap(ifp->if_bpf, m, BPF_DIRECTION_IN); 1008 #endif 1009 1010 m->m_pkthdr.len = m->m_len = packetlen; 1011 ether_input_mbuf(ifp, m); 1012 1013 out: 1014 /* 1015 * Tell the card to free the memory occupied by this packet. 1016 */ 1017 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY) 1018 /* XXX bound this loop! */ ; 1019 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE); 1020 1021 /* 1022 * Check for another packet. 1023 */ 1024 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W); 1025 if (packetno & FIFO_REMPTY) 1026 return; 1027 goto again; 1028 } 1029 1030 /* 1031 * Process an ioctl request. 1032 */ 1033 int 1034 smc91cxx_ioctl(ifp, cmd, data) 1035 struct ifnet *ifp; 1036 u_long cmd; 1037 caddr_t data; 1038 { 1039 struct smc91cxx_softc *sc = ifp->if_softc; 1040 struct ifaddr *ifa = (struct ifaddr *)data; 1041 struct ifreq *ifr = (struct ifreq *)data; 1042 int s, error = 0; 1043 1044 s = splnet(); 1045 1046 switch (cmd) { 1047 case SIOCSIFADDR: 1048 if ((error = smc91cxx_enable(sc)) != 0) 1049 break; 1050 ifp->if_flags |= IFF_UP; 1051 switch (ifa->ifa_addr->sa_family) { 1052 #ifdef INET 1053 case AF_INET: 1054 smc91cxx_init(sc); 1055 arp_ifinit(&sc->sc_arpcom, ifa); 1056 break; 1057 #endif 1058 default: 1059 smc91cxx_init(sc); 1060 break; 1061 } 1062 break; 1063 1064 case SIOCSIFFLAGS: 1065 if ((ifp->if_flags & IFF_UP) == 0 && 1066 (ifp->if_flags & IFF_RUNNING) != 0) { 1067 /* 1068 * If interface is marked down and it is running, 1069 * stop it. 1070 */ 1071 smc91cxx_stop(sc); 1072 ifp->if_flags &= ~IFF_RUNNING; 1073 smc91cxx_disable(sc); 1074 } else if ((ifp->if_flags & IFF_UP) != 0 && 1075 (ifp->if_flags & IFF_RUNNING) == 0) { 1076 /* 1077 * If interface is marked up and it is stopped, 1078 * start it. 1079 */ 1080 if ((error = smc91cxx_enable(sc)) != 0) 1081 break; 1082 smc91cxx_init(sc); 1083 } else if ((ifp->if_flags & IFF_UP) != 0) { 1084 /* 1085 * Reset the interface to pick up changes in any 1086 * other flags that affect hardware registers. 1087 */ 1088 smc91cxx_reset(sc); 1089 } 1090 break; 1091 1092 case SIOCGIFMEDIA: 1093 case SIOCSIFMEDIA: 1094 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1095 break; 1096 1097 default: 1098 error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data); 1099 } 1100 1101 if (error == ENETRESET) { 1102 if (ifp->if_flags & IFF_RUNNING) 1103 smc91cxx_reset(sc); 1104 error = 0; 1105 } 1106 1107 splx(s); 1108 return (error); 1109 } 1110 1111 /* 1112 * Reset the interface. 1113 */ 1114 void 1115 smc91cxx_reset(sc) 1116 struct smc91cxx_softc *sc; 1117 { 1118 int s; 1119 1120 s = splnet(); 1121 smc91cxx_stop(sc); 1122 smc91cxx_init(sc); 1123 splx(s); 1124 } 1125 1126 /* 1127 * Watchdog timer. 1128 */ 1129 void 1130 smc91cxx_watchdog(ifp) 1131 struct ifnet *ifp; 1132 { 1133 struct smc91cxx_softc *sc = ifp->if_softc; 1134 1135 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1136 ++sc->sc_arpcom.ac_if.if_oerrors; 1137 1138 smc91cxx_reset(sc); 1139 } 1140 1141 /* 1142 * Stop output on the interface. 1143 */ 1144 void 1145 smc91cxx_stop(sc) 1146 struct smc91cxx_softc *sc; 1147 { 1148 bus_space_tag_t bst = sc->sc_bst; 1149 bus_space_handle_t bsh = sc->sc_bsh; 1150 1151 /* 1152 * Clear interrupt mask; disable all interrupts. 1153 */ 1154 SMC_SELECT_BANK(sc, 2); 1155 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0); 1156 1157 /* 1158 * Disable transmitter and receiver. 1159 */ 1160 SMC_SELECT_BANK(sc, 0); 1161 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0); 1162 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0); 1163 1164 /* 1165 * Cancel watchdog timer. 1166 */ 1167 sc->sc_arpcom.ac_if.if_timer = 0; 1168 } 1169 1170 /* 1171 * Enable power on the interface. 1172 */ 1173 int 1174 smc91cxx_enable(sc) 1175 struct smc91cxx_softc *sc; 1176 { 1177 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0 && sc->sc_enable != NULL) { 1178 if ((*sc->sc_enable)(sc) != 0) { 1179 printf("%s: device enable failed\n", 1180 sc->sc_dev.dv_xname); 1181 return (EIO); 1182 } 1183 } 1184 1185 sc->sc_flags |= SMC_FLAGS_ENABLED; 1186 return (0); 1187 } 1188 1189 /* 1190 * Disable power on the interface. 1191 */ 1192 void 1193 smc91cxx_disable(sc) 1194 struct smc91cxx_softc *sc; 1195 { 1196 if ((sc->sc_flags & SMC_FLAGS_ENABLED) != 0 && sc->sc_disable != NULL) { 1197 (*sc->sc_disable)(sc); 1198 sc->sc_flags &= ~SMC_FLAGS_ENABLED; 1199 } 1200 } 1201 1202 int 1203 smc91cxx_activate(self, act) 1204 struct device *self; 1205 int act; 1206 { 1207 #if 0 1208 struct smc91cxx_softc *sc = (struct smc91cxx_softc *)self; 1209 #endif 1210 int rv = 0, s; 1211 1212 s = splnet(); 1213 switch (act) { 1214 case DVACT_DEACTIVATE: 1215 #if 0 1216 if_deactivate(&sc->sc_ic.ic_if); 1217 #endif 1218 break; 1219 } 1220 splx(s); 1221 return(rv); 1222 } 1223 1224 int 1225 smc91cxx_detach(self, flags) 1226 struct device *self; 1227 int flags; 1228 { 1229 struct smc91cxx_softc *sc = (struct smc91cxx_softc *)self; 1230 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1231 1232 /* Succeed now if there's no work to do. */ 1233 if ((sc->sc_flags & SMC_FLAGS_ATTACHED) == 0) 1234 return(0); 1235 1236 /* smc91cxx_disable() checks SMC_FLAGS_ENABLED */ 1237 smc91cxx_disable(sc); 1238 1239 /* smc91cxx_attach() never fails */ 1240 1241 /* Delete all media. */ 1242 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 1243 1244 #if NBPFILTER > 0 1245 bpfdetach(ifp); 1246 #endif 1247 ether_ifdetach(ifp); 1248 if_detach(ifp); 1249 1250 return (0); 1251 } 1252 1253 u_int32_t 1254 smc91cxx_mii_bitbang_read(self) 1255 struct device *self; 1256 { 1257 struct smc91cxx_softc *sc = (void *) self; 1258 1259 /* We're already in bank 3. */ 1260 return (bus_space_read_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W)); 1261 } 1262 1263 void 1264 smc91cxx_mii_bitbang_write(self, val) 1265 struct device *self; 1266 u_int32_t val; 1267 { 1268 struct smc91cxx_softc *sc = (void *) self; 1269 1270 /* We're already in bank 3. */ 1271 bus_space_write_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W, val); 1272 } 1273 1274 int 1275 smc91cxx_mii_readreg(self, phy, reg) 1276 struct device *self; 1277 int phy, reg; 1278 { 1279 struct smc91cxx_softc *sc = (void *) self; 1280 int val; 1281 1282 SMC_SELECT_BANK(sc, 3); 1283 1284 val = mii_bitbang_readreg(self, &smc91cxx_mii_bitbang_ops, phy, reg); 1285 1286 SMC_SELECT_BANK(sc, 2); 1287 1288 return (val); 1289 } 1290 1291 void 1292 smc91cxx_mii_writereg(self, phy, reg, val) 1293 struct device *self; 1294 int phy, reg, val; 1295 { 1296 struct smc91cxx_softc *sc = (void *) self; 1297 1298 SMC_SELECT_BANK(sc, 3); 1299 1300 mii_bitbang_writereg(self, &smc91cxx_mii_bitbang_ops, phy, reg, val); 1301 1302 SMC_SELECT_BANK(sc, 2); 1303 } 1304 1305 void 1306 smc91cxx_statchg(self) 1307 struct device *self; 1308 { 1309 struct smc91cxx_softc *sc = (struct smc91cxx_softc *)self; 1310 bus_space_tag_t bst = sc->sc_bst; 1311 bus_space_handle_t bsh = sc->sc_bsh; 1312 int mctl; 1313 1314 SMC_SELECT_BANK(sc, 0); 1315 mctl = bus_space_read_2(bst, bsh, TXMIT_CONTROL_REG_W); 1316 if (sc->sc_mii.mii_media_active & IFM_FDX) 1317 mctl |= TCR_SWFDUP; 1318 else 1319 mctl &= ~TCR_SWFDUP; 1320 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, mctl); 1321 SMC_SELECT_BANK(sc, 2); /* back to operating window */ 1322 } 1323 1324 /* 1325 * One second timer, used to tick the MII. 1326 */ 1327 void 1328 smc91cxx_tick(arg) 1329 void *arg; 1330 { 1331 struct smc91cxx_softc *sc = arg; 1332 int s; 1333 1334 #ifdef DIAGNOSTIC 1335 if ((sc->sc_flags & SMC_FLAGS_HAS_MII) == 0) 1336 panic("smc91cxx_tick"); 1337 #endif 1338 1339 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1340 return; 1341 1342 s = splnet(); 1343 mii_tick(&sc->sc_mii); 1344 splx(s); 1345 1346 timeout_add_sec(&sc->sc_mii_timeout, 1); 1347 } 1348