xref: /openbsd-src/sys/dev/ic/rt2560.c (revision 4c1e55dc91edd6e69ccc60ce855900fbc12cf34f)
1 /*	$OpenBSD: rt2560.c,v 1.60 2012/07/13 10:08:15 stsp Exp $  */
2 
3 /*-
4  * Copyright (c) 2005, 2006
5  *	Damien Bergamini <damien.bergamini@free.fr>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 /*-
21  * Ralink Technology RT2560 chipset driver
22  * http://www.ralinktech.com/
23  */
24 
25 #include "bpfilter.h"
26 
27 #include <sys/param.h>
28 #include <sys/sockio.h>
29 #include <sys/mbuf.h>
30 #include <sys/kernel.h>
31 #include <sys/socket.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/timeout.h>
35 #include <sys/conf.h>
36 #include <sys/device.h>
37 
38 #include <machine/bus.h>
39 #include <machine/endian.h>
40 #include <machine/intr.h>
41 
42 #if NBPFILTER > 0
43 #include <net/bpf.h>
44 #endif
45 #include <net/if.h>
46 #include <net/if_arp.h>
47 #include <net/if_dl.h>
48 #include <net/if_media.h>
49 #include <net/if_types.h>
50 
51 #include <netinet/in.h>
52 #include <netinet/in_systm.h>
53 #include <netinet/in_var.h>
54 #include <netinet/if_ether.h>
55 #include <netinet/ip.h>
56 
57 #include <net80211/ieee80211_var.h>
58 #include <net80211/ieee80211_amrr.h>
59 #include <net80211/ieee80211_radiotap.h>
60 
61 #include <dev/ic/rt2560reg.h>
62 #include <dev/ic/rt2560var.h>
63 
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcivar.h>
66 #include <dev/pci/pcidevs.h>
67 
68 #ifdef RAL_DEBUG
69 #define DPRINTF(x)	do { if (rt2560_debug > 0) printf x; } while (0)
70 #define DPRINTFN(n, x)	do { if (rt2560_debug >= (n)) printf x; } while (0)
71 int rt2560_debug = 1;
72 #else
73 #define DPRINTF(x)
74 #define DPRINTFN(n, x)
75 #endif
76 
77 int		rt2560_alloc_tx_ring(struct rt2560_softc *,
78 		    struct rt2560_tx_ring *, int);
79 void		rt2560_reset_tx_ring(struct rt2560_softc *,
80 		    struct rt2560_tx_ring *);
81 void		rt2560_free_tx_ring(struct rt2560_softc *,
82 		    struct rt2560_tx_ring *);
83 int		rt2560_alloc_rx_ring(struct rt2560_softc *,
84 		    struct rt2560_rx_ring *, int);
85 void		rt2560_reset_rx_ring(struct rt2560_softc *,
86 		    struct rt2560_rx_ring *);
87 void		rt2560_free_rx_ring(struct rt2560_softc *,
88 		    struct rt2560_rx_ring *);
89 struct		ieee80211_node *rt2560_node_alloc(struct ieee80211com *);
90 int		rt2560_media_change(struct ifnet *);
91 void		rt2560_next_scan(void *);
92 void		rt2560_iter_func(void *, struct ieee80211_node *);
93 void		rt2560_amrr_timeout(void *);
94 void		rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *,
95 		    int);
96 int		rt2560_newstate(struct ieee80211com *, enum ieee80211_state,
97 		    int);
98 uint16_t	rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
99 void		rt2560_encryption_intr(struct rt2560_softc *);
100 void		rt2560_tx_intr(struct rt2560_softc *);
101 void		rt2560_prio_intr(struct rt2560_softc *);
102 void		rt2560_decryption_intr(struct rt2560_softc *);
103 void		rt2560_rx_intr(struct rt2560_softc *);
104 #ifndef IEEE80211_STA_ONLY
105 void		rt2560_beacon_expire(struct rt2560_softc *);
106 #endif
107 void		rt2560_wakeup_expire(struct rt2560_softc *);
108 #if NBPFILTER > 0
109 uint8_t		rt2560_rxrate(const struct rt2560_rx_desc *);
110 #endif
111 int		rt2560_ack_rate(struct ieee80211com *, int);
112 uint16_t	rt2560_txtime(int, int, uint32_t);
113 uint8_t		rt2560_plcp_signal(int);
114 void		rt2560_setup_tx_desc(struct rt2560_softc *,
115 		    struct rt2560_tx_desc *, uint32_t, int, int, int,
116 		    bus_addr_t);
117 #ifndef IEEE80211_STA_ONLY
118 int		rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
119 		    struct ieee80211_node *);
120 #endif
121 int		rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
122 		    struct ieee80211_node *);
123 int		rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
124 		    struct ieee80211_node *);
125 void		rt2560_start(struct ifnet *);
126 void		rt2560_watchdog(struct ifnet *);
127 int		rt2560_ioctl(struct ifnet *, u_long, caddr_t);
128 void		rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t);
129 uint8_t		rt2560_bbp_read(struct rt2560_softc *, uint8_t);
130 void		rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t);
131 void		rt2560_set_chan(struct rt2560_softc *,
132 		    struct ieee80211_channel *);
133 void		rt2560_disable_rf_tune(struct rt2560_softc *);
134 void		rt2560_enable_tsf_sync(struct rt2560_softc *);
135 void		rt2560_update_plcp(struct rt2560_softc *);
136 void		rt2560_updateslot(struct ieee80211com *);
137 void		rt2560_set_slottime(struct rt2560_softc *);
138 void		rt2560_set_basicrates(struct rt2560_softc *);
139 void		rt2560_update_led(struct rt2560_softc *, int, int);
140 void		rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
141 void		rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
142 void		rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
143 void		rt2560_update_promisc(struct rt2560_softc *);
144 void		rt2560_set_txantenna(struct rt2560_softc *, int);
145 void		rt2560_set_rxantenna(struct rt2560_softc *, int);
146 const char	*rt2560_get_rf(int);
147 void		rt2560_read_eeprom(struct rt2560_softc *);
148 int		rt2560_bbp_init(struct rt2560_softc *);
149 int		rt2560_init(struct ifnet *);
150 void		rt2560_stop(struct ifnet *, int);
151 
152 static const struct {
153 	uint32_t	reg;
154 	uint32_t	val;
155 } rt2560_def_mac[] = {
156 	RT2560_DEF_MAC
157 };
158 
159 static const struct {
160 	uint8_t	reg;
161 	uint8_t	val;
162 } rt2560_def_bbp[] = {
163 	RT2560_DEF_BBP
164 };
165 
166 static const uint32_t rt2560_rf2522_r2[]    = RT2560_RF2522_R2;
167 static const uint32_t rt2560_rf2523_r2[]    = RT2560_RF2523_R2;
168 static const uint32_t rt2560_rf2524_r2[]    = RT2560_RF2524_R2;
169 static const uint32_t rt2560_rf2525_r2[]    = RT2560_RF2525_R2;
170 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2;
171 static const uint32_t rt2560_rf2525e_r2[]   = RT2560_RF2525E_R2;
172 static const uint32_t rt2560_rf2526_r2[]    = RT2560_RF2526_R2;
173 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2;
174 
175 int
176 rt2560_attach(void *xsc, int id)
177 {
178 	struct rt2560_softc *sc = xsc;
179 	struct ieee80211com *ic = &sc->sc_ic;
180 	struct ifnet *ifp = &ic->ic_if;
181 	int error, i;
182 
183 	sc->amrr.amrr_min_success_threshold =  1;
184 	sc->amrr.amrr_max_success_threshold = 15;
185 	timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc);
186 	timeout_set(&sc->scan_to, rt2560_next_scan, sc);
187 
188 	/* retrieve RT2560 rev. no */
189 	sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
190 
191 	/* retrieve MAC address */
192 	rt2560_get_macaddr(sc, ic->ic_myaddr);
193 	printf(", address %s\n", ether_sprintf(ic->ic_myaddr));
194 
195 	/* retrieve RF rev. no and various other things from EEPROM */
196 	rt2560_read_eeprom(sc);
197 
198 	printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname,
199 	    sc->asic_rev, rt2560_get_rf(sc->rf_rev));
200 
201 	/*
202 	 * Allocate Tx and Rx rings.
203 	 */
204 	error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
205 	if (error != 0) {
206 		printf("%s: could not allocate Tx ring\n",
207 		    sc->sc_dev.dv_xname);
208 		goto fail1;
209 	}
210 	error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
211 	if (error != 0) {
212 		printf("%s: could not allocate ATIM ring\n",
213 		    sc->sc_dev.dv_xname);
214 		goto fail2;
215 	}
216 	error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
217 	if (error != 0) {
218 		printf("%s: could not allocate Prio ring\n",
219 		    sc->sc_dev.dv_xname);
220 		goto fail3;
221 	}
222 	error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
223 	if (error != 0) {
224 		printf("%s: could not allocate Beacon ring\n",
225 		    sc->sc_dev.dv_xname);
226 		goto fail4;
227 	}
228 	error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
229 	if (error != 0) {
230 		printf("%s: could not allocate Rx ring\n",
231 		    sc->sc_dev.dv_xname);
232 		goto fail5;
233 	}
234 
235 	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
236 	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
237 	ic->ic_state = IEEE80211_S_INIT;
238 
239 	/* set device capabilities */
240 	ic->ic_caps =
241 	    IEEE80211_C_MONITOR |	/* monitor mode supported */
242 #ifndef IEEE80211_STA_ONLY
243 	    IEEE80211_C_IBSS |		/* IBSS mode supported */
244 	    IEEE80211_C_HOSTAP |	/* HostAp mode supported */
245 #endif
246 	    IEEE80211_C_TXPMGT |	/* tx power management */
247 	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
248 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
249 	    IEEE80211_C_WEP |		/* s/w WEP */
250 	    IEEE80211_C_RSN;		/* WPA/RSN */
251 
252 	/* set supported .11b and .11g rates */
253 	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
254 	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
255 
256 	/* set supported .11b and .11g channels (1 through 14) */
257 	for (i = 1; i <= 14; i++) {
258 		ic->ic_channels[i].ic_freq =
259 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
260 		ic->ic_channels[i].ic_flags =
261 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
262 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
263 	}
264 
265 	ifp->if_softc = sc;
266 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
267 	ifp->if_ioctl = rt2560_ioctl;
268 	ifp->if_start = rt2560_start;
269 	ifp->if_watchdog = rt2560_watchdog;
270 	IFQ_SET_READY(&ifp->if_snd);
271 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
272 
273 	if_attach(ifp);
274 	ieee80211_ifattach(ifp);
275 	ic->ic_node_alloc = rt2560_node_alloc;
276 	ic->ic_newassoc = rt2560_newassoc;
277 	ic->ic_updateslot = rt2560_updateslot;
278 
279 	/* override state transition machine */
280 	sc->sc_newstate = ic->ic_newstate;
281 	ic->ic_newstate = rt2560_newstate;
282 	ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status);
283 
284 #if NBPFILTER > 0
285 	bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
286 	    sizeof (struct ieee80211_frame) + 64);
287 
288 	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
289 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
290 	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
291 
292 	sc->sc_txtap_len = sizeof sc->sc_txtapu;
293 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
294 	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
295 #endif
296 	return 0;
297 
298 fail5:	rt2560_free_tx_ring(sc, &sc->bcnq);
299 fail4:	rt2560_free_tx_ring(sc, &sc->prioq);
300 fail3:	rt2560_free_tx_ring(sc, &sc->atimq);
301 fail2:	rt2560_free_tx_ring(sc, &sc->txq);
302 fail1:	return ENXIO;
303 }
304 
305 int
306 rt2560_detach(void *xsc)
307 {
308 	struct rt2560_softc *sc = xsc;
309 	struct ifnet *ifp = &sc->sc_ic.ic_if;
310 
311 	timeout_del(&sc->scan_to);
312 	timeout_del(&sc->amrr_to);
313 
314 	ieee80211_ifdetach(ifp);	/* free all nodes */
315 	if_detach(ifp);
316 
317 	rt2560_free_tx_ring(sc, &sc->txq);
318 	rt2560_free_tx_ring(sc, &sc->atimq);
319 	rt2560_free_tx_ring(sc, &sc->prioq);
320 	rt2560_free_tx_ring(sc, &sc->bcnq);
321 	rt2560_free_rx_ring(sc, &sc->rxq);
322 
323 	return 0;
324 }
325 
326 void
327 rt2560_suspend(void *xsc)
328 {
329 	struct rt2560_softc *sc = xsc;
330 	struct ifnet *ifp = &sc->sc_ic.ic_if;
331 
332 	if (ifp->if_flags & IFF_RUNNING)
333 		rt2560_stop(ifp, 1);
334 }
335 
336 void
337 rt2560_resume(void *xsc)
338 {
339 	struct rt2560_softc *sc = xsc;
340 	struct ifnet *ifp = &sc->sc_ic.ic_if;
341 
342 	if (ifp->if_flags & IFF_UP)
343 		rt2560_init(ifp);
344 }
345 
346 int
347 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
348     int count)
349 {
350 	int i, nsegs, error;
351 
352 	ring->count = count;
353 	ring->queued = 0;
354 	ring->cur = ring->next = 0;
355 	ring->cur_encrypt = ring->next_encrypt = 0;
356 
357 	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,
358 	    count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
359 	if (error != 0) {
360 		printf("%s: could not create desc DMA map\n",
361 		    sc->sc_dev.dv_xname);
362 		goto fail;
363 	}
364 
365 	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,
366 	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO);
367 	if (error != 0) {
368 		printf("%s: could not allocate DMA memory\n",
369 		    sc->sc_dev.dv_xname);
370 		goto fail;
371 	}
372 
373 	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
374 	    count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc,
375 	    BUS_DMA_NOWAIT);
376 	if (error != 0) {
377 		printf("%s: can't map desc DMA memory\n",
378 		    sc->sc_dev.dv_xname);
379 		goto fail;
380 	}
381 
382 	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
383 	    count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
384 	if (error != 0) {
385 		printf("%s: could not load desc DMA map\n",
386 		    sc->sc_dev.dv_xname);
387 		goto fail;
388 	}
389 
390 	ring->physaddr = ring->map->dm_segs->ds_addr;
391 
392 	ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
393 	    M_NOWAIT | M_ZERO);
394 	if (ring->data == NULL) {
395 		printf("%s: could not allocate soft data\n",
396 		    sc->sc_dev.dv_xname);
397 		error = ENOMEM;
398 		goto fail;
399 	}
400 
401 	for (i = 0; i < count; i++) {
402 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
403 		    RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
404 		    &ring->data[i].map);
405 		if (error != 0) {
406 			printf("%s: could not create DMA map\n",
407 			    sc->sc_dev.dv_xname);
408 			goto fail;
409 		}
410 	}
411 
412 	return 0;
413 
414 fail:	rt2560_free_tx_ring(sc, ring);
415 	return error;
416 }
417 
418 void
419 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
420 {
421 	int i;
422 
423 	for (i = 0; i < ring->count; i++) {
424 		struct rt2560_tx_desc *desc = &ring->desc[i];
425 		struct rt2560_tx_data *data = &ring->data[i];
426 
427 		if (data->m != NULL) {
428 			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
429 			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
430 			bus_dmamap_unload(sc->sc_dmat, data->map);
431 			m_freem(data->m);
432 			data->m = NULL;
433 		}
434 
435 		/*
436 		 * The node has already been freed at that point so don't call
437 		 * ieee80211_release_node() here.
438 		 */
439 		data->ni = NULL;
440 
441 		desc->flags = 0;
442 	}
443 
444 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
445 	    BUS_DMASYNC_PREWRITE);
446 
447 	ring->queued = 0;
448 	ring->cur = ring->next = 0;
449 	ring->cur_encrypt = ring->next_encrypt = 0;
450 }
451 
452 void
453 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
454 {
455 	int i;
456 
457 	if (ring->desc != NULL) {
458 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
459 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
460 		bus_dmamap_unload(sc->sc_dmat, ring->map);
461 		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
462 		    ring->count * RT2560_TX_DESC_SIZE);
463 		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
464 	}
465 
466 	if (ring->data != NULL) {
467 		for (i = 0; i < ring->count; i++) {
468 			struct rt2560_tx_data *data = &ring->data[i];
469 
470 			if (data->m != NULL) {
471 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
472 				    data->map->dm_mapsize,
473 				    BUS_DMASYNC_POSTWRITE);
474 				bus_dmamap_unload(sc->sc_dmat, data->map);
475 				m_freem(data->m);
476 			}
477 
478 			/*
479 			 * The node has already been freed at that point so
480 			 * don't call ieee80211_release_node() here.
481 			 */
482 			data->ni = NULL;
483 
484 			if (data->map != NULL)
485 				bus_dmamap_destroy(sc->sc_dmat, data->map);
486 		}
487 		free(ring->data, M_DEVBUF);
488 	}
489 }
490 
491 int
492 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
493     int count)
494 {
495 	int i, nsegs, error;
496 
497 	ring->count = count;
498 	ring->cur = ring->next = 0;
499 	ring->cur_decrypt = 0;
500 
501 	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,
502 	    count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
503 	if (error != 0) {
504 		printf("%s: could not create desc DMA map\n",
505 		    sc->sc_dev.dv_xname);
506 		goto fail;
507 	}
508 
509 	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,
510 	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO);
511 	if (error != 0) {
512 		printf("%s: could not allocate DMA memory\n",
513 		    sc->sc_dev.dv_xname);
514 		goto fail;
515 	}
516 
517 	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
518 	    count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc,
519 	    BUS_DMA_NOWAIT);
520 	if (error != 0) {
521 		printf("%s: can't map desc DMA memory\n",
522 		    sc->sc_dev.dv_xname);
523 		goto fail;
524 	}
525 
526 	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
527 	    count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
528 	if (error != 0) {
529 		printf("%s: could not load desc DMA map\n",
530 		    sc->sc_dev.dv_xname);
531 		goto fail;
532 	}
533 
534 	ring->physaddr = ring->map->dm_segs->ds_addr;
535 
536 	ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
537 	    M_NOWAIT | M_ZERO);
538 	if (ring->data == NULL) {
539 		printf("%s: could not allocate soft data\n",
540 		    sc->sc_dev.dv_xname);
541 		error = ENOMEM;
542 		goto fail;
543 	}
544 
545 	/*
546 	 * Pre-allocate Rx buffers and populate Rx ring.
547 	 */
548 	for (i = 0; i < count; i++) {
549 		struct rt2560_rx_desc *desc = &sc->rxq.desc[i];
550 		struct rt2560_rx_data *data = &sc->rxq.data[i];
551 
552 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
553 		    0, BUS_DMA_NOWAIT, &data->map);
554 		if (error != 0) {
555 			printf("%s: could not create DMA map\n",
556 			    sc->sc_dev.dv_xname);
557 			goto fail;
558 		}
559 
560 		MGETHDR(data->m, M_DONTWAIT, MT_DATA);
561 		if (data->m == NULL) {
562 			printf("%s: could not allocate rx mbuf\n",
563 			    sc->sc_dev.dv_xname);
564 			error = ENOMEM;
565 			goto fail;
566 		}
567 		MCLGET(data->m, M_DONTWAIT);
568 		if (!(data->m->m_flags & M_EXT)) {
569 			printf("%s: could not allocate rx mbuf cluster\n",
570 			    sc->sc_dev.dv_xname);
571 			error = ENOMEM;
572 			goto fail;
573 		}
574 
575 		error = bus_dmamap_load(sc->sc_dmat, data->map,
576 		    mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
577 		if (error != 0) {
578 			printf("%s: could not load rx buf DMA map",
579 			    sc->sc_dev.dv_xname);
580 			goto fail;
581 		}
582 
583 		desc->flags = htole32(RT2560_RX_BUSY);
584 		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
585 	}
586 
587 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
588 	    BUS_DMASYNC_PREWRITE);
589 
590 	return 0;
591 
592 fail:	rt2560_free_rx_ring(sc, ring);
593 	return error;
594 }
595 
596 void
597 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
598 {
599 	int i;
600 
601 	for (i = 0; i < ring->count; i++) {
602 		ring->desc[i].flags = htole32(RT2560_RX_BUSY);
603 		ring->data[i].drop = 0;
604 	}
605 
606 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
607 	    BUS_DMASYNC_PREWRITE);
608 
609 	ring->cur = ring->next = 0;
610 	ring->cur_decrypt = 0;
611 }
612 
613 void
614 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
615 {
616 	int i;
617 
618 	if (ring->desc != NULL) {
619 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
620 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
621 		bus_dmamap_unload(sc->sc_dmat, ring->map);
622 		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
623 		    ring->count * RT2560_RX_DESC_SIZE);
624 		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
625 	}
626 
627 	if (ring->data != NULL) {
628 		for (i = 0; i < ring->count; i++) {
629 			struct rt2560_rx_data *data = &ring->data[i];
630 
631 			if (data->m != NULL) {
632 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
633 				    data->map->dm_mapsize,
634 				    BUS_DMASYNC_POSTREAD);
635 				bus_dmamap_unload(sc->sc_dmat, data->map);
636 				m_freem(data->m);
637 			}
638 
639 			if (data->map != NULL)
640 				bus_dmamap_destroy(sc->sc_dmat, data->map);
641 		}
642 		free(ring->data, M_DEVBUF);
643 	}
644 }
645 
646 struct ieee80211_node *
647 rt2560_node_alloc(struct ieee80211com *ic)
648 {
649 	return malloc(sizeof (struct rt2560_node), M_DEVBUF,
650 	    M_NOWAIT | M_ZERO);
651 }
652 
653 int
654 rt2560_media_change(struct ifnet *ifp)
655 {
656 	int error;
657 
658 	error = ieee80211_media_change(ifp);
659 	if (error != ENETRESET)
660 		return error;
661 
662 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
663 		rt2560_init(ifp);
664 
665 	return 0;
666 }
667 
668 /*
669  * This function is called periodically (every 200ms) during scanning to
670  * switch from one channel to another.
671  */
672 void
673 rt2560_next_scan(void *arg)
674 {
675 	struct rt2560_softc *sc = arg;
676 	struct ieee80211com *ic = &sc->sc_ic;
677 	struct ifnet *ifp = &ic->ic_if;
678 	int s;
679 
680 	s = splnet();
681 	if (ic->ic_state == IEEE80211_S_SCAN)
682 		ieee80211_next_scan(ifp);
683 	splx(s);
684 }
685 
686 /*
687  * This function is called for each neighbor node.
688  */
689 void
690 rt2560_iter_func(void *arg, struct ieee80211_node *ni)
691 {
692 	struct rt2560_softc *sc = arg;
693 	struct rt2560_node *rn = (struct rt2560_node *)ni;
694 
695 	ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn);
696 }
697 
698 void
699 rt2560_amrr_timeout(void *arg)
700 {
701 	struct rt2560_softc *sc = arg;
702 	struct ieee80211com *ic = &sc->sc_ic;
703 	int s;
704 
705 	s = splnet();
706 	if (ic->ic_opmode == IEEE80211_M_STA)
707 		rt2560_iter_func(sc, ic->ic_bss);
708 #ifndef IEEE80211_STA_ONLY
709 	else
710 		ieee80211_iterate_nodes(ic, rt2560_iter_func, sc);
711 #endif
712 	splx(s);
713 
714 	timeout_add_msec(&sc->amrr_to, 500);
715 }
716 
717 void
718 rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
719 {
720 	struct rt2560_softc *sc = ic->ic_softc;
721 	int i;
722 
723 	ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn);
724 
725 	/* set rate to some reasonable initial value */
726 	for (i = ni->ni_rates.rs_nrates - 1;
727 	     i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
728 	     i--);
729 	ni->ni_txrate = i;
730 }
731 
732 int
733 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
734 {
735 	struct rt2560_softc *sc = ic->ic_if.if_softc;
736 	enum ieee80211_state ostate;
737 	struct ieee80211_node *ni;
738 	int error = 0;
739 
740 	ostate = ic->ic_state;
741 	timeout_del(&sc->scan_to);
742 	timeout_del(&sc->amrr_to);
743 
744 	switch (nstate) {
745 	case IEEE80211_S_INIT:
746 		if (ostate == IEEE80211_S_RUN) {
747 			/* abort TSF synchronization */
748 			RAL_WRITE(sc, RT2560_CSR14, 0);
749 
750 			/* turn association led off */
751 			rt2560_update_led(sc, 0, 0);
752 		}
753 		break;
754 
755 	case IEEE80211_S_SCAN:
756 		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
757 		timeout_add_msec(&sc->scan_to, 200);
758 		break;
759 
760 	case IEEE80211_S_AUTH:
761 		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
762 		break;
763 
764 	case IEEE80211_S_ASSOC:
765 		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
766 		break;
767 
768 	case IEEE80211_S_RUN:
769 		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
770 
771 		ni = ic->ic_bss;
772 
773 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
774 			rt2560_update_plcp(sc);
775 			rt2560_set_slottime(sc);
776 			rt2560_set_basicrates(sc);
777 			rt2560_set_bssid(sc, ni->ni_bssid);
778 		}
779 
780 #ifndef IEEE80211_STA_ONLY
781 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
782 		    ic->ic_opmode == IEEE80211_M_IBSS) {
783 			struct mbuf *m = ieee80211_beacon_alloc(ic, ni);
784 			if (m == NULL) {
785 				printf("%s: could not allocate beacon\n",
786 				    sc->sc_dev.dv_xname);
787 				error = ENOBUFS;
788 				break;
789 			}
790 
791 			error = rt2560_tx_bcn(sc, m, ni);
792 			if (error != 0)
793 				break;
794 		}
795 #endif
796 
797 		/* turn assocation led on */
798 		rt2560_update_led(sc, 1, 0);
799 
800 		if (ic->ic_opmode == IEEE80211_M_STA) {
801 			/* fake a join to init the tx rate */
802 			rt2560_newassoc(ic, ni, 1);
803 		}
804 
805 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
806 			/* start automatic rate control timer */
807 			if (ic->ic_fixed_rate == -1)
808 				timeout_add_msec(&sc->amrr_to, 500);
809 
810 			rt2560_enable_tsf_sync(sc);
811 		}
812 		break;
813 	}
814 
815 	return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
816 }
817 
818 /*
819  * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
820  * 93C66).
821  */
822 uint16_t
823 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
824 {
825 	uint32_t tmp;
826 	uint16_t val;
827 	int n;
828 
829 	/* clock C once before the first command */
830 	RT2560_EEPROM_CTL(sc, 0);
831 
832 	RT2560_EEPROM_CTL(sc, RT2560_S);
833 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
834 	RT2560_EEPROM_CTL(sc, RT2560_S);
835 
836 	/* write start bit (1) */
837 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
838 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
839 
840 	/* write READ opcode (10) */
841 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
842 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
843 	RT2560_EEPROM_CTL(sc, RT2560_S);
844 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
845 
846 	/* write address (A5-A0 or A7-A0) */
847 	n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
848 	for (; n >= 0; n--) {
849 		RT2560_EEPROM_CTL(sc, RT2560_S |
850 		    (((addr >> n) & 1) << RT2560_SHIFT_D));
851 		RT2560_EEPROM_CTL(sc, RT2560_S |
852 		    (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
853 	}
854 
855 	RT2560_EEPROM_CTL(sc, RT2560_S);
856 
857 	/* read data Q15-Q0 */
858 	val = 0;
859 	for (n = 15; n >= 0; n--) {
860 		RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
861 		tmp = RAL_READ(sc, RT2560_CSR21);
862 		val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
863 		RT2560_EEPROM_CTL(sc, RT2560_S);
864 	}
865 
866 	RT2560_EEPROM_CTL(sc, 0);
867 
868 	/* clear Chip Select and clock C */
869 	RT2560_EEPROM_CTL(sc, RT2560_S);
870 	RT2560_EEPROM_CTL(sc, 0);
871 	RT2560_EEPROM_CTL(sc, RT2560_C);
872 
873 	return val;
874 }
875 
876 /*
877  * Some frames were processed by the hardware cipher engine and are ready for
878  * transmission.
879  */
880 void
881 rt2560_encryption_intr(struct rt2560_softc *sc)
882 {
883 	int hw;
884 
885 	/* retrieve last descriptor index processed by cipher engine */
886 	hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) /
887 	    RT2560_TX_DESC_SIZE;
888 
889 	for (; sc->txq.next_encrypt != hw;) {
890 		struct rt2560_tx_desc *desc =
891 		    &sc->txq.desc[sc->txq.next_encrypt];
892 
893 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
894 		    sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
895 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
896 
897 		if (letoh32(desc->flags) &
898 		    (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY))
899 			break;
900 
901 		/* for TKIP, swap eiv field to fix a bug in ASIC */
902 		if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) ==
903 		    RT2560_TX_CIPHER_TKIP)
904 			desc->eiv = swap32(desc->eiv);
905 
906 		/* mark the frame ready for transmission */
907 		desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
908 
909 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
910 		    sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
911 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
912 
913 		DPRINTFN(15, ("encryption done idx=%u\n",
914 		    sc->txq.next_encrypt));
915 
916 		sc->txq.next_encrypt =
917 		    (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
918 	}
919 
920 	/* kick Tx */
921 	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
922 }
923 
924 void
925 rt2560_tx_intr(struct rt2560_softc *sc)
926 {
927 	struct ieee80211com *ic = &sc->sc_ic;
928 	struct ifnet *ifp = &ic->ic_if;
929 
930 	for (;;) {
931 		struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next];
932 		struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next];
933 		struct rt2560_node *rn;
934 
935 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
936 		    sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
937 		    BUS_DMASYNC_POSTREAD);
938 
939 		if ((letoh32(desc->flags) & RT2560_TX_BUSY) ||
940 		    (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) ||
941 		    !(letoh32(desc->flags) & RT2560_TX_VALID))
942 			break;
943 
944 		rn = (struct rt2560_node *)data->ni;
945 
946 		switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) {
947 		case RT2560_TX_SUCCESS:
948 			DPRINTFN(10, ("data frame sent successfully\n"));
949 			rn->amn.amn_txcnt++;
950 			ifp->if_opackets++;
951 			break;
952 
953 		case RT2560_TX_SUCCESS_RETRY:
954 			DPRINTFN(9, ("data frame sent after %u retries\n",
955 			    (letoh32(desc->flags) >> 5) & 0x7));
956 			rn->amn.amn_txcnt++;
957 			rn->amn.amn_retrycnt++;
958 			ifp->if_opackets++;
959 			break;
960 
961 		case RT2560_TX_FAIL_RETRY:
962 			DPRINTFN(9, ("sending data frame failed (too much "
963 			    "retries)\n"));
964 			rn->amn.amn_txcnt++;
965 			rn->amn.amn_retrycnt++;
966 			ifp->if_oerrors++;
967 			break;
968 
969 		case RT2560_TX_FAIL_INVALID:
970 		case RT2560_TX_FAIL_OTHER:
971 		default:
972 			printf("%s: sending data frame failed 0x%08x\n",
973 			    sc->sc_dev.dv_xname, letoh32(desc->flags));
974 			ifp->if_oerrors++;
975 		}
976 
977 		/* descriptor is no longer valid */
978 		desc->flags &= ~htole32(RT2560_TX_VALID);
979 
980 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
981 		    sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
982 		    BUS_DMASYNC_PREWRITE);
983 
984 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
985 		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
986 		bus_dmamap_unload(sc->sc_dmat, data->map);
987 		m_freem(data->m);
988 		data->m = NULL;
989 		ieee80211_release_node(ic, data->ni);
990 		data->ni = NULL;
991 
992 		DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
993 
994 		sc->txq.queued--;
995 		sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
996 	}
997 
998 	if (sc->txq.queued == 0 && sc->prioq.queued == 0)
999 		sc->sc_tx_timer = 0;
1000 	if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) {
1001 		sc->sc_flags &= ~RT2560_DATA_OACTIVE;
1002 		if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE)))
1003 			ifp->if_flags &= ~IFF_OACTIVE;
1004 		rt2560_start(ifp);
1005 	}
1006 }
1007 
1008 void
1009 rt2560_prio_intr(struct rt2560_softc *sc)
1010 {
1011 	struct ieee80211com *ic = &sc->sc_ic;
1012 	struct ifnet *ifp = &ic->ic_if;
1013 
1014 	for (;;) {
1015 		struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next];
1016 		struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next];
1017 
1018 		bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1019 		    sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1020 		    BUS_DMASYNC_POSTREAD);
1021 
1022 		if ((letoh32(desc->flags) & RT2560_TX_BUSY) ||
1023 		    !(letoh32(desc->flags) & RT2560_TX_VALID))
1024 			break;
1025 
1026 		switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) {
1027 		case RT2560_TX_SUCCESS:
1028 			DPRINTFN(10, ("mgt frame sent successfully\n"));
1029 			break;
1030 
1031 		case RT2560_TX_SUCCESS_RETRY:
1032 			DPRINTFN(9, ("mgt frame sent after %u retries\n",
1033 			    (letoh32(desc->flags) >> 5) & 0x7));
1034 			break;
1035 
1036 		case RT2560_TX_FAIL_RETRY:
1037 			DPRINTFN(9, ("sending mgt frame failed (too much "
1038 			    "retries)\n"));
1039 			break;
1040 
1041 		case RT2560_TX_FAIL_INVALID:
1042 		case RT2560_TX_FAIL_OTHER:
1043 		default:
1044 			printf("%s: sending mgt frame failed 0x%08x\n",
1045 			    sc->sc_dev.dv_xname, letoh32(desc->flags));
1046 		}
1047 
1048 		/* descriptor is no longer valid */
1049 		desc->flags &= ~htole32(RT2560_TX_VALID);
1050 
1051 		bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1052 		    sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1053 		    BUS_DMASYNC_PREWRITE);
1054 
1055 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1056 		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1057 		bus_dmamap_unload(sc->sc_dmat, data->map);
1058 		m_freem(data->m);
1059 		data->m = NULL;
1060 		ieee80211_release_node(ic, data->ni);
1061 		data->ni = NULL;
1062 
1063 		DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1064 
1065 		sc->prioq.queued--;
1066 		sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1067 	}
1068 
1069 	if (sc->txq.queued == 0 && sc->prioq.queued == 0)
1070 		sc->sc_tx_timer = 0;
1071 	if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) {
1072 		sc->sc_flags &= ~RT2560_PRIO_OACTIVE;
1073 		if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE)))
1074 			ifp->if_flags &= ~IFF_OACTIVE;
1075 		rt2560_start(ifp);
1076 	}
1077 }
1078 
1079 /*
1080  * Some frames were processed by the hardware cipher engine and are ready for
1081  * transmission to the IEEE802.11 layer.
1082  */
1083 void
1084 rt2560_decryption_intr(struct rt2560_softc *sc)
1085 {
1086 	struct ieee80211com *ic = &sc->sc_ic;
1087 	struct ifnet *ifp = &ic->ic_if;
1088 	struct ieee80211_frame *wh;
1089 	struct ieee80211_rxinfo rxi;
1090 	struct ieee80211_node *ni;
1091 	struct mbuf *mnew, *m;
1092 	int hw, error;
1093 
1094 	/* retrieve last decriptor index processed by cipher engine */
1095 	hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
1096 	    RT2560_RX_DESC_SIZE;
1097 
1098 	for (; sc->rxq.cur_decrypt != hw;) {
1099 		struct rt2560_rx_desc *desc =
1100 		    &sc->rxq.desc[sc->rxq.cur_decrypt];
1101 		struct rt2560_rx_data *data =
1102 		    &sc->rxq.data[sc->rxq.cur_decrypt];
1103 
1104 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1105 		    sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1106 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1107 
1108 		if (letoh32(desc->flags) &
1109 		    (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1110 			break;
1111 
1112 		if (data->drop) {
1113 			ifp->if_ierrors++;
1114 			goto skip;
1115 		}
1116 
1117 		if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1118 		    (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) {
1119 			ifp->if_ierrors++;
1120 			goto skip;
1121 		}
1122 
1123 		/*
1124 		 * Try to allocate a new mbuf for this ring element and load it
1125 		 * before processing the current mbuf.  If the ring element
1126 		 * cannot be loaded, drop the received packet and reuse the old
1127 		 * mbuf.  In the unlikely case that the old mbuf can't be
1128 		 * reloaded either, explicitly panic.
1129 		 */
1130 		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1131 		if (mnew == NULL) {
1132 			ifp->if_ierrors++;
1133 			goto skip;
1134 		}
1135 		MCLGET(mnew, M_DONTWAIT);
1136 		if (!(mnew->m_flags & M_EXT)) {
1137 			m_freem(mnew);
1138 			ifp->if_ierrors++;
1139 			goto skip;
1140 		}
1141 
1142 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1143 		    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1144 		bus_dmamap_unload(sc->sc_dmat, data->map);
1145 
1146 		error = bus_dmamap_load(sc->sc_dmat, data->map,
1147 		    mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
1148 		if (error != 0) {
1149 			m_freem(mnew);
1150 
1151 			/* try to reload the old mbuf */
1152 			error = bus_dmamap_load(sc->sc_dmat, data->map,
1153 			    mtod(data->m, void *), MCLBYTES, NULL,
1154 			    BUS_DMA_NOWAIT);
1155 			if (error != 0) {
1156 				/* very unlikely that it will fail... */
1157 				panic("%s: could not load old rx mbuf",
1158 				    sc->sc_dev.dv_xname);
1159 			}
1160 			/* physical address may have changed */
1161 			desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1162 			ifp->if_ierrors++;
1163 			goto skip;
1164 		}
1165 
1166 		/*
1167 		 * New mbuf successfully loaded, update Rx ring and continue
1168 		 * processing.
1169 		 */
1170 		m = data->m;
1171 		data->m = mnew;
1172 		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1173 
1174 		/* finalize mbuf */
1175 		m->m_pkthdr.rcvif = ifp;
1176 		m->m_pkthdr.len = m->m_len =
1177 		    (letoh32(desc->flags) >> 16) & 0xfff;
1178 
1179 #if NBPFILTER > 0
1180 		if (sc->sc_drvbpf != NULL) {
1181 			struct mbuf mb;
1182 			struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1183 			uint32_t tsf_lo, tsf_hi;
1184 
1185 			/* get timestamp (low and high 32 bits) */
1186 			tsf_hi = RAL_READ(sc, RT2560_CSR17);
1187 			tsf_lo = RAL_READ(sc, RT2560_CSR16);
1188 
1189 			tap->wr_tsf =
1190 			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1191 			tap->wr_flags = 0;
1192 			tap->wr_rate = rt2560_rxrate(desc);
1193 			tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1194 			tap->wr_chan_flags =
1195 			    htole16(ic->ic_ibss_chan->ic_flags);
1196 			tap->wr_antenna = sc->rx_ant;
1197 			tap->wr_antsignal = desc->rssi;
1198 
1199 			mb.m_data = (caddr_t)tap;
1200 			mb.m_len = sc->sc_txtap_len;
1201 			mb.m_next = m;
1202 			mb.m_nextpkt = NULL;
1203 			mb.m_type = 0;
1204 			mb.m_flags = 0;
1205 			bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
1206 		}
1207 #endif
1208 		wh = mtod(m, struct ieee80211_frame *);
1209 		ni = ieee80211_find_rxnode(ic, wh);
1210 
1211 		/* send the frame to the 802.11 layer */
1212 		rxi.rxi_flags = 0;
1213 		rxi.rxi_rssi = desc->rssi;
1214 		rxi.rxi_tstamp = 0;	/* unused */
1215 		ieee80211_input(ifp, m, ni, &rxi);
1216 
1217 		/* node is no longer needed */
1218 		ieee80211_release_node(ic, ni);
1219 
1220 skip:		desc->flags = htole32(RT2560_RX_BUSY);
1221 
1222 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1223 		    sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1224 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1225 
1226 		DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1227 
1228 		sc->rxq.cur_decrypt =
1229 		    (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1230 	}
1231 }
1232 
1233 /*
1234  * Some frames were received. Pass them to the hardware cipher engine before
1235  * sending them to the 802.11 layer.
1236  */
1237 void
1238 rt2560_rx_intr(struct rt2560_softc *sc)
1239 {
1240 	for (;;) {
1241 		struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur];
1242 		struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1243 
1244 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1245 		    sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1246 		    BUS_DMASYNC_POSTREAD);
1247 
1248 		if (letoh32(desc->flags) &
1249 		    (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1250 			break;
1251 
1252 		data->drop = 0;
1253 
1254 		if (letoh32(desc->flags) &
1255 		    (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) {
1256 			/*
1257 			 * This should not happen since we did not request
1258 			 * to receive those frames when we filled RXCSR0.
1259 			 */
1260 			DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1261 			    letoh32(desc->flags)));
1262 			data->drop = 1;
1263 		}
1264 
1265 		if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1266 			DPRINTFN(5, ("bad length\n"));
1267 			data->drop = 1;
1268 		}
1269 
1270 		/* mark the frame for decryption */
1271 		desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1272 
1273 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1274 		    sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1275 		    BUS_DMASYNC_PREWRITE);
1276 
1277 		DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1278 
1279 		sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1280 	}
1281 
1282 	/* kick decrypt */
1283 	RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1284 }
1285 
1286 #ifndef IEEE80211_STA_ONLY
1287 /*
1288  * This function is called in HostAP or IBSS modes when it's time to send a
1289  * new beacon (every ni_intval milliseconds).
1290  */
1291 void
1292 rt2560_beacon_expire(struct rt2560_softc *sc)
1293 {
1294 	struct ieee80211com *ic = &sc->sc_ic;
1295 	struct rt2560_tx_data *data;
1296 
1297 	if (ic->ic_opmode != IEEE80211_M_IBSS &&
1298 	    ic->ic_opmode != IEEE80211_M_HOSTAP)
1299 		return;
1300 
1301 	data = &sc->bcnq.data[sc->bcnq.next];
1302 
1303 	if (sc->sc_flags & RT2560_UPDATE_SLOT) {
1304 		sc->sc_flags &= ~RT2560_UPDATE_SLOT;
1305 		sc->sc_flags |= RT2560_SET_SLOTTIME;
1306 	} else if (sc->sc_flags & RT2560_SET_SLOTTIME) {
1307 		sc->sc_flags &= ~RT2560_SET_SLOTTIME;
1308 		rt2560_set_slottime(sc);
1309 	}
1310 
1311 	if (ic->ic_curmode == IEEE80211_MODE_11G) {
1312 		/* update ERP Information Element */
1313 		*sc->erp = ic->ic_bss->ni_erp;
1314 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1315 		    data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1316 	}
1317 
1318 #if defined(RT2560_DEBUG) && NBPFILTER > 0
1319 	if (ic->ic_rawbpf != NULL)
1320 		bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT);
1321 #endif
1322 
1323 	DPRINTFN(15, ("beacon expired\n"));
1324 }
1325 #endif
1326 
1327 void
1328 rt2560_wakeup_expire(struct rt2560_softc *sc)
1329 {
1330 	DPRINTFN(15, ("wakeup expired\n"));
1331 }
1332 
1333 int
1334 rt2560_intr(void *arg)
1335 {
1336 	struct rt2560_softc *sc = arg;
1337 	struct ifnet *ifp = &sc->sc_ic.ic_if;
1338 	uint32_t r;
1339 
1340 	r = RAL_READ(sc, RT2560_CSR7);
1341 	if (__predict_false(r == 0xffffffff))
1342 		return 0;	/* device likely went away */
1343 	if (r == 0)
1344 		return 0;	/* not for us */
1345 
1346 	/* disable interrupts */
1347 	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1348 
1349 	/* acknowledge interrupts */
1350 	RAL_WRITE(sc, RT2560_CSR7, r);
1351 
1352 	/* don't re-enable interrupts if we're shutting down */
1353 	if (!(ifp->if_flags & IFF_RUNNING))
1354 		return 0;
1355 
1356 #ifndef IEEE80211_STA_ONLY
1357 	if (r & RT2560_BEACON_EXPIRE)
1358 		rt2560_beacon_expire(sc);
1359 #endif
1360 
1361 	if (r & RT2560_WAKEUP_EXPIRE)
1362 		rt2560_wakeup_expire(sc);
1363 
1364 	if (r & RT2560_ENCRYPTION_DONE)
1365 		rt2560_encryption_intr(sc);
1366 
1367 	if (r & RT2560_TX_DONE)
1368 		rt2560_tx_intr(sc);
1369 
1370 	if (r & RT2560_PRIO_DONE)
1371 		rt2560_prio_intr(sc);
1372 
1373 	if (r & RT2560_DECRYPTION_DONE)
1374 		rt2560_decryption_intr(sc);
1375 
1376 	if (r & RT2560_RX_DONE)
1377 		rt2560_rx_intr(sc);
1378 
1379 	/* re-enable interrupts */
1380 	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1381 
1382 	return 1;
1383 }
1384 
1385 /* quickly determine if a given rate is CCK or OFDM */
1386 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1387 
1388 #define RAL_ACK_SIZE	14	/* 10 + 4(FCS) */
1389 #define RAL_CTS_SIZE	14	/* 10 + 4(FCS) */
1390 
1391 #define RAL_SIFS		10	/* us */
1392 
1393 #define RT2560_RXTX_TURNAROUND	10	/* us */
1394 
1395 /*
1396  * This function is only used by the Rx radiotap code. It returns the rate at
1397  * which a given frame was received.
1398  */
1399 #if NBPFILTER > 0
1400 uint8_t
1401 rt2560_rxrate(const struct rt2560_rx_desc *desc)
1402 {
1403 	if (letoh32(desc->flags) & RT2560_RX_OFDM) {
1404 		/* reverse function of rt2560_plcp_signal */
1405 		switch (desc->rate) {
1406 		case 0xb:	return 12;
1407 		case 0xf:	return 18;
1408 		case 0xa:	return 24;
1409 		case 0xe:	return 36;
1410 		case 0x9:	return 48;
1411 		case 0xd:	return 72;
1412 		case 0x8:	return 96;
1413 		case 0xc:	return 108;
1414 		}
1415 	} else {
1416 		if (desc->rate == 10)
1417 			return 2;
1418 		if (desc->rate == 20)
1419 			return 4;
1420 		if (desc->rate == 55)
1421 			return 11;
1422 		if (desc->rate == 110)
1423 			return 22;
1424 	}
1425 	return 2;	/* should not get there */
1426 }
1427 #endif
1428 
1429 /*
1430  * Return the expected ack rate for a frame transmitted at rate `rate'.
1431  */
1432 int
1433 rt2560_ack_rate(struct ieee80211com *ic, int rate)
1434 {
1435 	switch (rate) {
1436 	/* CCK rates */
1437 	case 2:
1438 		return 2;
1439 	case 4:
1440 	case 11:
1441 	case 22:
1442 		return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1443 
1444 	/* OFDM rates */
1445 	case 12:
1446 	case 18:
1447 		return 12;
1448 	case 24:
1449 	case 36:
1450 		return 24;
1451 	case 48:
1452 	case 72:
1453 	case 96:
1454 	case 108:
1455 		return 48;
1456 	}
1457 
1458 	/* default to 1Mbps */
1459 	return 2;
1460 }
1461 
1462 /*
1463  * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1464  * The function automatically determines the operating mode depending on the
1465  * given rate. `flags' indicates whether short preamble is in use or not.
1466  */
1467 uint16_t
1468 rt2560_txtime(int len, int rate, uint32_t flags)
1469 {
1470 	uint16_t txtime;
1471 
1472 	if (RAL_RATE_IS_OFDM(rate)) {
1473 		/* IEEE Std 802.11g-2003, pp. 44 */
1474 		txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1475 		txtime = 16 + 4 + 4 * txtime + 6;
1476 	} else {
1477 		/* IEEE Std 802.11b-1999, pp. 28 */
1478 		txtime = (16 * len + rate - 1) / rate;
1479 		if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1480 			txtime +=  72 + 24;
1481 		else
1482 			txtime += 144 + 48;
1483 	}
1484 	return txtime;
1485 }
1486 
1487 uint8_t
1488 rt2560_plcp_signal(int rate)
1489 {
1490 	switch (rate) {
1491 	/* CCK rates (returned values are device-dependent) */
1492 	case 2:		return 0x0;
1493 	case 4:		return 0x1;
1494 	case 11:	return 0x2;
1495 	case 22:	return 0x3;
1496 
1497 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1498 	case 12:	return 0xb;
1499 	case 18:	return 0xf;
1500 	case 24:	return 0xa;
1501 	case 36:	return 0xe;
1502 	case 48:	return 0x9;
1503 	case 72:	return 0xd;
1504 	case 96:	return 0x8;
1505 	case 108:	return 0xc;
1506 
1507 	/* unsupported rates (should not get there) */
1508 	default:	return 0xff;
1509 	}
1510 }
1511 
1512 void
1513 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1514     uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1515 {
1516 	struct ieee80211com *ic = &sc->sc_ic;
1517 	uint16_t plcp_length;
1518 	int remainder;
1519 
1520 	desc->flags = htole32(flags);
1521 	desc->flags |= htole32(len << 16);
1522 	desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) :
1523 	    htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1524 
1525 	desc->physaddr = htole32(physaddr);
1526 	desc->wme = htole16(
1527 	    RT2560_AIFSN(2) |
1528 	    RT2560_LOGCWMIN(3) |
1529 	    RT2560_LOGCWMAX(8));
1530 
1531 	/* setup PLCP fields */
1532 	desc->plcp_signal  = rt2560_plcp_signal(rate);
1533 	desc->plcp_service = 4;
1534 
1535 	len += IEEE80211_CRC_LEN;
1536 	if (RAL_RATE_IS_OFDM(rate)) {
1537 		desc->flags |= htole32(RT2560_TX_OFDM);
1538 
1539 		plcp_length = len & 0xfff;
1540 		desc->plcp_length_hi = plcp_length >> 6;
1541 		desc->plcp_length_lo = plcp_length & 0x3f;
1542 	} else {
1543 		plcp_length = (16 * len + rate - 1) / rate;
1544 		if (rate == 22) {
1545 			remainder = (16 * len) % 22;
1546 			if (remainder != 0 && remainder < 7)
1547 				desc->plcp_service |= RT2560_PLCP_LENGEXT;
1548 		}
1549 		desc->plcp_length_hi = plcp_length >> 8;
1550 		desc->plcp_length_lo = plcp_length & 0xff;
1551 
1552 		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1553 			desc->plcp_signal |= 0x08;
1554 	}
1555 }
1556 
1557 #ifndef IEEE80211_STA_ONLY
1558 int
1559 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1560     struct ieee80211_node *ni)
1561 {
1562 	struct ieee80211com *ic = &sc->sc_ic;
1563 	struct rt2560_tx_desc *desc;
1564 	struct rt2560_tx_data *data;
1565 	int rate = 2, error;
1566 
1567 	desc = &sc->bcnq.desc[sc->bcnq.cur];
1568 	data = &sc->bcnq.data[sc->bcnq.cur];
1569 
1570 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1571 	    BUS_DMA_NOWAIT);
1572 	if (error != 0) {
1573 		printf("%s: can't map mbuf (error %d)\n",
1574 		    sc->sc_dev.dv_xname, error);
1575 		m_freem(m0);
1576 		return error;
1577 	}
1578 
1579 	data->m = m0;
1580 	data->ni = ni;
1581 
1582 	rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1583 	    RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0,
1584 	    data->map->dm_segs->ds_addr);
1585 
1586 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1587 	    BUS_DMASYNC_PREWRITE);
1588 	bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,
1589 	    sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1590 	    BUS_DMASYNC_PREWRITE);
1591 
1592 	/*
1593 	 * Store pointer to ERP Information Element so that we can update it
1594 	 * dynamically when the slot time changes.
1595 	 * XXX: this is ugly since it depends on how net80211 builds beacon
1596 	 * frames but ieee80211_beacon_alloc() don't store offsets for us.
1597 	 */
1598 	if (ic->ic_curmode == IEEE80211_MODE_11G) {
1599 		sc->erp =
1600 		    mtod(m0, uint8_t *) +
1601 		    sizeof (struct ieee80211_frame) +
1602 		    8 + 2 + 2 +
1603 		    ((ic->ic_flags & IEEE80211_F_HIDENWID) ?
1604 			1 : 2 + ni->ni_esslen) +
1605 		    2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) +
1606 		    2 + 1 +
1607 		    ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) +
1608 		    2;
1609 	}
1610 
1611 	return 0;
1612 }
1613 #endif
1614 
1615 int
1616 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1617     struct ieee80211_node *ni)
1618 {
1619 	struct ieee80211com *ic = &sc->sc_ic;
1620 	struct rt2560_tx_desc *desc;
1621 	struct rt2560_tx_data *data;
1622 	struct ieee80211_frame *wh;
1623 	uint16_t dur;
1624 	uint32_t flags = 0;
1625 	int rate = 2, error;
1626 
1627 	desc = &sc->prioq.desc[sc->prioq.cur];
1628 	data = &sc->prioq.data[sc->prioq.cur];
1629 
1630 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1631 	    BUS_DMA_NOWAIT);
1632 	if (error != 0) {
1633 		printf("%s: can't map mbuf (error %d)\n",
1634 		    sc->sc_dev.dv_xname, error);
1635 		m_freem(m0);
1636 		return error;
1637 	}
1638 
1639 #if NBPFILTER > 0
1640 	if (sc->sc_drvbpf != NULL) {
1641 		struct mbuf mb;
1642 		struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1643 
1644 		tap->wt_flags = 0;
1645 		tap->wt_rate = rate;
1646 		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1647 		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1648 		tap->wt_antenna = sc->tx_ant;
1649 
1650 		mb.m_data = (caddr_t)tap;
1651 		mb.m_len = sc->sc_txtap_len;
1652 		mb.m_next = m0;
1653 		mb.m_nextpkt = NULL;
1654 		mb.m_type = 0;
1655 		mb.m_flags = 0;
1656 		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1657 	}
1658 #endif
1659 
1660 	data->m = m0;
1661 	data->ni = ni;
1662 
1663 	wh = mtod(m0, struct ieee80211_frame *);
1664 
1665 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1666 		flags |= RT2560_TX_NEED_ACK;
1667 
1668 		dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1669 		    RAL_SIFS;
1670 		*(uint16_t *)wh->i_dur = htole16(dur);
1671 
1672 #ifndef IEEE80211_STA_ONLY
1673 		/* tell hardware to set timestamp for probe responses */
1674 		if ((wh->i_fc[0] &
1675 		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1676 		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1677 			flags |= RT2560_TX_TIMESTAMP;
1678 #endif
1679 	}
1680 
1681 	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1682 	    data->map->dm_segs->ds_addr);
1683 
1684 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1685 	    BUS_DMASYNC_PREWRITE);
1686 	bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1687 	    sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1688 	    BUS_DMASYNC_PREWRITE);
1689 
1690 	DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1691 	    m0->m_pkthdr.len, sc->prioq.cur, rate));
1692 
1693 	/* kick prio */
1694 	sc->prioq.queued++;
1695 	sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1696 	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1697 
1698 	return 0;
1699 }
1700 
1701 int
1702 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1703     struct ieee80211_node *ni)
1704 {
1705 	struct ieee80211com *ic = &sc->sc_ic;
1706 	struct rt2560_tx_ring *txq = &sc->txq;
1707 	struct rt2560_tx_desc *desc;
1708 	struct rt2560_tx_data *data;
1709 	struct ieee80211_frame *wh;
1710 	struct ieee80211_key *k;
1711 	struct mbuf *m1;
1712 	uint16_t dur;
1713 	uint32_t flags = 0;
1714 	int pktlen, rate, needcts = 0, needrts = 0, error;
1715 
1716 	wh = mtod(m0, struct ieee80211_frame *);
1717 
1718 	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1719 		k = ieee80211_get_txkey(ic, wh, ni);
1720 
1721 		if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL)
1722 			return ENOBUFS;
1723 
1724 		/* packet header may have moved, reset our local pointer */
1725 		wh = mtod(m0, struct ieee80211_frame *);
1726 	}
1727 
1728 	/* compute actual packet length (including CRC and crypto overhead) */
1729 	pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN;
1730 
1731 	/* pickup a rate */
1732 	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
1733 	    ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1734 	     IEEE80211_FC0_TYPE_MGT)) {
1735 		/* mgmt/multicast frames are sent at the lowest avail. rate */
1736 		rate = ni->ni_rates.rs_rates[0];
1737 	} else if (ic->ic_fixed_rate != -1) {
1738 		rate = ic->ic_sup_rates[ic->ic_curmode].
1739 		    rs_rates[ic->ic_fixed_rate];
1740 	} else
1741 		rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1742 	if (rate == 0)
1743 		rate = 2;	/* XXX should not happen */
1744 	rate &= IEEE80211_RATE_VAL;
1745 
1746 	/*
1747 	 * Packet Bursting: backoff after ppb=8 frames to give other STAs a
1748 	 * chance to contend for the wireless medium.
1749 	 */
1750 	if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7))
1751 		flags |= RT2560_TX_IFS_SIFS;
1752 
1753 	/* check if RTS/CTS or CTS-to-self protection must be used */
1754 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1755 		/* multicast frames are not sent at OFDM rates in 802.11b/g */
1756 		if (pktlen > ic->ic_rtsthreshold) {
1757 			needrts = 1;	/* RTS/CTS based on frame length */
1758 		} else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1759 		    RAL_RATE_IS_OFDM(rate)) {
1760 			if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
1761 				needcts = 1;	/* CTS-to-self */
1762 			else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
1763 				needrts = 1;	/* RTS/CTS */
1764 		}
1765 	}
1766 	if (needrts || needcts) {
1767 		struct mbuf *mprot;
1768 		int protrate, ackrate;
1769 
1770 		protrate = 2;	/* XXX */
1771 		ackrate  = rt2560_ack_rate(ic, rate);
1772 
1773 		dur = rt2560_txtime(pktlen, rate, ic->ic_flags) +
1774 		      rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1775 		      2 * RAL_SIFS;
1776 		if (needrts) {
1777 			dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic,
1778 			    protrate), ic->ic_flags) + RAL_SIFS;
1779 			mprot = ieee80211_get_rts(ic, wh, dur);
1780 		} else {
1781 			mprot = ieee80211_get_cts_to_self(ic, dur);
1782 		}
1783 		if (mprot == NULL) {
1784 			printf("%s: could not allocate protection frame\n",
1785 			    sc->sc_dev.dv_xname);
1786 			m_freem(m0);
1787 			return ENOBUFS;
1788 		}
1789 
1790 		desc = &txq->desc[txq->cur_encrypt];
1791 		data = &txq->data[txq->cur_encrypt];
1792 
1793 		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot,
1794 		    BUS_DMA_NOWAIT);
1795 		if (error != 0) {
1796 			printf("%s: can't map mbuf (error %d)\n",
1797 			    sc->sc_dev.dv_xname, error);
1798 			m_freem(mprot);
1799 			m_freem(m0);
1800 			return error;
1801 		}
1802 
1803 		data->m = mprot;
1804 		/* avoid multiple free() of the same node for each fragment */
1805 		data->ni = ieee80211_ref_node(ni);
1806 
1807 		/* XXX may want to pass the protection frame to BPF */
1808 
1809 		rt2560_setup_tx_desc(sc, desc,
1810 		    (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG,
1811 		    mprot->m_pkthdr.len, protrate, 1,
1812 		    data->map->dm_segs->ds_addr);
1813 
1814 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1815 		    data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1816 		bus_dmamap_sync(sc->sc_dmat, txq->map,
1817 		    txq->cur_encrypt * RT2560_TX_DESC_SIZE,
1818 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1819 
1820 		txq->queued++;
1821 		if (++txq->cur_encrypt >= txq->count)
1822 			txq->cur_encrypt = 0;
1823 
1824 		flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1825 	}
1826 
1827 	data = &txq->data[txq->cur_encrypt];
1828 	desc = &txq->desc[txq->cur_encrypt];
1829 
1830 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1831 	    BUS_DMA_NOWAIT);
1832 	if (error != 0 && error != EFBIG) {
1833 		printf("%s: can't map mbuf (error %d)\n",
1834 		    sc->sc_dev.dv_xname, error);
1835 		m_freem(m0);
1836 		return error;
1837 	}
1838 	if (error != 0) {
1839 		/* too many fragments, linearize */
1840 		MGETHDR(m1, M_DONTWAIT, MT_DATA);
1841 		if (m1 == NULL) {
1842 			m_freem(m0);
1843 			return ENOBUFS;
1844 		}
1845 		if (m0->m_pkthdr.len > MHLEN) {
1846 			MCLGET(m1, M_DONTWAIT);
1847 			if (!(m1->m_flags & M_EXT)) {
1848 				m_freem(m0);
1849 				m_freem(m1);
1850 				return ENOBUFS;
1851 			}
1852 		}
1853 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t));
1854 		m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len;
1855 		m_freem(m0);
1856 		m0 = m1;
1857 
1858 		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1859 		    BUS_DMA_NOWAIT);
1860 		if (error != 0) {
1861 			printf("%s: can't map mbuf (error %d)\n",
1862 			    sc->sc_dev.dv_xname, error);
1863 			m_freem(m0);
1864 			return error;
1865 		}
1866 
1867 		/* packet header have moved, reset our local pointer */
1868 		wh = mtod(m0, struct ieee80211_frame *);
1869 	}
1870 
1871 #if NBPFILTER > 0
1872 	if (sc->sc_drvbpf != NULL) {
1873 		struct mbuf mb;
1874 		struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1875 
1876 		tap->wt_flags = 0;
1877 		tap->wt_rate = rate;
1878 		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1879 		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1880 		tap->wt_antenna = sc->tx_ant;
1881 
1882 		mb.m_data = (caddr_t)tap;
1883 		mb.m_len = sc->sc_txtap_len;
1884 		mb.m_next = m0;
1885 		mb.m_nextpkt = NULL;
1886 		mb.m_type = 0;
1887 		mb.m_flags = 0;
1888 		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1889 	}
1890 #endif
1891 
1892 	data->m = m0;
1893 	data->ni = ni;
1894 
1895 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1896 		flags |= RT2560_TX_NEED_ACK;
1897 
1898 		dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate),
1899 		    ic->ic_flags) + RAL_SIFS;
1900 		*(uint16_t *)wh->i_dur = htole16(dur);
1901 	}
1902 
1903 	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
1904 	    data->map->dm_segs->ds_addr);
1905 
1906 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1907 	    BUS_DMASYNC_PREWRITE);
1908 	bus_dmamap_sync(sc->sc_dmat, txq->map,
1909 	    txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1910 	    BUS_DMASYNC_PREWRITE);
1911 
1912 	DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n",
1913 	    m0->m_pkthdr.len, txq->cur_encrypt, rate));
1914 
1915 	/* kick encrypt */
1916 	txq->queued++;
1917 	if (++txq->cur_encrypt >= txq->count)
1918 		txq->cur_encrypt = 0;
1919 	RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
1920 
1921 	return 0;
1922 }
1923 
1924 void
1925 rt2560_start(struct ifnet *ifp)
1926 {
1927 	struct rt2560_softc *sc = ifp->if_softc;
1928 	struct ieee80211com *ic = &sc->sc_ic;
1929 	struct mbuf *m0;
1930 	struct ieee80211_node *ni;
1931 
1932 	/*
1933 	 * net80211 may still try to send management frames even if the
1934 	 * IFF_RUNNING flag is not set...
1935 	 */
1936 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1937 		return;
1938 
1939 	for (;;) {
1940 		IF_POLL(&ic->ic_mgtq, m0);
1941 		if (m0 != NULL) {
1942 			if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
1943 				ifp->if_flags |= IFF_OACTIVE;
1944 				sc->sc_flags |= RT2560_PRIO_OACTIVE;
1945 				break;
1946 			}
1947 			IF_DEQUEUE(&ic->ic_mgtq, m0);
1948 
1949 			ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1950 			m0->m_pkthdr.rcvif = NULL;
1951 #if NBPFILTER > 0
1952 			if (ic->ic_rawbpf != NULL)
1953 				bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1954 #endif
1955 			if (rt2560_tx_mgt(sc, m0, ni) != 0)
1956 				break;
1957 
1958 		} else {
1959 			if (ic->ic_state != IEEE80211_S_RUN)
1960 				break;
1961 			IFQ_POLL(&ifp->if_snd, m0);
1962 			if (m0 == NULL)
1963 				break;
1964 			if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
1965 				ifp->if_flags |= IFF_OACTIVE;
1966 				sc->sc_flags |= RT2560_DATA_OACTIVE;
1967 				break;
1968 			}
1969 			IFQ_DEQUEUE(&ifp->if_snd, m0);
1970 #if NBPFILTER > 0
1971 			if (ifp->if_bpf != NULL)
1972 				bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
1973 #endif
1974 			m0 = ieee80211_encap(ifp, m0, &ni);
1975 			if (m0 == NULL)
1976 				continue;
1977 #if NBPFILTER > 0
1978 			if (ic->ic_rawbpf != NULL)
1979 				bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1980 #endif
1981 			if (rt2560_tx_data(sc, m0, ni) != 0) {
1982 				if (ni != NULL)
1983 					ieee80211_release_node(ic, ni);
1984 				ifp->if_oerrors++;
1985 				break;
1986 			}
1987 		}
1988 
1989 		sc->sc_tx_timer = 5;
1990 		ifp->if_timer = 1;
1991 	}
1992 }
1993 
1994 void
1995 rt2560_watchdog(struct ifnet *ifp)
1996 {
1997 	struct rt2560_softc *sc = ifp->if_softc;
1998 
1999 	ifp->if_timer = 0;
2000 
2001 	if (sc->sc_tx_timer > 0) {
2002 		if (--sc->sc_tx_timer == 0) {
2003 			printf("%s: device timeout\n", sc->sc_dev.dv_xname);
2004 			rt2560_init(ifp);
2005 			ifp->if_oerrors++;
2006 			return;
2007 		}
2008 		ifp->if_timer = 1;
2009 	}
2010 
2011 	ieee80211_watchdog(ifp);
2012 }
2013 
2014 int
2015 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
2016 {
2017 	struct rt2560_softc *sc = ifp->if_softc;
2018 	struct ieee80211com *ic = &sc->sc_ic;
2019 	struct ifaddr *ifa;
2020 	struct ifreq *ifr;
2021 	int s, error = 0;
2022 
2023 	s = splnet();
2024 
2025 	switch (cmd) {
2026 	case SIOCSIFADDR:
2027 		ifa = (struct ifaddr *)data;
2028 		ifp->if_flags |= IFF_UP;
2029 #ifdef INET
2030 		if (ifa->ifa_addr->sa_family == AF_INET)
2031 			arp_ifinit(&ic->ic_ac, ifa);
2032 #endif
2033 		/* FALLTHROUGH */
2034 	case SIOCSIFFLAGS:
2035 		if (ifp->if_flags & IFF_UP) {
2036 			if (ifp->if_flags & IFF_RUNNING)
2037 				rt2560_update_promisc(sc);
2038 			else
2039 				rt2560_init(ifp);
2040 		} else {
2041 			if (ifp->if_flags & IFF_RUNNING)
2042 				rt2560_stop(ifp, 1);
2043 		}
2044 		break;
2045 
2046 	case SIOCADDMULTI:
2047 	case SIOCDELMULTI:
2048 		ifr = (struct ifreq *)data;
2049 		error = (cmd == SIOCADDMULTI) ?
2050 		    ether_addmulti(ifr, &ic->ic_ac) :
2051 		    ether_delmulti(ifr, &ic->ic_ac);
2052 
2053 		if (error == ENETRESET)
2054 			error = 0;
2055 		break;
2056 
2057 	case SIOCS80211CHANNEL:
2058 		/*
2059 		 * This allows for fast channel switching in monitor mode
2060 		 * (used by kismet). In IBSS mode, we must explicitly reset
2061 		 * the interface to generate a new beacon frame.
2062 		 */
2063 		error = ieee80211_ioctl(ifp, cmd, data);
2064 		if (error == ENETRESET &&
2065 		    ic->ic_opmode == IEEE80211_M_MONITOR) {
2066 			if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2067 			    (IFF_UP | IFF_RUNNING))
2068 				rt2560_set_chan(sc, ic->ic_ibss_chan);
2069 			error = 0;
2070 		}
2071 		break;
2072 
2073 	default:
2074 		error = ieee80211_ioctl(ifp, cmd, data);
2075 	}
2076 
2077 	if (error == ENETRESET) {
2078 		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2079 		    (IFF_UP | IFF_RUNNING))
2080 			rt2560_init(ifp);
2081 		error = 0;
2082 	}
2083 
2084 	splx(s);
2085 
2086 	return error;
2087 }
2088 
2089 void
2090 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2091 {
2092 	uint32_t tmp;
2093 	int ntries;
2094 
2095 	for (ntries = 0; ntries < 100; ntries++) {
2096 		if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2097 			break;
2098 		DELAY(1);
2099 	}
2100 	if (ntries == 100) {
2101 		printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
2102 		return;
2103 	}
2104 
2105 	tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2106 	RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2107 
2108 	DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2109 }
2110 
2111 uint8_t
2112 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2113 {
2114 	uint32_t val;
2115 	int ntries;
2116 
2117 	for (ntries = 0; ntries < 100; ntries++) {
2118 		if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2119 			break;
2120 		DELAY(1);
2121 	}
2122 	if (ntries == 100) {
2123 		printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
2124 		return 0;
2125 	}
2126 
2127 	val = RT2560_BBP_BUSY | reg << 8;
2128 	RAL_WRITE(sc, RT2560_BBPCSR, val);
2129 
2130 	for (ntries = 0; ntries < 100; ntries++) {
2131 		val = RAL_READ(sc, RT2560_BBPCSR);
2132 		if (!(val & RT2560_BBP_BUSY))
2133 			return val & 0xff;
2134 		DELAY(1);
2135 	}
2136 
2137 	printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
2138 	return 0;
2139 }
2140 
2141 void
2142 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2143 {
2144 	uint32_t tmp;
2145 	int ntries;
2146 
2147 	for (ntries = 0; ntries < 100; ntries++) {
2148 		if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2149 			break;
2150 		DELAY(1);
2151 	}
2152 	if (ntries == 100) {
2153 		printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
2154 		return;
2155 	}
2156 
2157 	tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2158 	    (reg & 0x3);
2159 	RAL_WRITE(sc, RT2560_RFCSR, tmp);
2160 
2161 	/* remember last written value in sc */
2162 	sc->rf_regs[reg] = val;
2163 
2164 	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2165 }
2166 
2167 void
2168 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2169 {
2170 	struct ieee80211com *ic = &sc->sc_ic;
2171 	uint8_t power, tmp;
2172 	u_int chan;
2173 
2174 	chan = ieee80211_chan2ieee(ic, c);
2175 	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2176 		return;
2177 
2178 	power = min(sc->txpow[chan - 1], 31);
2179 
2180 	DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2181 
2182 	switch (sc->rf_rev) {
2183 	case RT2560_RF_2522:
2184 		rt2560_rf_write(sc, RT2560_RF1, 0x00814);
2185 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]);
2186 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2187 		break;
2188 
2189 	case RT2560_RF_2523:
2190 		rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2191 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]);
2192 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044);
2193 		rt2560_rf_write(sc, RT2560_RF4,
2194 		    (chan == 14) ? 0x00280 : 0x00286);
2195 		break;
2196 
2197 	case RT2560_RF_2524:
2198 		rt2560_rf_write(sc, RT2560_RF1, 0x0c808);
2199 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]);
2200 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2201 		rt2560_rf_write(sc, RT2560_RF4,
2202 		    (chan == 14) ? 0x00280 : 0x00286);
2203 		break;
2204 
2205 	case RT2560_RF_2525:
2206 		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2207 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2208 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2209 		rt2560_rf_write(sc, RT2560_RF4,
2210 		    (chan == 14) ? 0x00280 : 0x00286);
2211 
2212 		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2213 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]);
2214 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2215 		rt2560_rf_write(sc, RT2560_RF4,
2216 		    (chan == 14) ? 0x00280 : 0x00286);
2217 		break;
2218 
2219 	case RT2560_RF_2525E:
2220 		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2221 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]);
2222 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2223 		rt2560_rf_write(sc, RT2560_RF4,
2224 		    (chan == 14) ? 0x00286 : 0x00282);
2225 		break;
2226 
2227 	case RT2560_RF_2526:
2228 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2229 		rt2560_rf_write(sc, RT2560_RF4,
2230 		   (chan & 1) ? 0x00386 : 0x00381);
2231 		rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2232 
2233 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]);
2234 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2235 		rt2560_rf_write(sc, RT2560_RF4,
2236 		    (chan & 1) ? 0x00386 : 0x00381);
2237 		break;
2238 	}
2239 
2240 	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
2241 	    ic->ic_state != IEEE80211_S_SCAN) {
2242 		/* set Japan filter bit for channel 14 */
2243 		tmp = rt2560_bbp_read(sc, 70);
2244 
2245 		tmp &= ~RT2560_JAPAN_FILTER;
2246 		if (chan == 14)
2247 			tmp |= RT2560_JAPAN_FILTER;
2248 
2249 		rt2560_bbp_write(sc, 70, tmp);
2250 
2251 		DELAY(1000); /* RF needs a 1ms delay here */
2252 		rt2560_disable_rf_tune(sc);
2253 
2254 		/* clear CRC errors */
2255 		RAL_READ(sc, RT2560_CNT0);
2256 	}
2257 }
2258 
2259 /*
2260  * Disable RF auto-tuning.
2261  */
2262 void
2263 rt2560_disable_rf_tune(struct rt2560_softc *sc)
2264 {
2265 	uint32_t tmp;
2266 
2267 	if (sc->rf_rev != RT2560_RF_2523) {
2268 		tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
2269 		rt2560_rf_write(sc, RT2560_RF1, tmp);
2270 	}
2271 
2272 	tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
2273 	rt2560_rf_write(sc, RT2560_RF3, tmp);
2274 
2275 	DPRINTFN(2, ("disabling RF autotune\n"));
2276 }
2277 
2278 /*
2279  * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2280  * synchronization.
2281  */
2282 void
2283 rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2284 {
2285 	struct ieee80211com *ic = &sc->sc_ic;
2286 	uint16_t logcwmin, preload;
2287 	uint32_t tmp;
2288 
2289 	/* first, disable TSF synchronization */
2290 	RAL_WRITE(sc, RT2560_CSR14, 0);
2291 
2292 	tmp = 16 * ic->ic_bss->ni_intval;
2293 	RAL_WRITE(sc, RT2560_CSR12, tmp);
2294 
2295 	RAL_WRITE(sc, RT2560_CSR13, 0);
2296 
2297 	logcwmin = 5;
2298 	preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2299 	tmp = logcwmin << 16 | preload;
2300 	RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2301 
2302 	/* finally, enable TSF synchronization */
2303 	tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2304 	if (ic->ic_opmode == IEEE80211_M_STA)
2305 		tmp |= RT2560_ENABLE_TSF_SYNC(1);
2306 #ifndef IEEE80211_STA_ONLY
2307 	else
2308 		tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2309 		       RT2560_ENABLE_BEACON_GENERATOR;
2310 #endif
2311 	RAL_WRITE(sc, RT2560_CSR14, tmp);
2312 
2313 	DPRINTF(("enabling TSF synchronization\n"));
2314 }
2315 
2316 void
2317 rt2560_update_plcp(struct rt2560_softc *sc)
2318 {
2319 	struct ieee80211com *ic = &sc->sc_ic;
2320 
2321 	/* no short preamble for 1Mbps */
2322 	RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2323 
2324 	if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2325 		/* values taken from the reference driver */
2326 		RAL_WRITE(sc, RT2560_PLCP2MCSR,   0x00380401);
2327 		RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2328 		RAL_WRITE(sc, RT2560_PLCP11MCSR,  0x000b8403);
2329 	} else {
2330 		/* same values as above or'ed 0x8 */
2331 		RAL_WRITE(sc, RT2560_PLCP2MCSR,   0x00380409);
2332 		RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2333 		RAL_WRITE(sc, RT2560_PLCP11MCSR,  0x000b840b);
2334 	}
2335 
2336 	DPRINTF(("updating PLCP for %s preamble\n",
2337 	    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2338 }
2339 
2340 void
2341 rt2560_updateslot(struct ieee80211com *ic)
2342 {
2343 	struct rt2560_softc *sc = ic->ic_if.if_softc;
2344 
2345 #ifndef IEEE80211_STA_ONLY
2346 	if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
2347 		/*
2348 		 * In HostAP mode, we defer setting of new slot time until
2349 		 * updated ERP Information Element has propagated to all
2350 		 * associated STAs.
2351 		 */
2352 		sc->sc_flags |= RT2560_UPDATE_SLOT;
2353 	} else
2354 #endif
2355 		rt2560_set_slottime(sc);
2356 }
2357 
2358 /*
2359  * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to
2360  * IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2361  */
2362 void
2363 rt2560_set_slottime(struct rt2560_softc *sc)
2364 {
2365 	struct ieee80211com *ic = &sc->sc_ic;
2366 	uint8_t slottime;
2367 	uint16_t sifs, pifs, difs, eifs;
2368 	uint32_t tmp;
2369 
2370 	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2371 
2372 	/* define the MAC slot boundaries */
2373 	sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND;
2374 	pifs = sifs + slottime;
2375 	difs = sifs + 2 * slottime;
2376 	eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2377 
2378 	tmp = RAL_READ(sc, RT2560_CSR11);
2379 	tmp = (tmp & ~0x1f00) | slottime << 8;
2380 	RAL_WRITE(sc, RT2560_CSR11, tmp);
2381 
2382 	tmp = pifs << 16 | sifs;
2383 	RAL_WRITE(sc, RT2560_CSR18, tmp);
2384 
2385 	tmp = eifs << 16 | difs;
2386 	RAL_WRITE(sc, RT2560_CSR19, tmp);
2387 
2388 	DPRINTF(("setting slottime to %uus\n", slottime));
2389 }
2390 
2391 void
2392 rt2560_set_basicrates(struct rt2560_softc *sc)
2393 {
2394 	struct ieee80211com *ic = &sc->sc_ic;
2395 
2396 	/* update basic rate set */
2397 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
2398 		/* 11b basic rates: 1, 2Mbps */
2399 		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2400 	} else {
2401 		/* 11b/g basic rates: 1, 2, 5.5, 11Mbps */
2402 		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf);
2403 	}
2404 }
2405 
2406 void
2407 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2408 {
2409 	uint32_t tmp;
2410 
2411 	/* set ON period to 70ms and OFF period to 30ms */
2412 	tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2413 	RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2414 }
2415 
2416 void
2417 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2418 {
2419 	uint32_t tmp;
2420 
2421 	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2422 	RAL_WRITE(sc, RT2560_CSR5, tmp);
2423 
2424 	tmp = bssid[4] | bssid[5] << 8;
2425 	RAL_WRITE(sc, RT2560_CSR6, tmp);
2426 
2427 	DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
2428 }
2429 
2430 void
2431 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2432 {
2433 	uint32_t tmp;
2434 
2435 	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2436 	RAL_WRITE(sc, RT2560_CSR3, tmp);
2437 
2438 	tmp = addr[4] | addr[5] << 8;
2439 	RAL_WRITE(sc, RT2560_CSR4, tmp);
2440 
2441 	DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
2442 }
2443 
2444 void
2445 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2446 {
2447 	uint32_t tmp;
2448 
2449 	tmp = RAL_READ(sc, RT2560_CSR3);
2450 	addr[0] = tmp & 0xff;
2451 	addr[1] = (tmp >>  8) & 0xff;
2452 	addr[2] = (tmp >> 16) & 0xff;
2453 	addr[3] = (tmp >> 24);
2454 
2455 	tmp = RAL_READ(sc, RT2560_CSR4);
2456 	addr[4] = tmp & 0xff;
2457 	addr[5] = (tmp >> 8) & 0xff;
2458 }
2459 
2460 void
2461 rt2560_update_promisc(struct rt2560_softc *sc)
2462 {
2463 	struct ifnet *ifp = &sc->sc_ic.ic_if;
2464 	uint32_t tmp;
2465 
2466 	tmp = RAL_READ(sc, RT2560_RXCSR0);
2467 
2468 	tmp &= ~RT2560_DROP_NOT_TO_ME;
2469 	if (!(ifp->if_flags & IFF_PROMISC))
2470 		tmp |= RT2560_DROP_NOT_TO_ME;
2471 
2472 	RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2473 
2474 	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2475 	    "entering" : "leaving"));
2476 }
2477 
2478 void
2479 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2480 {
2481 	uint32_t tmp;
2482 	uint8_t tx;
2483 
2484 	tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2485 	if (antenna == 1)
2486 		tx |= RT2560_BBP_ANTA;
2487 	else if (antenna == 2)
2488 		tx |= RT2560_BBP_ANTB;
2489 	else
2490 		tx |= RT2560_BBP_DIVERSITY;
2491 
2492 	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2493 	if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2494 	    sc->rf_rev == RT2560_RF_5222)
2495 		tx |= RT2560_BBP_FLIPIQ;
2496 
2497 	rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2498 
2499 	/* update values for CCK and OFDM in BBPCSR1 */
2500 	tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2501 	tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2502 	RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2503 }
2504 
2505 void
2506 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2507 {
2508 	uint8_t rx;
2509 
2510 	rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2511 	if (antenna == 1)
2512 		rx |= RT2560_BBP_ANTA;
2513 	else if (antenna == 2)
2514 		rx |= RT2560_BBP_ANTB;
2515 	else
2516 		rx |= RT2560_BBP_DIVERSITY;
2517 
2518 	/* need to force no I/Q flip for RF 2525e and 2526 */
2519 	if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2520 		rx &= ~RT2560_BBP_FLIPIQ;
2521 
2522 	rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2523 }
2524 
2525 const char *
2526 rt2560_get_rf(int rev)
2527 {
2528 	switch (rev) {
2529 	case RT2560_RF_2522:	return "RT2522";
2530 	case RT2560_RF_2523:	return "RT2523";
2531 	case RT2560_RF_2524:	return "RT2524";
2532 	case RT2560_RF_2525:	return "RT2525";
2533 	case RT2560_RF_2525E:	return "RT2525e";
2534 	case RT2560_RF_2526:	return "RT2526";
2535 	case RT2560_RF_5222:	return "RT5222";
2536 	default:		return "unknown";
2537 	}
2538 }
2539 
2540 void
2541 rt2560_read_eeprom(struct rt2560_softc *sc)
2542 {
2543 	uint16_t val;
2544 	int i;
2545 
2546 	val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2547 	sc->rf_rev =   (val >> 11) & 0x1f;
2548 	sc->hw_radio = (val >> 10) & 0x1;
2549 	sc->led_mode = (val >> 6)  & 0x7;
2550 	sc->rx_ant =   (val >> 4)  & 0x3;
2551 	sc->tx_ant =   (val >> 2)  & 0x3;
2552 	sc->nb_ant =   val & 0x3;
2553 
2554 	/* read default values for BBP registers */
2555 	for (i = 0; i < 16; i++) {
2556 		val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2557 		sc->bbp_prom[i].reg = val >> 8;
2558 		sc->bbp_prom[i].val = val & 0xff;
2559 	}
2560 
2561 	/* read Tx power for all b/g channels */
2562 	for (i = 0; i < 14 / 2; i++) {
2563 		val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2564 		sc->txpow[i * 2] = val >> 8;
2565 		sc->txpow[i * 2 + 1] = val & 0xff;
2566 	}
2567 }
2568 
2569 int
2570 rt2560_bbp_init(struct rt2560_softc *sc)
2571 {
2572 	int i, ntries;
2573 
2574 	/* wait for BBP to be ready */
2575 	for (ntries = 0; ntries < 100; ntries++) {
2576 		if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2577 			break;
2578 		DELAY(1);
2579 	}
2580 	if (ntries == 100) {
2581 		printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
2582 		return EIO;
2583 	}
2584 
2585 	/* initialize BBP registers to default values */
2586 	for (i = 0; i < nitems(rt2560_def_bbp); i++) {
2587 		rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2588 		    rt2560_def_bbp[i].val);
2589 	}
2590 #if 0
2591 	/* initialize BBP registers to values stored in EEPROM */
2592 	for (i = 0; i < 16; i++) {
2593 		if (sc->bbp_prom[i].reg == 0xff)
2594 			continue;
2595 		rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2596 	}
2597 #endif
2598 
2599 	return 0;
2600 }
2601 
2602 int
2603 rt2560_init(struct ifnet *ifp)
2604 {
2605 	struct rt2560_softc *sc = ifp->if_softc;
2606 	struct ieee80211com *ic = &sc->sc_ic;
2607 	uint32_t tmp;
2608 	int i;
2609 
2610 	/* for CardBus, power on the socket */
2611 	if (!(sc->sc_flags & RT2560_ENABLED)) {
2612 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2613 			printf("%s: could not enable device\n",
2614 			    sc->sc_dev.dv_xname);
2615 			return EIO;
2616 		}
2617 		sc->sc_flags |= RT2560_ENABLED;
2618 	}
2619 
2620 	rt2560_stop(ifp, 0);
2621 
2622 	/* setup tx rings */
2623 	tmp = RT2560_PRIO_RING_COUNT << 24 |
2624 	      RT2560_ATIM_RING_COUNT << 16 |
2625 	      RT2560_TX_RING_COUNT   <<  8 |
2626 	      RT2560_TX_DESC_SIZE;
2627 
2628 	/* rings _must_ be initialized in this _exact_ order! */
2629 	RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2630 	RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2631 	RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2632 	RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2633 	RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2634 
2635 	/* setup rx ring */
2636 	tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2637 
2638 	RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2639 	RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2640 
2641 	/* initialize MAC registers to default values */
2642 	for (i = 0; i < nitems(rt2560_def_mac); i++)
2643 		RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2644 
2645 	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
2646 	rt2560_set_macaddr(sc, ic->ic_myaddr);
2647 
2648 	/* set basic rate set (will be updated later) */
2649 	RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2650 
2651 	rt2560_set_slottime(sc);
2652 	rt2560_update_plcp(sc);
2653 	rt2560_update_led(sc, 0, 0);
2654 
2655 	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2656 	RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2657 
2658 	if (rt2560_bbp_init(sc) != 0) {
2659 		rt2560_stop(ifp, 1);
2660 		return EIO;
2661 	}
2662 
2663 	rt2560_set_txantenna(sc, 1);
2664 	rt2560_set_rxantenna(sc, 1);
2665 
2666 	/* set default BSS channel */
2667 	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2668 	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
2669 
2670 	/* kick Rx */
2671 	tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2672 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2673 		tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2674 #ifndef IEEE80211_STA_ONLY
2675 		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2676 #endif
2677 			tmp |= RT2560_DROP_TODS;
2678 		if (!(ifp->if_flags & IFF_PROMISC))
2679 			tmp |= RT2560_DROP_NOT_TO_ME;
2680 	}
2681 	RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2682 
2683 	/* clear old FCS and Rx FIFO errors */
2684 	RAL_READ(sc, RT2560_CNT0);
2685 	RAL_READ(sc, RT2560_CNT4);
2686 
2687 	/* clear any pending interrupts */
2688 	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2689 
2690 	/* enable interrupts */
2691 	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2692 
2693 	ifp->if_flags &= ~IFF_OACTIVE;
2694 	ifp->if_flags |= IFF_RUNNING;
2695 
2696 	if (ic->ic_opmode == IEEE80211_M_MONITOR)
2697 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2698 	else
2699 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2700 
2701 	return 0;
2702 }
2703 
2704 void
2705 rt2560_stop(struct ifnet *ifp, int disable)
2706 {
2707 	struct rt2560_softc *sc = ifp->if_softc;
2708 	struct ieee80211com *ic = &sc->sc_ic;
2709 
2710 	sc->sc_tx_timer = 0;
2711 	sc->sc_flags &= ~(RT2560_PRIO_OACTIVE|RT2560_DATA_OACTIVE);
2712 	ifp->if_timer = 0;
2713 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2714 
2715 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);	/* free all nodes */
2716 
2717 	/* abort Tx */
2718 	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2719 
2720 	/* disable Rx */
2721 	RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2722 
2723 	/* reset ASIC (and thus, BBP) */
2724 	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2725 	RAL_WRITE(sc, RT2560_CSR1, 0);
2726 
2727 	/* disable interrupts */
2728 	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2729 
2730 	/* clear any pending interrupt */
2731 	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2732 
2733 	/* reset Tx and Rx rings */
2734 	rt2560_reset_tx_ring(sc, &sc->txq);
2735 	rt2560_reset_tx_ring(sc, &sc->atimq);
2736 	rt2560_reset_tx_ring(sc, &sc->prioq);
2737 	rt2560_reset_tx_ring(sc, &sc->bcnq);
2738 	rt2560_reset_rx_ring(sc, &sc->rxq);
2739 
2740 	/* for CardBus, power down the socket */
2741 	if (disable && sc->sc_disable != NULL) {
2742 		if (sc->sc_flags & RT2560_ENABLED) {
2743 			(*sc->sc_disable)(sc);
2744 			sc->sc_flags &= ~RT2560_ENABLED;
2745 		}
2746 	}
2747 }
2748 
2749 struct cfdriver ral_cd = {
2750 	NULL, "ral", DV_IFNET
2751 };
2752