xref: /openbsd-src/sys/dev/ic/pcf8584var.h (revision 1ead1c58b1935b53ad71cf350d187e1d112ff238)
1*1ead1c58Skettenis /*	$OpenBSD: pcf8584var.h,v 1.5 2007/10/20 18:46:21 kettenis Exp $ */
2c74283e0Sdlg 
3c74283e0Sdlg /*
4c74283e0Sdlg  * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
5c74283e0Sdlg  *
6c74283e0Sdlg  * Permission to use, copy, modify, and distribute this software for any
7c74283e0Sdlg  * purpose with or without fee is hereby granted, provided that the above
8c74283e0Sdlg  * copyright notice and this permission notice appear in all copies.
9c74283e0Sdlg  *
10c74283e0Sdlg  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11c74283e0Sdlg  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12c74283e0Sdlg  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13c74283e0Sdlg  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14c74283e0Sdlg  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15c74283e0Sdlg  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16c74283e0Sdlg  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17c74283e0Sdlg  */
18c74283e0Sdlg 
19c74283e0Sdlg struct pcfiic_softc {
20c74283e0Sdlg 	struct device		sc_dev;
21c74283e0Sdlg 
22c74283e0Sdlg 	bus_space_tag_t		sc_iot;
23c74283e0Sdlg 	bus_space_handle_t	sc_ioh;
249c6a5656Sderaadt 	bus_space_handle_t	sc_ioh2;
259c6a5656Sderaadt 	int			sc_master;
263e5c8021Sderaadt 	u_int8_t		sc_addr;
273e5c8021Sderaadt 	u_int8_t		sc_clock;
283e5c8021Sderaadt 	u_int8_t		sc_regmap[2];
29c74283e0Sdlg 
30c74283e0Sdlg 	int			sc_poll;
31c74283e0Sdlg 
32c74283e0Sdlg 	struct i2c_controller	sc_i2c;
33ee945c99Sjsg 	struct rwlock		sc_lock;
34c74283e0Sdlg };
35c74283e0Sdlg 
363e5c8021Sderaadt /* clock divisor settings */
373e5c8021Sderaadt #define PCF_CLOCK_3		0x00 /* 3 MHz */
383e5c8021Sderaadt #define PCF_CLOCK_4_43		0x10 /* 4.43 MHz */
393e5c8021Sderaadt #define PCF_CLOCK_6		0x14 /* 6 MHz */
403e5c8021Sderaadt #define PCF_CLOCK_8		0x18 /* 8 MHz */
413e5c8021Sderaadt #define PCF_CLOCK_12		0x1c /* 12 MHz */
423e5c8021Sderaadt 
43*1ead1c58Skettenis /* SCL frequency settings */
44*1ead1c58Skettenis #define PCF_FREQ_90		0x00 /* 90 kHz */
45*1ead1c58Skettenis #define PCF_FREQ_45		0x01 /* 45 kHz */
46*1ead1c58Skettenis #define PCF_FREQ_11		0x02 /* 11 kHz */
47*1ead1c58Skettenis #define PCF_FREQ_1_5		0x03 /* 1.5 kHz */
48*1ead1c58Skettenis 
493e5c8021Sderaadt void	pcfiic_attach(struct pcfiic_softc *, i2c_addr_t, u_int8_t, int,
50c74283e0Sdlg 	    void (*)(struct device *, struct i2cbus_attach_args *, void *),
51c74283e0Sdlg 	    void *);
52c74283e0Sdlg int	pcfiic_intr(void *);
53