1 /* $OpenBSD: ne2000.c,v 1.25 2010/04/20 20:42:54 deraadt Exp $ */ 2 /* $NetBSD: ne2000.c,v 1.12 1998/06/10 01:15:50 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 36 * adapters. 37 * 38 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 39 * 40 * Copyright (C) 1993, David Greenman. This software may be used, modified, 41 * copied, distributed, and sold, in both source and binary form provided that 42 * the above copyright and these terms are retained. Under no circumstances is 43 * the author responsible for the proper functioning of this software, nor does 44 * the author assume any responsibility for damages incurred with its use. 45 */ 46 47 /* 48 * Common code shared by all NE2000-compatible Ethernet interfaces. 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/device.h> 54 #include <sys/socket.h> 55 #include <sys/mbuf.h> 56 #include <sys/syslog.h> 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/if_media.h> 62 63 #include <netinet/in.h> 64 #include <netinet/if_ether.h> 65 66 #include <machine/bus.h> 67 68 #include <dev/ic/dp8390reg.h> 69 #include <dev/ic/dp8390var.h> 70 71 #include <dev/ic/ne2000reg.h> 72 #include <dev/ic/ne2000var.h> 73 74 #include <dev/ic/ax88190reg.h> 75 76 int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int); 77 int ne2000_ring_copy(struct dp8390_softc *, int, caddr_t, u_short); 78 void ne2000_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *); 79 int ne2000_test_mem(struct dp8390_softc *); 80 81 void ne2000_writemem(bus_space_tag_t, bus_space_handle_t, 82 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, int); 83 void ne2000_readmem(bus_space_tag_t, bus_space_handle_t, 84 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int); 85 86 #define ASIC_BARRIER(asict, asich) \ 87 bus_space_barrier((asict), (asich), 0, 0x10, \ 88 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 89 90 struct cfdriver ne_cd = { 91 NULL, "ne", DV_IFNET 92 }; 93 94 int 95 ne2000_attach(struct ne2000_softc *nsc, u_int8_t *myea) 96 { 97 struct dp8390_softc *dsc = &nsc->sc_dp8390; 98 bus_space_tag_t nict = dsc->sc_regt; 99 bus_space_handle_t nich = dsc->sc_regh; 100 bus_space_tag_t asict = nsc->sc_asict; 101 bus_space_handle_t asich = nsc->sc_asich; 102 u_int8_t romdata[16]; 103 int memsize, i, useword; 104 105 /* 106 * Detect it again unless caller specified it; this gives us 107 * the memory size. 108 */ 109 if (nsc->sc_type == NE2000_TYPE_UNKNOWN) 110 nsc->sc_type = ne2000_detect(nsc); 111 112 /* 113 * 8k of memory for NE1000, 16k otherwise. 114 */ 115 switch (nsc->sc_type) { 116 case NE2000_TYPE_UNKNOWN: 117 default: 118 printf(": where did the card go?\n"); 119 return (1); 120 case NE2000_TYPE_NE1000: 121 memsize = 8192; 122 useword = 0; 123 break; 124 case NE2000_TYPE_NE2000: 125 case NE2000_TYPE_AX88190: /* XXX really? */ 126 case NE2000_TYPE_AX88790: 127 case NE2000_TYPE_DL10019: 128 case NE2000_TYPE_DL10022: 129 memsize = 8192 * 2; 130 useword = 1; 131 break; 132 } 133 134 nsc->sc_useword = useword; 135 136 dsc->cr_proto = ED_CR_RD2; 137 if (nsc->sc_type == NE2000_TYPE_AX88190 || 138 nsc->sc_type == NE2000_TYPE_AX88790) { 139 dsc->rcr_proto = ED_RCR_INTT; 140 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 141 } else 142 dsc->rcr_proto = 0; 143 144 /* 145 * DCR gets: 146 * 147 * FIFO threshold to 8, No auto-init Remote DMA, 148 * byte order=80x86. 149 * 150 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 151 */ 152 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 153 154 dsc->test_mem = ne2000_test_mem; 155 dsc->ring_copy = ne2000_ring_copy; 156 dsc->write_mbuf = ne2000_write_mbuf; 157 dsc->read_hdr = ne2000_read_hdr; 158 159 /* Registers are linear. */ 160 for (i = 0; i < 16; i++) 161 dsc->sc_reg_map[i] = i; 162 163 /* 164 * NIC memory doens't start at zero on an NE board. 165 * The start address is tied to the bus width. 166 * (It happens to be computed the same way as mem size.) 167 */ 168 dsc->mem_start = memsize; 169 170 #ifdef GWETHER 171 { 172 int x, mstart = 0; 173 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 174 tbuf[ED_PAGE_SIZE]; 175 176 for (i = 0; i < ED_PAGE_SIZE; i++) 177 pbuf0[i] = 0; 178 179 /* Search for the start of RAM. */ 180 for (x = 1; x < 256; x++) { 181 ne2000_writemem(nict, nich, asict, asich, pbuf0, 182 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword); 183 ne2000_readmem(nict, nich, asict, asich, 184 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 185 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 186 for (i = 0; i < ED_PAGE_SIZE; i++) 187 pbuf[i] = 255 - x; 188 ne2000_writemem(nict, nich, asict, asich, 189 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 190 useword); 191 ne2000_readmem(nict, nich, asict, asich, 192 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 193 useword); 194 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 195 mstart = x << ED_PAGE_SHIFT; 196 memsize = ED_PAGE_SIZE; 197 break; 198 } 199 } 200 } 201 202 if (mstart == 0) { 203 printf(": cannot find start of RAM\n"); 204 return; 205 } 206 207 /* Search for the end of RAM. */ 208 for (++x; x < 256; x++) { 209 ne2000_writemem(nict, nich, asict, asich, pbuf0, 210 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword); 211 ne2000_readmem(nict, nich, asict, asich, 212 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 213 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 214 for (i = 0; i < ED_PAGE_SIZE; i++) 215 pbuf[i] = 255 - x; 216 ne2000_writemem(nict, nich, asict, asich, 217 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 218 useword); 219 ne2000_readmem(nict, nich, asict, asich, 220 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 221 useword); 222 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 223 memsize += ED_PAGE_SIZE; 224 else 225 break; 226 } else 227 break; 228 } 229 230 printf(": RAM start 0x%x, size %d\n", 231 mstart, memsize); 232 233 dsc->mem_start = mstart; 234 } 235 #endif /* GWETHER */ 236 237 dsc->mem_size = memsize; 238 239 if (myea == NULL) { 240 /* Read the station address. */ 241 if (nsc->sc_type == NE2000_TYPE_AX88190 || 242 nsc->sc_type == NE2000_TYPE_AX88790) { 243 /* Select page 0 registers. */ 244 NIC_BARRIER(nict, nich); 245 bus_space_write_1(nict, nich, ED_P0_CR, 246 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 247 NIC_BARRIER(nict, nich); 248 /* Select word transfer. */ 249 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 250 NIC_BARRIER(nict, nich); 251 ne2000_readmem(nict, nich, asict, asich, 252 AX88190_NODEID_OFFSET, dsc->sc_arpcom.ac_enaddr, 253 ETHER_ADDR_LEN, useword); 254 } else { 255 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 256 sizeof(romdata), useword); 257 for (i = 0; i < ETHER_ADDR_LEN; i++) 258 dsc->sc_arpcom.ac_enaddr[i] = 259 romdata[i * (useword ? 2 : 1)]; 260 } 261 } else 262 bcopy(myea, dsc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN); 263 264 /* Clear any pending interrupts that might have occurred above. */ 265 NIC_BARRIER(nict, nich); 266 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 267 NIC_BARRIER(nict, nich); 268 269 if (dsc->sc_media_init == NULL) 270 dsc->sc_media_init = dp8390_media_init; 271 272 if (dp8390_config(dsc)) { 273 printf(": setup failed\n"); 274 return (1); 275 } 276 277 return (0); 278 } 279 280 /* 281 * Detect an NE-2000 or compatible. Returns a model code. 282 */ 283 int 284 ne2000_detect(struct ne2000_softc *nsc) 285 { 286 struct dp8390_softc *dsc = &nsc->sc_dp8390; 287 bus_space_tag_t nict = dsc->sc_regt; 288 bus_space_handle_t nich = dsc->sc_regh; 289 bus_space_tag_t asict = nsc->sc_asict; 290 bus_space_handle_t asich = nsc->sc_asich; 291 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 292 u_int8_t test_buffer[32], tmp; 293 int state, i, rv = 0; 294 295 state = dsc->sc_enabled; 296 dsc->sc_enabled = 0; 297 298 /* Reset the board. */ 299 #ifdef GWETHER 300 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 301 ASIC_BARRIER(asict, asich); 302 delay(200); 303 #endif /* GWETHER */ 304 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 305 ASIC_BARRIER(asict, asich); 306 delay(10000); 307 308 /* 309 * I don't know if this is necessary; probably cruft leftover from 310 * Clarkson packet driver code. Doesn't do a thing on the boards I've 311 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 312 * non-invasive...but some boards don't seem to reset and I don't have 313 * complete documentation on what the 'right' thing to do is...so we do 314 * the invasive thing for now. Yuck.] 315 */ 316 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 317 ASIC_BARRIER(asict, asich); 318 delay(5000); 319 320 /* 321 * This is needed because some NE clones apparently don't reset the 322 * NIC properly (or the NIC chip doesn't reset fully on power-up). 323 * XXX - this makes the probe invasive! Done against my better 324 * judgement. -DLG 325 */ 326 bus_space_write_1(nict, nich, ED_P0_CR, 327 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 328 NIC_BARRIER(nict, nich); 329 330 delay(5000); 331 332 /* 333 * Generic probe routine for testing for the existence of a DS8390. 334 * Must be performed after the NIC has just been reset. This 335 * works by looking at certain register values that are guaranteed 336 * to be initialized a certain way after power-up or reset. 337 * 338 * Specifically: 339 * 340 * Register reset bits set bits 341 * -------- ---------- -------- 342 * CR TXP, STA RD2, STP 343 * ISR RST 344 * IMR <all> 345 * DCR LAS 346 * TCR LB1, LB0 347 * 348 * We only look at CR and ISR, however, since looking at the others 349 * would require changing register pages, which would be intrusive 350 * if this isn't an 8390. 351 */ 352 353 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 354 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 355 (ED_CR_RD2 | ED_CR_STP)) 356 goto out; 357 358 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 359 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 360 goto out; 361 362 bus_space_write_1(nict, nich, 363 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 364 NIC_BARRIER(nict, nich); 365 366 for (i = 0; i < 100; i++) { 367 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 368 ED_ISR_RST) { 369 /* Ack the reset bit. */ 370 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 371 NIC_BARRIER(nict, nich); 372 break; 373 } 374 delay(100); 375 } 376 377 #if 0 378 /* XXX */ 379 if (i == 100) 380 goto out; 381 #endif 382 383 /* 384 * Test the ability to read and write to the NIC memory. This has 385 * the side effect of determining if this is an NE1000 or an NE2000. 386 */ 387 388 /* 389 * This prevents packets from being stored in the NIC memory when 390 * the readmem routine turns on the start bit in the CR. 391 */ 392 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 393 NIC_BARRIER(nict, nich); 394 395 /* Temporarily initialize DCR for byte operations. */ 396 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 397 398 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 399 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 400 401 /* 402 * Write a test pattern in byte mode. If this fails, then there 403 * probably isn't any memory at 8k - which likely means that the 404 * board is an NE2000. 405 */ 406 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 407 sizeof(test_pattern), 0); 408 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 409 sizeof(test_buffer), 0); 410 411 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 412 /* not an NE1000 - try NE2000 */ 413 bus_space_write_1(nict, nich, ED_P0_DCR, 414 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 415 bus_space_write_1(nict, nich, ED_P0_PSTART, 416 16384 >> ED_PAGE_SHIFT); 417 bus_space_write_1(nict, nich, ED_P0_PSTOP, 418 32768 >> ED_PAGE_SHIFT); 419 420 /* 421 * Write the test pattern in word mode. If this also fails, 422 * then we don't know what this board is. 423 */ 424 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 425 sizeof(test_pattern), 1); 426 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 427 sizeof(test_buffer), 1); 428 429 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 430 goto out; /* not an NE2000 either */ 431 432 rv = NE2000_TYPE_NE2000; 433 } else { 434 /* We're an NE1000. */ 435 rv = NE2000_TYPE_NE1000; 436 } 437 438 /* Clear any pending interrupts that might have occurred above. */ 439 NIC_BARRIER(nict, nich); 440 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 441 442 out: 443 dsc->sc_enabled = state; 444 445 return (rv); 446 } 447 448 /* 449 * Write an mbuf chain to the destination NIC memory address using programmed 450 * I/O. 451 */ 452 int 453 ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf) 454 { 455 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 456 bus_space_tag_t nict = sc->sc_regt; 457 bus_space_handle_t nich = sc->sc_regh; 458 bus_space_tag_t asict = nsc->sc_asict; 459 bus_space_handle_t asich = nsc->sc_asich; 460 int savelen; 461 int maxwait = 100; /* about 120us */ 462 463 savelen = m->m_pkthdr.len; 464 465 /* Select page 0 registers. */ 466 NIC_BARRIER(nict, nich); 467 bus_space_write_1(nict, nich, ED_P0_CR, 468 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 469 NIC_BARRIER(nict, nich); 470 471 /* Reset remote DMA complete flag. */ 472 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 473 NIC_BARRIER(nict, nich); 474 475 /* Set up DMA byte count. */ 476 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 477 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 478 479 /* Set up destination address in NIC mem. */ 480 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 481 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 482 483 /* Set remote DMA write. */ 484 NIC_BARRIER(nict, nich); 485 bus_space_write_1(nict, nich, 486 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 487 NIC_BARRIER(nict, nich); 488 489 /* 490 * Transfer the mbuf chain to the NIC memory. NE2000 cards 491 * require that data be transferred as words, and only words, 492 * so that case requires some extra code to patch over odd-length 493 * mbufs. 494 */ 495 if (nsc->sc_type == NE2000_TYPE_NE1000) { 496 /* NE1000s are easy. */ 497 for (; m != 0; m = m->m_next) { 498 if (m->m_len) { 499 bus_space_write_multi_1(asict, asich, 500 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 501 m->m_len); 502 } 503 } 504 } else { 505 /* NE2000s are a bit trickier. */ 506 u_int8_t *data, savebyte[2]; 507 int l, leftover; 508 #ifdef DIAGNOSTIC 509 u_int8_t *lim; 510 #endif 511 /* Start out with no leftover data. */ 512 leftover = 0; 513 savebyte[0] = savebyte[1] = 0; 514 515 for (; m != 0; m = m->m_next) { 516 l = m->m_len; 517 if (l == 0) 518 continue; 519 data = mtod(m, u_int8_t *); 520 #ifdef DIAGNOSTIC 521 lim = data + l; 522 #endif 523 while (l > 0) { 524 if (leftover) { 525 /* 526 * Data left over (from mbuf or 527 * realignment). Buffer the next 528 * byte, and write it and the 529 * leftover data out. 530 */ 531 savebyte[1] = *data++; 532 l--; 533 bus_space_write_raw_multi_2(asict, 534 asich, NE2000_ASIC_DATA, 535 savebyte, 2); 536 leftover = 0; 537 } else if (ALIGNED_POINTER(data, 538 u_int16_t) == 0) { 539 /* 540 * Unaligned data; buffer the next 541 * byte. 542 */ 543 savebyte[0] = *data++; 544 l--; 545 leftover = 1; 546 } else { 547 /* 548 * Aligned data; output contiguous 549 * words as much as we can, then 550 * buffer the remaining byte, if any. 551 */ 552 leftover = l & 1; 553 l &= ~1; 554 bus_space_write_raw_multi_2(asict, 555 asich, NE2000_ASIC_DATA, data, l); 556 data += l; 557 if (leftover) 558 savebyte[0] = *data++; 559 l = 0; 560 } 561 } 562 if (l < 0) 563 panic("ne2000_write_mbuf: negative len"); 564 #ifdef DIAGNOSTIC 565 if (data != lim) 566 panic("ne2000_write_mbuf: data != lim"); 567 #endif 568 } 569 if (leftover) { 570 savebyte[1] = 0; 571 bus_space_write_raw_multi_2(asict, asich, 572 NE2000_ASIC_DATA, savebyte, 2); 573 } 574 } 575 NIC_BARRIER(nict, nich); 576 577 /* AX88796 doesn't seem to have remote DMA complete */ 578 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE) 579 return (savelen); 580 581 /* 582 * Wait for remote DMA to complete. This is necessary because on the 583 * transmit side, data is handled internally by the NIC in bursts, and 584 * we can't start another remote DMA until this one completes. Not 585 * waiting causes really bad things to happen - like the NIC wedging 586 * the bus. 587 */ 588 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 589 ED_ISR_RDC) && --maxwait) { 590 bus_space_read_1(nict, nich, ED_P0_CRDA1); 591 bus_space_read_1(nict, nich, ED_P0_CRDA0); 592 NIC_BARRIER(nict, nich); 593 DELAY(1); 594 } 595 596 if (maxwait == 0) { 597 log(LOG_WARNING, 598 "%s: remote transmit DMA failed to complete\n", 599 sc->sc_dev.dv_xname); 600 dp8390_reset(sc); 601 } 602 603 return (savelen); 604 } 605 606 /* 607 * Given a source and destination address, copy 'amount' of a packet from 608 * the ring buffer into a linear destination buffer. Takes into account 609 * ring-wrap. 610 */ 611 int 612 ne2000_ring_copy(struct dp8390_softc *sc, int src, caddr_t dst, 613 u_short amount) 614 { 615 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 616 bus_space_tag_t nict = sc->sc_regt; 617 bus_space_handle_t nich = sc->sc_regh; 618 bus_space_tag_t asict = nsc->sc_asict; 619 bus_space_handle_t asich = nsc->sc_asich; 620 u_short tmp_amount; 621 int useword = nsc->sc_useword; 622 623 /* Does copy wrap to lower addr in ring buffer? */ 624 if (src + amount > sc->mem_end) { 625 tmp_amount = sc->mem_end - src; 626 627 /* Copy amount up to end of NIC memory. */ 628 ne2000_readmem(nict, nich, asict, asich, src, 629 (u_int8_t *)dst, tmp_amount, useword); 630 631 amount -= tmp_amount; 632 src = sc->mem_ring; 633 dst += tmp_amount; 634 } 635 636 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 637 amount, useword); 638 639 return (src + amount); 640 } 641 642 void 643 ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr) 644 { 645 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 646 647 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 648 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 649 nsc->sc_useword); 650 #if BYTE_ORDER == BIG_ENDIAN 651 hdr->count = swap16(hdr->count); 652 #endif 653 } 654 655 int 656 ne2000_test_mem(struct dp8390_softc *sc) 657 { 658 /* Noop. */ 659 return (0); 660 } 661 662 /* 663 * Given a NIC memory source address and a host memory destination address, 664 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 665 * rounded up to a word - ok as long as mbufs are word sized. 666 */ 667 void 668 ne2000_readmem(bus_space_tag_t nict, bus_space_handle_t nich, 669 bus_space_tag_t asict, bus_space_handle_t asich, int src, 670 u_int8_t *dst, size_t amount, int useword) 671 { 672 673 /* Select page 0 registers. */ 674 NIC_BARRIER(nict, nich); 675 bus_space_write_1(nict, nich, ED_P0_CR, 676 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 677 NIC_BARRIER(nict, nich); 678 679 /* Round up to a word. */ 680 if (amount & 1) 681 ++amount; 682 683 /* Set up DMA byte count. */ 684 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 685 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 686 687 /* Set up source address in NIC mem. */ 688 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 689 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 690 691 NIC_BARRIER(nict, nich); 692 bus_space_write_1(nict, nich, ED_P0_CR, 693 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 694 695 ASIC_BARRIER(asict, asich); 696 if (useword) 697 bus_space_read_raw_multi_2(asict, asich, NE2000_ASIC_DATA, 698 dst, amount); 699 else 700 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 701 dst, amount); 702 } 703 704 /* 705 * Stripped down routine for writing a linear buffer to NIC memory. Only 706 * used in the probe routine to test the memory. 'len' must be even. 707 */ 708 void 709 ne2000_writemem(bus_space_tag_t nict, bus_space_handle_t nich, 710 bus_space_tag_t asict, bus_space_handle_t asich, u_int8_t *src, 711 int dst, size_t len, int useword) 712 { 713 int maxwait = 100; /* about 120us */ 714 715 /* Select page 0 registers. */ 716 NIC_BARRIER(nict, nich); 717 bus_space_write_1(nict, nich, ED_P0_CR, 718 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 719 NIC_BARRIER(nict, nich); 720 721 /* Reset remote DMA complete flag. */ 722 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 723 NIC_BARRIER(nict, nich); 724 725 /* Set up DMA byte count. */ 726 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 727 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 728 729 /* Set up destination address in NIC mem. */ 730 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 731 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 732 733 /* Set remote DMA write. */ 734 NIC_BARRIER(nict, nich); 735 bus_space_write_1(nict, nich, ED_P0_CR, 736 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 737 NIC_BARRIER(nict, nich); 738 739 ASIC_BARRIER(asict, asich); 740 if (useword) 741 bus_space_write_raw_multi_2(asict, asich, NE2000_ASIC_DATA, 742 src, len); 743 else 744 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 745 src, len); 746 ASIC_BARRIER(asict, asich); 747 748 /* 749 * Wait for remote DMA to complete. This is necessary because on the 750 * transmit side, data is handled internally by the NIC in bursts, and 751 * we can't start another remote DMA until this one completes. Not 752 * waiting causes really bad things to happen - like the NIC wedging 753 * the bus. 754 */ 755 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 756 ED_ISR_RDC) && --maxwait) 757 DELAY(1); 758 } 759 760 int 761 ne2000_detach(struct ne2000_softc *sc, int flags) 762 { 763 return (dp8390_detach(&sc->sc_dp8390, flags)); 764 } 765